OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [prj/] [altera/] [or1k_soc_top.vwf] - Blame information for rev 12

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 xianfeng
/*
2
WARNING: Do NOT edit the input and output ports in this file in a text
3
editor if you plan to continue editing the block that represents it in
4
the Block Editor! File corruption is VERY likely to occur.
5
*/
6
 
7
/*
8
Copyright (C) 1991-2009 Altera Corporation
9
Your use of Altera Corporation's design tools, logic functions
10
and other software and tools, and its AMPP partner logic
11
functions, and any output files from any of the foregoing
12
(including device programming or simulation files), and any
13
associated documentation or information are expressly subject
14
to the terms and conditions of the Altera Program License
15
Subscription Agreement, Altera MegaCore Function License
16
Agreement, or other applicable license agreement, including,
17
without limitation, that your use is for the sole purpose of
18
programming logic devices manufactured by Altera and sold by
19
Altera or its authorized distributors.  Please refer to the
20
applicable agreement for further details.
21
*/
22
 
23
HEADER
24
{
25
        VERSION = 1;
26
        TIME_UNIT = ns;
27
        DATA_OFFSET = 0.0;
28
        DATA_DURATION = 1000000.0;
29
        SIMULATION_TIME = 0.0;
30
        GRID_PHASE = 0.0;
31
        GRID_PERIOD = 10.0;
32
        GRID_DUTY_CYCLE = 50;
33
}
34
 
35
SIGNAL("wb_clk_pad_i")
36
{
37
        VALUE_TYPE = NINE_LEVEL_BIT;
38
        SIGNAL_TYPE = SINGLE_BIT;
39
        WIDTH = 1;
40
        LSB_INDEX = -1;
41
        DIRECTION = INPUT;
42
        PARENT = "";
43
}
44
 
45
SIGNAL("uart_stx_pad_o")
46
{
47
        VALUE_TYPE = NINE_LEVEL_BIT;
48
        SIGNAL_TYPE = SINGLE_BIT;
49
        WIDTH = 1;
50
        LSB_INDEX = -1;
51
        DIRECTION = OUTPUT;
52
        PARENT = "";
53
}
54
 
55
SIGNAL("divider 1116")
56
{
57
        VALUE_TYPE = NINE_LEVEL_BIT;
58
        SIGNAL_TYPE = SINGLE_BIT;
59
        WIDTH = 1;
60
        LSB_INDEX = -1;
61
        DIRECTION = INPUT;
62
        PARENT = "";
63
}
64
 
65
SIGNAL("uart_srx_pad_i")
66
{
67
        VALUE_TYPE = NINE_LEVEL_BIT;
68
        SIGNAL_TYPE = SINGLE_BIT;
69
        WIDTH = 1;
70
        LSB_INDEX = -1;
71
        DIRECTION = INPUT;
72
        PARENT = "";
73
}
74
 
75
SIGNAL("gpio_a_pad_io")
76
{
77
        VALUE_TYPE = NINE_LEVEL_BIT;
78
        SIGNAL_TYPE = BUS;
79
        WIDTH = 32;
80
        LSB_INDEX = 0;
81
        DIRECTION = BIDIR;
82
        PARENT = "";
83
}
84
 
85
SIGNAL("gpio_a_pad_io[31]")
86
{
87
        VALUE_TYPE = NINE_LEVEL_BIT;
88
        SIGNAL_TYPE = SINGLE_BIT;
89
        WIDTH = 1;
90
        LSB_INDEX = -1;
91
        DIRECTION = BIDIR;
92
        PARENT = "gpio_a_pad_io";
93
}
94
 
95
SIGNAL("gpio_a_pad_io[30]")
96
{
97
        VALUE_TYPE = NINE_LEVEL_BIT;
98
        SIGNAL_TYPE = SINGLE_BIT;
99
        WIDTH = 1;
100
        LSB_INDEX = -1;
101
        DIRECTION = BIDIR;
102
        PARENT = "gpio_a_pad_io";
103
}
104
 
105
SIGNAL("gpio_a_pad_io[29]")
106
{
107
        VALUE_TYPE = NINE_LEVEL_BIT;
108
        SIGNAL_TYPE = SINGLE_BIT;
109
        WIDTH = 1;
110
        LSB_INDEX = -1;
111
        DIRECTION = BIDIR;
112
        PARENT = "gpio_a_pad_io";
113
}
114
 
115
SIGNAL("gpio_a_pad_io[28]")
116
{
117
        VALUE_TYPE = NINE_LEVEL_BIT;
118
        SIGNAL_TYPE = SINGLE_BIT;
119
        WIDTH = 1;
120
        LSB_INDEX = -1;
121
        DIRECTION = BIDIR;
122
        PARENT = "gpio_a_pad_io";
123
}
124
 
125
SIGNAL("gpio_a_pad_io[27]")
126
{
127
        VALUE_TYPE = NINE_LEVEL_BIT;
128
        SIGNAL_TYPE = SINGLE_BIT;
129
        WIDTH = 1;
130
        LSB_INDEX = -1;
131
        DIRECTION = BIDIR;
132
        PARENT = "gpio_a_pad_io";
133
}
134
 
135
SIGNAL("gpio_a_pad_io[26]")
136
{
137
        VALUE_TYPE = NINE_LEVEL_BIT;
138
        SIGNAL_TYPE = SINGLE_BIT;
139
        WIDTH = 1;
140
        LSB_INDEX = -1;
141
        DIRECTION = BIDIR;
142
        PARENT = "gpio_a_pad_io";
143
}
144
 
145
SIGNAL("gpio_a_pad_io[25]")
146
{
147
        VALUE_TYPE = NINE_LEVEL_BIT;
148
        SIGNAL_TYPE = SINGLE_BIT;
149
        WIDTH = 1;
150
        LSB_INDEX = -1;
151
        DIRECTION = BIDIR;
152
        PARENT = "gpio_a_pad_io";
153
}
154
 
155
SIGNAL("gpio_a_pad_io[24]")
156
{
157
        VALUE_TYPE = NINE_LEVEL_BIT;
158
        SIGNAL_TYPE = SINGLE_BIT;
159
        WIDTH = 1;
160
        LSB_INDEX = -1;
161
        DIRECTION = BIDIR;
162
        PARENT = "gpio_a_pad_io";
163
}
164
 
165
SIGNAL("gpio_a_pad_io[23]")
166
{
167
        VALUE_TYPE = NINE_LEVEL_BIT;
168
        SIGNAL_TYPE = SINGLE_BIT;
169
        WIDTH = 1;
170
        LSB_INDEX = -1;
171
        DIRECTION = BIDIR;
172
        PARENT = "gpio_a_pad_io";
173
}
174
 
175
SIGNAL("gpio_a_pad_io[22]")
176
{
177
        VALUE_TYPE = NINE_LEVEL_BIT;
178
        SIGNAL_TYPE = SINGLE_BIT;
179
        WIDTH = 1;
180
        LSB_INDEX = -1;
181
        DIRECTION = BIDIR;
182
        PARENT = "gpio_a_pad_io";
183
}
184
 
185
SIGNAL("gpio_a_pad_io[21]")
186
{
187
        VALUE_TYPE = NINE_LEVEL_BIT;
188
        SIGNAL_TYPE = SINGLE_BIT;
189
        WIDTH = 1;
190
        LSB_INDEX = -1;
191
        DIRECTION = BIDIR;
192
        PARENT = "gpio_a_pad_io";
193
}
194
 
195
SIGNAL("gpio_a_pad_io[20]")
196
{
197
        VALUE_TYPE = NINE_LEVEL_BIT;
198
        SIGNAL_TYPE = SINGLE_BIT;
199
        WIDTH = 1;
200
        LSB_INDEX = -1;
201
        DIRECTION = BIDIR;
202
        PARENT = "gpio_a_pad_io";
203
}
204
 
205
SIGNAL("gpio_a_pad_io[19]")
206
{
207
        VALUE_TYPE = NINE_LEVEL_BIT;
208
        SIGNAL_TYPE = SINGLE_BIT;
209
        WIDTH = 1;
210
        LSB_INDEX = -1;
211
        DIRECTION = BIDIR;
212
        PARENT = "gpio_a_pad_io";
213
}
214
 
215
SIGNAL("gpio_a_pad_io[18]")
216
{
217
        VALUE_TYPE = NINE_LEVEL_BIT;
218
        SIGNAL_TYPE = SINGLE_BIT;
219
        WIDTH = 1;
220
        LSB_INDEX = -1;
221
        DIRECTION = BIDIR;
222
        PARENT = "gpio_a_pad_io";
223
}
224
 
225
SIGNAL("gpio_a_pad_io[17]")
226
{
227
        VALUE_TYPE = NINE_LEVEL_BIT;
228
        SIGNAL_TYPE = SINGLE_BIT;
229
        WIDTH = 1;
230
        LSB_INDEX = -1;
231
        DIRECTION = BIDIR;
232
        PARENT = "gpio_a_pad_io";
233
}
234
 
235
SIGNAL("gpio_a_pad_io[16]")
236
{
237
        VALUE_TYPE = NINE_LEVEL_BIT;
238
        SIGNAL_TYPE = SINGLE_BIT;
239
        WIDTH = 1;
240
        LSB_INDEX = -1;
241
        DIRECTION = BIDIR;
242
        PARENT = "gpio_a_pad_io";
243
}
244
 
245
SIGNAL("gpio_a_pad_io[15]")
246
{
247
        VALUE_TYPE = NINE_LEVEL_BIT;
248
        SIGNAL_TYPE = SINGLE_BIT;
249
        WIDTH = 1;
250
        LSB_INDEX = -1;
251
        DIRECTION = BIDIR;
252
        PARENT = "gpio_a_pad_io";
253
}
254
 
255
SIGNAL("gpio_a_pad_io[14]")
256
{
257
        VALUE_TYPE = NINE_LEVEL_BIT;
258
        SIGNAL_TYPE = SINGLE_BIT;
259
        WIDTH = 1;
260
        LSB_INDEX = -1;
261
        DIRECTION = BIDIR;
262
        PARENT = "gpio_a_pad_io";
263
}
264
 
265
SIGNAL("gpio_a_pad_io[13]")
266
{
267
        VALUE_TYPE = NINE_LEVEL_BIT;
268
        SIGNAL_TYPE = SINGLE_BIT;
269
        WIDTH = 1;
270
        LSB_INDEX = -1;
271
        DIRECTION = BIDIR;
272
        PARENT = "gpio_a_pad_io";
273
}
274
 
275
SIGNAL("gpio_a_pad_io[12]")
276
{
277
        VALUE_TYPE = NINE_LEVEL_BIT;
278
        SIGNAL_TYPE = SINGLE_BIT;
279
        WIDTH = 1;
280
        LSB_INDEX = -1;
281
        DIRECTION = BIDIR;
282
        PARENT = "gpio_a_pad_io";
283
}
284
 
285
SIGNAL("gpio_a_pad_io[11]")
286
{
287
        VALUE_TYPE = NINE_LEVEL_BIT;
288
        SIGNAL_TYPE = SINGLE_BIT;
289
        WIDTH = 1;
290
        LSB_INDEX = -1;
291
        DIRECTION = BIDIR;
292
        PARENT = "gpio_a_pad_io";
293
}
294
 
295
SIGNAL("gpio_a_pad_io[10]")
296
{
297
        VALUE_TYPE = NINE_LEVEL_BIT;
298
        SIGNAL_TYPE = SINGLE_BIT;
299
        WIDTH = 1;
300
        LSB_INDEX = -1;
301
        DIRECTION = BIDIR;
302
        PARENT = "gpio_a_pad_io";
303
}
304
 
305
SIGNAL("gpio_a_pad_io[9]")
306
{
307
        VALUE_TYPE = NINE_LEVEL_BIT;
308
        SIGNAL_TYPE = SINGLE_BIT;
309
        WIDTH = 1;
310
        LSB_INDEX = -1;
311
        DIRECTION = BIDIR;
312
        PARENT = "gpio_a_pad_io";
313
}
314
 
315
SIGNAL("gpio_a_pad_io[8]")
316
{
317
        VALUE_TYPE = NINE_LEVEL_BIT;
318
        SIGNAL_TYPE = SINGLE_BIT;
319
        WIDTH = 1;
320
        LSB_INDEX = -1;
321
        DIRECTION = BIDIR;
322
        PARENT = "gpio_a_pad_io";
323
}
324
 
325
SIGNAL("gpio_a_pad_io[7]")
326
{
327
        VALUE_TYPE = NINE_LEVEL_BIT;
328
        SIGNAL_TYPE = SINGLE_BIT;
329
        WIDTH = 1;
330
        LSB_INDEX = -1;
331
        DIRECTION = BIDIR;
332
        PARENT = "gpio_a_pad_io";
333
}
334
 
335
SIGNAL("gpio_a_pad_io[6]")
336
{
337
        VALUE_TYPE = NINE_LEVEL_BIT;
338
        SIGNAL_TYPE = SINGLE_BIT;
339
        WIDTH = 1;
340
        LSB_INDEX = -1;
341
        DIRECTION = BIDIR;
342
        PARENT = "gpio_a_pad_io";
343
}
344
 
345
SIGNAL("gpio_a_pad_io[5]")
346
{
347
        VALUE_TYPE = NINE_LEVEL_BIT;
348
        SIGNAL_TYPE = SINGLE_BIT;
349
        WIDTH = 1;
350
        LSB_INDEX = -1;
351
        DIRECTION = BIDIR;
352
        PARENT = "gpio_a_pad_io";
353
}
354
 
355
SIGNAL("gpio_a_pad_io[4]")
356
{
357
        VALUE_TYPE = NINE_LEVEL_BIT;
358
        SIGNAL_TYPE = SINGLE_BIT;
359
        WIDTH = 1;
360
        LSB_INDEX = -1;
361
        DIRECTION = BIDIR;
362
        PARENT = "gpio_a_pad_io";
363
}
364
 
365
SIGNAL("gpio_a_pad_io[3]")
366
{
367
        VALUE_TYPE = NINE_LEVEL_BIT;
368
        SIGNAL_TYPE = SINGLE_BIT;
369
        WIDTH = 1;
370
        LSB_INDEX = -1;
371
        DIRECTION = BIDIR;
372
        PARENT = "gpio_a_pad_io";
373
}
374
 
375
SIGNAL("gpio_a_pad_io[2]")
376
{
377
        VALUE_TYPE = NINE_LEVEL_BIT;
378
        SIGNAL_TYPE = SINGLE_BIT;
379
        WIDTH = 1;
380
        LSB_INDEX = -1;
381
        DIRECTION = BIDIR;
382
        PARENT = "gpio_a_pad_io";
383
}
384
 
385
SIGNAL("gpio_a_pad_io[1]")
386
{
387
        VALUE_TYPE = NINE_LEVEL_BIT;
388
        SIGNAL_TYPE = SINGLE_BIT;
389
        WIDTH = 1;
390
        LSB_INDEX = -1;
391
        DIRECTION = BIDIR;
392
        PARENT = "gpio_a_pad_io";
393
}
394
 
395
SIGNAL("gpio_a_pad_io[0]")
396
{
397
        VALUE_TYPE = NINE_LEVEL_BIT;
398
        SIGNAL_TYPE = SINGLE_BIT;
399
        WIDTH = 1;
400
        LSB_INDEX = -1;
401
        DIRECTION = BIDIR;
402
        PARENT = "gpio_a_pad_io";
403
}
404
 
405
SIGNAL("rst_n_pad_i")
406
{
407
        VALUE_TYPE = NINE_LEVEL_BIT;
408
        SIGNAL_TYPE = SINGLE_BIT;
409
        WIDTH = 1;
410
        LSB_INDEX = -1;
411
        DIRECTION = INPUT;
412
        PARENT = "";
413
}
414
 
415
SIGNAL("ddr_pll_clk_pad_i")
416
{
417
        VALUE_TYPE = NINE_LEVEL_BIT;
418
        SIGNAL_TYPE = SINGLE_BIT;
419
        WIDTH = 1;
420
        LSB_INDEX = -1;
421
        DIRECTION = INPUT;
422
        PARENT = "";
423
}
424
 
425
TRANSITION_LIST("wb_clk_pad_i")
426
{
427
        NODE
428
        {
429
                REPEAT = 1;
430
                NODE
431
                {
432
                        REPEAT = 50000;
433
                        LEVEL 0 FOR 10.0;
434
                        LEVEL 1 FOR 10.0;
435
                }
436
        }
437
}
438
 
439
TRANSITION_LIST("uart_stx_pad_o")
440
{
441
        NODE
442
        {
443
                REPEAT = 1;
444
                LEVEL X FOR 1000000.0;
445
        }
446
}
447
 
448
TRANSITION_LIST("uart_srx_pad_i")
449
{
450
        NODE
451
        {
452
                REPEAT = 1;
453
                LEVEL 1 FOR 1000000.0;
454
        }
455
}
456
 
457
TRANSITION_LIST("gpio_a_pad_io[31]")
458
{
459
        NODE
460
        {
461
                REPEAT = 1;
462
                LEVEL Z FOR 1000000.0;
463
        }
464
}
465
 
466
TRANSITION_LIST("gpio_a_pad_io[30]")
467
{
468
        NODE
469
        {
470
                REPEAT = 1;
471
                LEVEL Z FOR 1000000.0;
472
        }
473
}
474
 
475
TRANSITION_LIST("gpio_a_pad_io[29]")
476
{
477
        NODE
478
        {
479
                REPEAT = 1;
480
                LEVEL Z FOR 1000000.0;
481
        }
482
}
483
 
484
TRANSITION_LIST("gpio_a_pad_io[28]")
485
{
486
        NODE
487
        {
488
                REPEAT = 1;
489
                LEVEL Z FOR 1000000.0;
490
        }
491
}
492
 
493
TRANSITION_LIST("gpio_a_pad_io[27]")
494
{
495
        NODE
496
        {
497
                REPEAT = 1;
498
                LEVEL Z FOR 1000000.0;
499
        }
500
}
501
 
502
TRANSITION_LIST("gpio_a_pad_io[26]")
503
{
504
        NODE
505
        {
506
                REPEAT = 1;
507
                LEVEL Z FOR 1000000.0;
508
        }
509
}
510
 
511
TRANSITION_LIST("gpio_a_pad_io[25]")
512
{
513
        NODE
514
        {
515
                REPEAT = 1;
516
                LEVEL Z FOR 1000000.0;
517
        }
518
}
519
 
520
TRANSITION_LIST("gpio_a_pad_io[24]")
521
{
522
        NODE
523
        {
524
                REPEAT = 1;
525
                LEVEL Z FOR 1000000.0;
526
        }
527
}
528
 
529
TRANSITION_LIST("gpio_a_pad_io[23]")
530
{
531
        NODE
532
        {
533
                REPEAT = 1;
534
                LEVEL Z FOR 1000000.0;
535
        }
536
}
537
 
538
TRANSITION_LIST("gpio_a_pad_io[22]")
539
{
540
        NODE
541
        {
542
                REPEAT = 1;
543
                LEVEL Z FOR 1000000.0;
544
        }
545
}
546
 
547
TRANSITION_LIST("gpio_a_pad_io[21]")
548
{
549
        NODE
550
        {
551
                REPEAT = 1;
552
                LEVEL Z FOR 1000000.0;
553
        }
554
}
555
 
556
TRANSITION_LIST("gpio_a_pad_io[20]")
557
{
558
        NODE
559
        {
560
                REPEAT = 1;
561
                LEVEL Z FOR 1000000.0;
562
        }
563
}
564
 
565
TRANSITION_LIST("gpio_a_pad_io[19]")
566
{
567
        NODE
568
        {
569
                REPEAT = 1;
570
                LEVEL Z FOR 1000000.0;
571
        }
572
}
573
 
574
TRANSITION_LIST("gpio_a_pad_io[18]")
575
{
576
        NODE
577
        {
578
                REPEAT = 1;
579
                LEVEL Z FOR 1000000.0;
580
        }
581
}
582
 
583
TRANSITION_LIST("gpio_a_pad_io[17]")
584
{
585
        NODE
586
        {
587
                REPEAT = 1;
588
                LEVEL Z FOR 1000000.0;
589
        }
590
}
591
 
592
TRANSITION_LIST("gpio_a_pad_io[16]")
593
{
594
        NODE
595
        {
596
                REPEAT = 1;
597
                LEVEL Z FOR 1000000.0;
598
        }
599
}
600
 
601
TRANSITION_LIST("gpio_a_pad_io[15]")
602
{
603
        NODE
604
        {
605
                REPEAT = 1;
606
                LEVEL Z FOR 1000000.0;
607
        }
608
}
609
 
610
TRANSITION_LIST("gpio_a_pad_io[14]")
611
{
612
        NODE
613
        {
614
                REPEAT = 1;
615
                LEVEL Z FOR 1000000.0;
616
        }
617
}
618
 
619
TRANSITION_LIST("gpio_a_pad_io[13]")
620
{
621
        NODE
622
        {
623
                REPEAT = 1;
624
                LEVEL Z FOR 1000000.0;
625
        }
626
}
627
 
628
TRANSITION_LIST("gpio_a_pad_io[12]")
629
{
630
        NODE
631
        {
632
                REPEAT = 1;
633
                LEVEL Z FOR 1000000.0;
634
        }
635
}
636
 
637
TRANSITION_LIST("gpio_a_pad_io[11]")
638
{
639
        NODE
640
        {
641
                REPEAT = 1;
642
                LEVEL Z FOR 1000000.0;
643
        }
644
}
645
 
646
TRANSITION_LIST("gpio_a_pad_io[10]")
647
{
648
        NODE
649
        {
650
                REPEAT = 1;
651
                LEVEL Z FOR 1000000.0;
652
        }
653
}
654
 
655
TRANSITION_LIST("gpio_a_pad_io[9]")
656
{
657
        NODE
658
        {
659
                REPEAT = 1;
660
                LEVEL Z FOR 1000000.0;
661
        }
662
}
663
 
664
TRANSITION_LIST("gpio_a_pad_io[8]")
665
{
666
        NODE
667
        {
668
                REPEAT = 1;
669
                LEVEL Z FOR 1000000.0;
670
        }
671
}
672
 
673
TRANSITION_LIST("gpio_a_pad_io[7]")
674
{
675
        NODE
676
        {
677
                REPEAT = 1;
678
                LEVEL Z FOR 1000000.0;
679
        }
680
}
681
 
682
TRANSITION_LIST("gpio_a_pad_io[6]")
683
{
684
        NODE
685
        {
686
                REPEAT = 1;
687
                LEVEL Z FOR 1000000.0;
688
        }
689
}
690
 
691
TRANSITION_LIST("gpio_a_pad_io[5]")
692
{
693
        NODE
694
        {
695
                REPEAT = 1;
696
                LEVEL Z FOR 1000000.0;
697
        }
698
}
699
 
700
TRANSITION_LIST("gpio_a_pad_io[4]")
701
{
702
        NODE
703
        {
704
                REPEAT = 1;
705
                LEVEL Z FOR 1000000.0;
706
        }
707
}
708
 
709
TRANSITION_LIST("gpio_a_pad_io[3]")
710
{
711
        NODE
712
        {
713
                REPEAT = 1;
714
                LEVEL Z FOR 1000000.0;
715
        }
716
}
717
 
718
TRANSITION_LIST("gpio_a_pad_io[2]")
719
{
720
        NODE
721
        {
722
                REPEAT = 1;
723
                LEVEL Z FOR 1000000.0;
724
        }
725
}
726
 
727
TRANSITION_LIST("gpio_a_pad_io[1]")
728
{
729
        NODE
730
        {
731
                REPEAT = 1;
732
                LEVEL Z FOR 1000000.0;
733
        }
734
}
735
 
736
TRANSITION_LIST("gpio_a_pad_io[0]")
737
{
738
        NODE
739
        {
740
                REPEAT = 1;
741
                LEVEL Z FOR 1000000.0;
742
        }
743
}
744
 
745
TRANSITION_LIST("rst_n_pad_i")
746
{
747
        NODE
748
        {
749
                REPEAT = 1;
750
                LEVEL 0 FOR 80.0;
751
                LEVEL 1 FOR 999920.0;
752
        }
753
}
754
 
755
TRANSITION_LIST("ddr_pll_clk_pad_i")
756
{
757
        NODE
758
        {
759
                REPEAT = 1;
760
                NODE
761
                {
762
                        REPEAT = 50000;
763
                        LEVEL 0 FOR 10.0;
764
                        LEVEL 1 FOR 10.0;
765
                }
766
        }
767
}
768
 
769
DISPLAY_LINE
770
{
771
        CHANNEL = "wb_clk_pad_i";
772
        EXPAND_STATUS = COLLAPSED;
773
        RADIX = Hexadecimal;
774
        TREE_INDEX = 0;
775
        TREE_LEVEL = 0;
776
}
777
 
778
DISPLAY_LINE
779
{
780
        CHANNEL = "ddr_pll_clk_pad_i";
781
        EXPAND_STATUS = COLLAPSED;
782
        RADIX = Hexadecimal;
783
        TREE_INDEX = 1;
784
        TREE_LEVEL = 0;
785
}
786
 
787
DISPLAY_LINE
788
{
789
        CHANNEL = "rst_n_pad_i";
790
        EXPAND_STATUS = COLLAPSED;
791
        RADIX = Hexadecimal;
792
        TREE_INDEX = 2;
793
        TREE_LEVEL = 0;
794
}
795
 
796
DISPLAY_LINE
797
{
798
        CHANNEL = "uart_stx_pad_o";
799
        EXPAND_STATUS = COLLAPSED;
800
        RADIX = Hexadecimal;
801
        TREE_INDEX = 3;
802
        TREE_LEVEL = 0;
803
}
804
 
805
DISPLAY_LINE
806
{
807
        CHANNEL = "gpio_a_pad_io";
808
        EXPAND_STATUS = COLLAPSED;
809
        RADIX = Hexadecimal;
810
        TREE_INDEX = 4;
811
        TREE_LEVEL = 0;
812
        CHILDREN = 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36;
813
}
814
 
815
DISPLAY_LINE
816
{
817
        CHANNEL = "gpio_a_pad_io[31]";
818
        EXPAND_STATUS = COLLAPSED;
819
        RADIX = Hexadecimal;
820
        TREE_INDEX = 5;
821
        TREE_LEVEL = 1;
822
        PARENT = 4;
823
}
824
 
825
DISPLAY_LINE
826
{
827
        CHANNEL = "gpio_a_pad_io[30]";
828
        EXPAND_STATUS = COLLAPSED;
829
        RADIX = Hexadecimal;
830
        TREE_INDEX = 6;
831
        TREE_LEVEL = 1;
832
        PARENT = 4;
833
}
834
 
835
DISPLAY_LINE
836
{
837
        CHANNEL = "gpio_a_pad_io[29]";
838
        EXPAND_STATUS = COLLAPSED;
839
        RADIX = Hexadecimal;
840
        TREE_INDEX = 7;
841
        TREE_LEVEL = 1;
842
        PARENT = 4;
843
}
844
 
845
DISPLAY_LINE
846
{
847
        CHANNEL = "gpio_a_pad_io[28]";
848
        EXPAND_STATUS = COLLAPSED;
849
        RADIX = Hexadecimal;
850
        TREE_INDEX = 8;
851
        TREE_LEVEL = 1;
852
        PARENT = 4;
853
}
854
 
855
DISPLAY_LINE
856
{
857
        CHANNEL = "gpio_a_pad_io[27]";
858
        EXPAND_STATUS = COLLAPSED;
859
        RADIX = Hexadecimal;
860
        TREE_INDEX = 9;
861
        TREE_LEVEL = 1;
862
        PARENT = 4;
863
}
864
 
865
DISPLAY_LINE
866
{
867
        CHANNEL = "gpio_a_pad_io[26]";
868
        EXPAND_STATUS = COLLAPSED;
869
        RADIX = Hexadecimal;
870
        TREE_INDEX = 10;
871
        TREE_LEVEL = 1;
872
        PARENT = 4;
873
}
874
 
875
DISPLAY_LINE
876
{
877
        CHANNEL = "gpio_a_pad_io[25]";
878
        EXPAND_STATUS = COLLAPSED;
879
        RADIX = Hexadecimal;
880
        TREE_INDEX = 11;
881
        TREE_LEVEL = 1;
882
        PARENT = 4;
883
}
884
 
885
DISPLAY_LINE
886
{
887
        CHANNEL = "gpio_a_pad_io[24]";
888
        EXPAND_STATUS = COLLAPSED;
889
        RADIX = Hexadecimal;
890
        TREE_INDEX = 12;
891
        TREE_LEVEL = 1;
892
        PARENT = 4;
893
}
894
 
895
DISPLAY_LINE
896
{
897
        CHANNEL = "gpio_a_pad_io[23]";
898
        EXPAND_STATUS = COLLAPSED;
899
        RADIX = Hexadecimal;
900
        TREE_INDEX = 13;
901
        TREE_LEVEL = 1;
902
        PARENT = 4;
903
}
904
 
905
DISPLAY_LINE
906
{
907
        CHANNEL = "gpio_a_pad_io[22]";
908
        EXPAND_STATUS = COLLAPSED;
909
        RADIX = Hexadecimal;
910
        TREE_INDEX = 14;
911
        TREE_LEVEL = 1;
912
        PARENT = 4;
913
}
914
 
915
DISPLAY_LINE
916
{
917
        CHANNEL = "gpio_a_pad_io[21]";
918
        EXPAND_STATUS = COLLAPSED;
919
        RADIX = Hexadecimal;
920
        TREE_INDEX = 15;
921
        TREE_LEVEL = 1;
922
        PARENT = 4;
923
}
924
 
925
DISPLAY_LINE
926
{
927
        CHANNEL = "gpio_a_pad_io[20]";
928
        EXPAND_STATUS = COLLAPSED;
929
        RADIX = Hexadecimal;
930
        TREE_INDEX = 16;
931
        TREE_LEVEL = 1;
932
        PARENT = 4;
933
}
934
 
935
DISPLAY_LINE
936
{
937
        CHANNEL = "gpio_a_pad_io[19]";
938
        EXPAND_STATUS = COLLAPSED;
939
        RADIX = Hexadecimal;
940
        TREE_INDEX = 17;
941
        TREE_LEVEL = 1;
942
        PARENT = 4;
943
}
944
 
945
DISPLAY_LINE
946
{
947
        CHANNEL = "gpio_a_pad_io[18]";
948
        EXPAND_STATUS = COLLAPSED;
949
        RADIX = Hexadecimal;
950
        TREE_INDEX = 18;
951
        TREE_LEVEL = 1;
952
        PARENT = 4;
953
}
954
 
955
DISPLAY_LINE
956
{
957
        CHANNEL = "gpio_a_pad_io[17]";
958
        EXPAND_STATUS = COLLAPSED;
959
        RADIX = Hexadecimal;
960
        TREE_INDEX = 19;
961
        TREE_LEVEL = 1;
962
        PARENT = 4;
963
}
964
 
965
DISPLAY_LINE
966
{
967
        CHANNEL = "gpio_a_pad_io[16]";
968
        EXPAND_STATUS = COLLAPSED;
969
        RADIX = Hexadecimal;
970
        TREE_INDEX = 20;
971
        TREE_LEVEL = 1;
972
        PARENT = 4;
973
}
974
 
975
DISPLAY_LINE
976
{
977
        CHANNEL = "gpio_a_pad_io[15]";
978
        EXPAND_STATUS = COLLAPSED;
979
        RADIX = Hexadecimal;
980
        TREE_INDEX = 21;
981
        TREE_LEVEL = 1;
982
        PARENT = 4;
983
}
984
 
985
DISPLAY_LINE
986
{
987
        CHANNEL = "gpio_a_pad_io[14]";
988
        EXPAND_STATUS = COLLAPSED;
989
        RADIX = Hexadecimal;
990
        TREE_INDEX = 22;
991
        TREE_LEVEL = 1;
992
        PARENT = 4;
993
}
994
 
995
DISPLAY_LINE
996
{
997
        CHANNEL = "gpio_a_pad_io[13]";
998
        EXPAND_STATUS = COLLAPSED;
999
        RADIX = Hexadecimal;
1000
        TREE_INDEX = 23;
1001
        TREE_LEVEL = 1;
1002
        PARENT = 4;
1003
}
1004
 
1005
DISPLAY_LINE
1006
{
1007
        CHANNEL = "gpio_a_pad_io[12]";
1008
        EXPAND_STATUS = COLLAPSED;
1009
        RADIX = Hexadecimal;
1010
        TREE_INDEX = 24;
1011
        TREE_LEVEL = 1;
1012
        PARENT = 4;
1013
}
1014
 
1015
DISPLAY_LINE
1016
{
1017
        CHANNEL = "gpio_a_pad_io[11]";
1018
        EXPAND_STATUS = COLLAPSED;
1019
        RADIX = Hexadecimal;
1020
        TREE_INDEX = 25;
1021
        TREE_LEVEL = 1;
1022
        PARENT = 4;
1023
}
1024
 
1025
DISPLAY_LINE
1026
{
1027
        CHANNEL = "gpio_a_pad_io[10]";
1028
        EXPAND_STATUS = COLLAPSED;
1029
        RADIX = Hexadecimal;
1030
        TREE_INDEX = 26;
1031
        TREE_LEVEL = 1;
1032
        PARENT = 4;
1033
}
1034
 
1035
DISPLAY_LINE
1036
{
1037
        CHANNEL = "gpio_a_pad_io[9]";
1038
        EXPAND_STATUS = COLLAPSED;
1039
        RADIX = Hexadecimal;
1040
        TREE_INDEX = 27;
1041
        TREE_LEVEL = 1;
1042
        PARENT = 4;
1043
}
1044
 
1045
DISPLAY_LINE
1046
{
1047
        CHANNEL = "gpio_a_pad_io[8]";
1048
        EXPAND_STATUS = COLLAPSED;
1049
        RADIX = Hexadecimal;
1050
        TREE_INDEX = 28;
1051
        TREE_LEVEL = 1;
1052
        PARENT = 4;
1053
}
1054
 
1055
DISPLAY_LINE
1056
{
1057
        CHANNEL = "gpio_a_pad_io[7]";
1058
        EXPAND_STATUS = COLLAPSED;
1059
        RADIX = Hexadecimal;
1060
        TREE_INDEX = 29;
1061
        TREE_LEVEL = 1;
1062
        PARENT = 4;
1063
}
1064
 
1065
DISPLAY_LINE
1066
{
1067
        CHANNEL = "gpio_a_pad_io[6]";
1068
        EXPAND_STATUS = COLLAPSED;
1069
        RADIX = Hexadecimal;
1070
        TREE_INDEX = 30;
1071
        TREE_LEVEL = 1;
1072
        PARENT = 4;
1073
}
1074
 
1075
DISPLAY_LINE
1076
{
1077
        CHANNEL = "gpio_a_pad_io[5]";
1078
        EXPAND_STATUS = COLLAPSED;
1079
        RADIX = Hexadecimal;
1080
        TREE_INDEX = 31;
1081
        TREE_LEVEL = 1;
1082
        PARENT = 4;
1083
}
1084
 
1085
DISPLAY_LINE
1086
{
1087
        CHANNEL = "gpio_a_pad_io[4]";
1088
        EXPAND_STATUS = COLLAPSED;
1089
        RADIX = Hexadecimal;
1090
        TREE_INDEX = 32;
1091
        TREE_LEVEL = 1;
1092
        PARENT = 4;
1093
}
1094
 
1095
DISPLAY_LINE
1096
{
1097
        CHANNEL = "gpio_a_pad_io[3]";
1098
        EXPAND_STATUS = COLLAPSED;
1099
        RADIX = Hexadecimal;
1100
        TREE_INDEX = 33;
1101
        TREE_LEVEL = 1;
1102
        PARENT = 4;
1103
}
1104
 
1105
DISPLAY_LINE
1106
{
1107
        CHANNEL = "gpio_a_pad_io[2]";
1108
        EXPAND_STATUS = COLLAPSED;
1109
        RADIX = Hexadecimal;
1110
        TREE_INDEX = 34;
1111
        TREE_LEVEL = 1;
1112
        PARENT = 4;
1113
}
1114
 
1115
DISPLAY_LINE
1116
{
1117
        CHANNEL = "gpio_a_pad_io[1]";
1118
        EXPAND_STATUS = COLLAPSED;
1119
        RADIX = Hexadecimal;
1120
        TREE_INDEX = 35;
1121
        TREE_LEVEL = 1;
1122
        PARENT = 4;
1123
}
1124
 
1125
DISPLAY_LINE
1126
{
1127
        CHANNEL = "gpio_a_pad_io[0]";
1128
        EXPAND_STATUS = COLLAPSED;
1129
        RADIX = Hexadecimal;
1130
        TREE_INDEX = 36;
1131
        TREE_LEVEL = 1;
1132
        PARENT = 4;
1133
}
1134
 
1135
DISPLAY_LINE
1136
{
1137
        CHANNEL = "divider 1116";
1138
        EXPAND_STATUS = COLLAPSED;
1139
        RADIX = Binary;
1140
        TREE_INDEX = 37;
1141
        TREE_LEVEL = 0;
1142
        IS_DIVIDER = ON;
1143
}
1144
 
1145
DISPLAY_LINE
1146
{
1147
        CHANNEL = "uart_srx_pad_i";
1148
        EXPAND_STATUS = COLLAPSED;
1149
        RADIX = Hexadecimal;
1150
        TREE_INDEX = 38;
1151
        TREE_LEVEL = 0;
1152
}
1153
 
1154
TIME_BAR
1155
{
1156
        TIME = 7700;
1157
        MASTER = TRUE;
1158
}
1159
;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.