OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [rtl/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [bench/] [full_system/] [wave.do] - Blame information for rev 21

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Line No. Rev Author Line
1 21 xianfeng
onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -format Logic /xsv_fpga_top/jtag_tdi
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add wave -noupdate -format Logic /xsv_fpga_top/jtag_tms
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add wave -noupdate -format Logic /xsv_fpga_top/jtag_tck
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add wave -noupdate -format Logic /xsv_fpga_top/jtag_tdo
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add wave -noupdate -format Logic /xsv_fpga_top/debug_select
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add wave -noupdate -divider {Top level signals}
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add wave -noupdate -format Logic /xsv_fpga_top/clk
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add wave -noupdate -format Logic /xsv_fpga_top/rstn
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add wave -noupdate -format Logic /xsv_fpga_top/rst_r
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add wave -noupdate -format Logic /xsv_fpga_top/wb_rst
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add wave -noupdate -format Logic /xsv_fpga_top/cpu_rst
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add wave -noupdate -divider {Top-level CPU dbg}
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_lss
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_is
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_wp
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_bp
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_dat_dbg
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_dat_risc
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_adr
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_ewt
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_stall
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_we
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_stb
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_ack
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add wave -noupdate -divider {CPU IWB}
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_clk_i
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_rst_i
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_err_i
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_rty_i
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/iwb_dat_i
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_cyc_o
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/iwb_adr_o
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_stb_o
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_we_o
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add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/iwb_sel_o
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/iwb_dat_o
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add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/iwb_cab_o
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add wave -noupdate -divider {DBG WB signals}
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/wb_dm_adr_o
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/wb_dm_dat_i
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/wb_dm_dat_o
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add wave -noupdate -format Literal /xsv_fpga_top/wb_dm_sel_o
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_we_o
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_stb_o
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_cyc_o
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_cab_o
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/wb_dm_err_i
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add wave -noupdate -divider {DBG WB BIU}
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/tck_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rst_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/data_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/data_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/addr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/strobe_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rd_wrn_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/err_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/word_size_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_clk_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_adr_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_dat_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_dat_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_cyc_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_stb_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_sel_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_we_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_cab_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_err_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_cti_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_bte_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/sel_reg
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/addr_reg
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/data_in_reg
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/data_out_reg
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wr_reg
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/str_sync
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_sync
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/err_reg
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_sync_tff1
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_sync_tff2
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_sync_tff2q
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/str_sync_wbff1
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/str_sync_wbff2
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/str_sync_wbff2q
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/data_o_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/rdy_sync_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/err_en
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/be_dec
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/start_toggle
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/swapped_data_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/swapped_data_out
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/wb_fsm_state
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_biu_i/next_fsm_state
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add wave -noupdate -divider {DBG WB Module}
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/tck_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/module_tdo_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/tdi_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/capture_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/shift_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/update_dr_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_register_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/module_select_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/top_inhibit_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/rst_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_clk_i
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_adr_o
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_dat_o
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add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_dat_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_cyc_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_stb_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_sel_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_we_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_cab_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/wb_err_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_cti_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/wb_bte_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/address_counter
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/bit_count
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/word_count
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/operation
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_out_shift_reg
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/internal_register_select
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/internal_reg_error
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/addr_sel
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/addr_ct_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/op_reg_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/bit_ct_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/bit_ct_rst
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/word_ct_sel
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/word_ct_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/out_reg_ld_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/out_reg_shift_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/out_reg_data_sel
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/tdo_output_sel
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/biu_strobe
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_clr
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_in_sel
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_shift_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/regsel_ld_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/intreg_ld_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/error_reg_en
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/biu_clr_err
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/word_count_zero
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/bit_count_max
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/module_cmd
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/biu_ready
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/biu_err
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/burst_instruction
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/intreg_instruction
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/intreg_write
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/rd_op
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_match
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/bit_count_32
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/word_size_bits
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/word_size_bytes
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/incremented_address
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_to_addr_counter
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_to_word_counter
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/decremented_word_count
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/address_data_in
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/count_data_in
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/operation_in
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_to_biu
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_from_biu
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/crc_data_out
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_data_in
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/crc_serial_out
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/reg_select_data
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/out_reg_data
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/data_from_internal_reg
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_wb/biu_rst
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/module_state
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_wb/module_next_state
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add wave -noupdate -divider {DBG Top}
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tck_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tdi_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tdo_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/rst_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/shift_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/pause_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/update_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/capture_dr_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/debug_select_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_clk_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_adr_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_dat_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_dat_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_cyc_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_stb_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_sel_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_we_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_cab_o
201
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/wb_err_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_cti_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/wb_bte_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_clk_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/cpu0_addr_o
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/cpu0_data_i
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/cpu0_data_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_bp_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_stall_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_stb_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_we_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_ack_i
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/cpu0_rst_o
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tdo_wb
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tdo_cpu0
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add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/tdo_cpu1
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/input_shift_reg
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add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/module_id_reg
219
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/select_inhibit
220
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/module_inhibit
221
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/select_cmd
222
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/module_id_in
223
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/module_selects
224
add wave -noupdate -divider {DBG CPU0 Module}
225
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/tck_i
226
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/module_tdo_o
227
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/tdi_i
228
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/capture_dr_i
229
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/shift_dr_i
230
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/update_dr_i
231
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_register_i
232
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/module_select_i
233
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/top_inhibit_o
234
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/rst_i
235
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_clk_i
236
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_addr_o
237
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_data_i
238
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_data_o
239
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_stb_o
240
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_we_o
241
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_ack_i
242
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_rst_o
243
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_bp_i
244
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/cpu_stall_o
245
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/address_counter
246
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/bit_count
247
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/word_count
248
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/operation
249
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_out_shift_reg
250
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/internal_register_select
251
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/internal_reg_status
252
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/addr_sel
253
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/addr_ct_en
254
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/op_reg_en
255
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/bit_ct_en
256
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/bit_ct_rst
257
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/word_ct_sel
258
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/word_ct_en
259
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/out_reg_ld_en
260
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/out_reg_shift_en
261
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/out_reg_data_sel
262
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/tdo_output_sel
263
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/biu_strobe
264
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_clr
265
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_en
266
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_in_sel
267
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_shift_en
268
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/regsel_ld_en
269
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/intreg_ld_en
270
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/word_count_zero
271
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/bit_count_max
272
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/module_cmd
273
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/biu_ready
274
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/burst_instruction
275
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/intreg_instruction
276
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/intreg_write
277
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/rd_op
278
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_match
279
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/bit_count_32
280
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/word_size_bits
281
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/address_increment
282
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/incremented_address
283
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_to_addr_counter
284
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_to_word_counter
285
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/decremented_word_count
286
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/address_data_in
287
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/count_data_in
288
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/operation_in
289
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_to_biu
290
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_from_biu
291
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_data_out
292
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_data_in
293
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/crc_serial_out
294
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/reg_select_data
295
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/out_reg_data
296
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/data_from_internal_reg
297
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/status_reg_wr
298
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/module_state
299
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/module_next_state
300
add wave -noupdate -divider {DBG CPU0 BIU}
301
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/tck_i
302
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rst_i
303
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/data_i
304
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/data_o
305
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/addr_i
306
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/strobe_i
307
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rd_wrn_i
308
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_o
309
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_clk_i
310
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_addr_o
311
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_data_i
312
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_data_o
313
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_stb_o
314
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_we_o
315
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_ack_i
316
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/addr_reg
317
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/data_in_reg
318
add wave -noupdate -format Literal /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/data_out_reg
319
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/wr_reg
320
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/str_sync
321
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_sync
322
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_sync_tff1
323
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_sync_tff2
324
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_sync_tff2q
325
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/str_sync_wbff1
326
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/str_sync_wbff2
327
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/str_sync_wbff2q
328
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/data_o_en
329
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/rdy_sync_en
330
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/start_toggle
331
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/cpu_fsm_state
332
add wave -noupdate -format Logic /xsv_fpga_top/dbg_top/i_dbg_cpu_or1k/or1k_biu_i/next_fsm_state
333
add wave -noupdate -divider {CPU debug unit}
334
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/clk
335
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/rst
336
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcpu_cycstb_i
337
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcpu_we_i
338
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcpu_adr_i
339
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcpu_dat_lsu
340
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcpu_dat_dc
341
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/icpu_cycstb_i
342
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/ex_freeze
343
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/branch_op
344
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/ex_insn
345
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/id_pc
346
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/spr_dat_npc
347
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/rf_dataw
348
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/du_dsr
349
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/du_stall
350
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/du_addr
351
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/du_dat_i
352
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/du_dat_o
353
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/du_read
354
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/du_write
355
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/du_except
356
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/du_hwbkpt
357
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/spr_cs
358
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/spr_write
359
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/spr_addr
360
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/spr_dat_i
361
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/spr_dat_o
362
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_stall_i
363
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_ewt_i
364
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_lss_o
365
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_is_o
366
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_wp_o
367
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_bp_o
368
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_stb_i
369
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_we_i
370
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_adr_i
371
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_dat_i
372
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dbg_dat_o
373
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_ack_o
374
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dmr1
375
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dmr2
376
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dsr
377
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/drr
378
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr0
379
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr1
380
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr2
381
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr3
382
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr4
383
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr5
384
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr6
385
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dvr7
386
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr0
387
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr1
388
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr2
389
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr3
390
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr4
391
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr5
392
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr6
393
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dcr7
394
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dwcr0
395
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/dwcr1
396
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dmr1_sel
397
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dmr2_sel
398
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dsr_sel
399
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/drr_sel
400
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr0_sel
401
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr1_sel
402
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr2_sel
403
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr3_sel
404
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr4_sel
405
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr5_sel
406
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr6_sel
407
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dvr7_sel
408
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr0_sel
409
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr1_sel
410
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr2_sel
411
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr3_sel
412
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr4_sel
413
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr5_sel
414
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr6_sel
415
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dcr7_sel
416
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dwcr0_sel
417
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dwcr1_sel
418
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_du/dbg_bp_r
419
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/except_stop
420
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/tbia_dat_o
421
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/tbim_dat_o
422
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/tbar_dat_o
423
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_du/tbts_dat_o
424
add wave -noupdate -divider {CPU SPRs}
425
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/clk
426
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/rst
427
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/flagforw
428
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/flag_we
429
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/flag
430
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/cyforw
431
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/cy_we
432
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/carry
433
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/addrbase
434
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/addrofs
435
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/dat_i
436
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/alu_op
437
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/branch_op
438
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/epcr
439
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/eear
440
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/esr
441
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/except_started
442
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/to_wbmux
443
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/epcr_we
444
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/eear_we
445
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/esr_we
446
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/pc_we
447
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/sr_we
448
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/to_sr
449
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/sr
450
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_cfgr
451
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_rf
452
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_npc
453
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_ppc
454
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_mac
455
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_pic
456
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_tt
457
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_pm
458
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_dmmu
459
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_immu
460
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_du
461
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_addr
462
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_dat_o
463
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_cs
464
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/spr_we
465
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_addr
466
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_dat_du
467
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_read
468
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_write
469
add wave -noupdate -format Literal -radix hexadecimal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_dat_cpu
470
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/write_spr
471
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/read_spr
472
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/cfgr_sel
473
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/rf_sel
474
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/npc_sel
475
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/ppc_sel
476
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/sr_sel
477
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/epcr_sel
478
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/eear_sel
479
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/esr_sel
480
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/sys_data
481
add wave -noupdate -format Logic /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/du_access
482
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/sprs_op
483
add wave -noupdate -format Literal /xsv_fpga_top/or1200_top/or1200_cpu/or1200_sprs/unqualified_cs
484
TreeUpdate [SetDefaultTree]
485
WaveRestoreCursors {{Cursor 1} {4278 ps} 0}
486
configure wave -namecolwidth 391
487
configure wave -valuecolwidth 100
488
configure wave -justifyvalue left
489
configure wave -signalnamewidth 0
490
configure wave -snapdistance 10
491
configure wave -datasetprefix 0
492
configure wave -rowmargin 4
493
configure wave -childrowmargin 2
494
configure wave -gridoffset 0
495
configure wave -gridperiod 1
496
configure wave -griddelta 40
497
configure wave -timeline 0
498
configure wave -timelineunits ps
499
update
500
WaveRestoreZoom {0 ps} {6180 ps}

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