OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [rtl/] [altera_ddr_ctrl/] [altera_ddr_pin_assignments.tcl] - Blame information for rev 12

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 xianfeng 
# -------------------------------------------------------------------------
2 
#
3 
# ALTMEMPHY v9.0 DDR SDRAM pin constraints script for altera_ddr
4 
#
5 
# Please run this script before compiling your design
6 
#
7 
# Directions: If your top level pin names do not match the default names,
8 
#             you should change the variables below to make the constraints
9 
#             match the specific pin names in your top level design.
10 
#
11 
#
12 
# Make your changes below this line
13 
# --------------------------------------------------------------------------
14 
 
15 
# Change sopc_mode value from NO to YES to create assignments that match the
16 
# SOPC Builder top level pin names
17 
if {![info exists sopc_mode]} {set sopc_mode NO}
18 
 
19 
# This is the name of your controller instance
20 
set instance_name ""
21 
 
22 
# This is the prefix for all pin names. Change it if you wish to choose
23 
# a prefix other than mem_
24 
if {![info exists pin_prefix]} {set pin_prefix "mem_"}
25 
 
26 
 
27 
# In SOPC builder, the pin names will be expanded as follow:
28 
#    Example: mem_cs_n_from_the_<your instance name>
29 
#
30 
# In standalone mode, the pin names will be expanded as follow:
31 
#    Example: mem_cs_n[0]
32 
 
33 
set mem_clk_pin_name ${pin_prefix}clk
34 
set mem_clk_CURRENT_STRENGTH_NEW "12MA"
35 
set mem_clk_IO_STANDARD "SSTL-2 CLASS I"
36 
 
37 
set mem_clk_n_pin_name ${pin_prefix}clk_n
38 
set mem_clk_n_CURRENT_STRENGTH_NEW "12MA"
39 
set mem_clk_n_IO_STANDARD "SSTL-2 CLASS I"
40 
 
41 
set mem_cs_n_pin_name ${pin_prefix}cs_n
42 
set mem_cs_n_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
43 
set mem_cs_n_IO_STANDARD "SSTL-2 CLASS I"
44 
 
45 
set mem_cke_pin_name ${pin_prefix}cke
46 
set mem_cke_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
47 
set mem_cke_IO_STANDARD "SSTL-2 CLASS I"
48 
 
49 
set mem_addr_pin_name ${pin_prefix}addr
50 
set mem_addr_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
51 
set mem_addr_IO_STANDARD "SSTL-2 CLASS I"
52 
 
53 
set mem_ba_pin_name ${pin_prefix}ba
54 
set mem_ba_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
55 
set mem_ba_IO_STANDARD "SSTL-2 CLASS I"
56 
 
57 
set mem_ras_n_pin_name ${pin_prefix}ras_n
58 
set mem_ras_n_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
59 
set mem_ras_n_IO_STANDARD "SSTL-2 CLASS I"
60 
 
61 
set mem_cas_n_pin_name ${pin_prefix}cas_n
62 
set mem_cas_n_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
63 
set mem_cas_n_IO_STANDARD "SSTL-2 CLASS I"
64 
 
65 
set mem_we_n_pin_name ${pin_prefix}we_n
66 
set mem_we_n_CURRENT_STRENGTH_NEW "MAXIMUM CURRENT"
67 
set mem_we_n_IO_STANDARD "SSTL-2 CLASS I"
68 
 
69 
set mem_dq_pin_name ${pin_prefix}dq
70 
set mem_dq_CURRENT_STRENGTH_NEW "12MA"
71 
set mem_dq_IO_STANDARD "SSTL-2 CLASS I"
72 
 
73 
set mem_dqs_pin_name ${pin_prefix}dqs
74 
set mem_dqs_CURRENT_STRENGTH_NEW "12MA"
75 
set mem_dqs_IO_STANDARD "SSTL-2 CLASS I"
76 
 
77 
set mem_dm_pin_name ${pin_prefix}dm
78 
set mem_dm_CURRENT_STRENGTH_NEW "12MA"
79 
set mem_dm_IO_STANDARD "SSTL-2 CLASS I"
80 
 
81 
 
82 
# Do not make any changes after this line
83 
# ------------------------------------------------
84 
 
85 
# This single_bit variable is to define whether a [0] index will be added at the end of a single-bit bus pin name
86 
# To not have indexing, replace [0] by "".
87 
set single_bit {[0]}
88 
 
89 
switch $sopc_mode {
90 
  YES {
91 
    set output_suffix _from_the_${instance_name}
92 
    set bidir_suffix _to_and_from_the_${instance_name}
93 
    set input_suffix _to_the_${instance_name}
94 
  }
95 
  default {
96 
    set output_suffix ""
97 
    set bidir_suffix ""
98 
    set input_suffix ""
99 
  }
100 
}
101 
 
102 
if {![info exists ::ppl_instance_name]} {set ::ppl_instance_name {}}
103 
 
104 
set mem_clk_pin_name ${::ppl_instance_name}${mem_clk_pin_name}${bidir_suffix}
105 
set mem_clk_n_pin_name ${::ppl_instance_name}${mem_clk_n_pin_name}${bidir_suffix}
106 
set mem_cs_n_pin_name ${::ppl_instance_name}${mem_cs_n_pin_name}${output_suffix}
107 
set mem_cke_pin_name ${::ppl_instance_name}${mem_cke_pin_name}${output_suffix}
108 
set mem_addr_pin_name ${::ppl_instance_name}${mem_addr_pin_name}${output_suffix}
109 
set mem_ba_pin_name ${::ppl_instance_name}${mem_ba_pin_name}${output_suffix}
110 
set mem_ras_n_pin_name ${::ppl_instance_name}${mem_ras_n_pin_name}${output_suffix}
111 
set mem_cas_n_pin_name ${::ppl_instance_name}${mem_cas_n_pin_name}${output_suffix}
112 
set mem_we_n_pin_name ${::ppl_instance_name}${mem_we_n_pin_name}${output_suffix}
113 
set mem_dq_pin_name ${::ppl_instance_name}${mem_dq_pin_name}${bidir_suffix}
114 
set mem_dqs_pin_name ${::ppl_instance_name}${mem_dqs_pin_name}${bidir_suffix}
115 
set mem_dm_pin_name ${::ppl_instance_name}${mem_dm_pin_name}${output_suffix}
116 
 
117 
set_instance_assignment -name IO_STANDARD "${mem_clk_IO_STANDARD}" -to ${mem_clk_pin_name}${single_bit}
118 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_clk_CURRENT_STRENGTH_NEW}" -to ${mem_clk_pin_name}${single_bit}
119 
set_instance_assignment -name IO_STANDARD "${mem_clk_n_IO_STANDARD}" -to ${mem_clk_n_pin_name}${single_bit}
120 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_clk_n_CURRENT_STRENGTH_NEW}" -to ${mem_clk_n_pin_name}${single_bit}
121 
set_instance_assignment -name IO_STANDARD "${mem_cs_n_IO_STANDARD}" -to ${mem_cs_n_pin_name}${single_bit}
122 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_cs_n_CURRENT_STRENGTH_NEW}" -to ${mem_cs_n_pin_name}${single_bit}
123 
set_instance_assignment -name IO_STANDARD "${mem_cke_IO_STANDARD}" -to ${mem_cke_pin_name}${single_bit}
124 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_cke_CURRENT_STRENGTH_NEW}" -to ${mem_cke_pin_name}${single_bit}
125 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[0]
126 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[0]
127 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[1]
128 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[1]
129 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[2]
130 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[2]
131 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[3]
132 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[3]
133 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[4]
134 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[4]
135 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[5]
136 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[5]
137 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[6]
138 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[6]
139 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[7]
140 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[7]
141 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[8]
142 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[8]
143 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[9]
144 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[9]
145 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[10]
146 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[10]
147 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[11]
148 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[11]
149 
set_instance_assignment -name IO_STANDARD "${mem_addr_IO_STANDARD}" -to ${mem_addr_pin_name}[12]
150 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_addr_CURRENT_STRENGTH_NEW}" -to ${mem_addr_pin_name}[12]
151 
set_instance_assignment -name IO_STANDARD "${mem_ba_IO_STANDARD}" -to ${mem_ba_pin_name}[0]
152 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_ba_CURRENT_STRENGTH_NEW}" -to ${mem_ba_pin_name}[0]
153 
set_instance_assignment -name IO_STANDARD "${mem_ba_IO_STANDARD}" -to ${mem_ba_pin_name}[1]
154 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_ba_CURRENT_STRENGTH_NEW}" -to ${mem_ba_pin_name}[1]
155 
set_instance_assignment -name IO_STANDARD "${mem_ras_n_IO_STANDARD}" -to ${mem_ras_n_pin_name}
156 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_ras_n_CURRENT_STRENGTH_NEW}" -to ${mem_ras_n_pin_name}
157 
set_instance_assignment -name IO_STANDARD "${mem_cas_n_IO_STANDARD}" -to ${mem_cas_n_pin_name}
158 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_cas_n_CURRENT_STRENGTH_NEW}" -to ${mem_cas_n_pin_name}
159 
set_instance_assignment -name IO_STANDARD "${mem_we_n_IO_STANDARD}" -to ${mem_we_n_pin_name}
160 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_we_n_CURRENT_STRENGTH_NEW}" -to ${mem_we_n_pin_name}
161 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[0]
162 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[0]
163 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[1]
164 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[1]
165 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[2]
166 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[2]
167 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[3]
168 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[3]
169 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[4]
170 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[4]
171 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[5]
172 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[5]
173 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[6]
174 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[6]
175 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[7]
176 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[7]
177 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[8]
178 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[8]
179 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[9]
180 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[9]
181 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[10]
182 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[10]
183 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[11]
184 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[11]
185 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[12]
186 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[12]
187 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[13]
188 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[13]
189 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[14]
190 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[14]
191 
set_instance_assignment -name IO_STANDARD "${mem_dq_IO_STANDARD}" -to ${mem_dq_pin_name}[15]
192 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dq_CURRENT_STRENGTH_NEW}" -to ${mem_dq_pin_name}[15]
193 
set_instance_assignment -name IO_STANDARD "${mem_dqs_IO_STANDARD}" -to ${mem_dqs_pin_name}[0]
194 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dqs_CURRENT_STRENGTH_NEW}" -to ${mem_dqs_pin_name}[0]
195 
set_instance_assignment -name IO_STANDARD "${mem_dqs_IO_STANDARD}" -to ${mem_dqs_pin_name}[1]
196 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dqs_CURRENT_STRENGTH_NEW}" -to ${mem_dqs_pin_name}[1]
197 
set_instance_assignment -name IO_STANDARD "${mem_dm_IO_STANDARD}" -to ${mem_dm_pin_name}[0]
198 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dm_CURRENT_STRENGTH_NEW}" -to ${mem_dm_pin_name}[0]
199 
set_instance_assignment -name IO_STANDARD "${mem_dm_IO_STANDARD}" -to ${mem_dm_pin_name}[1]
200 
set_instance_assignment -name CURRENT_STRENGTH_NEW "${mem_dm_CURRENT_STRENGTH_NEW}" -to ${mem_dm_pin_name}[1]
201 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[0]
202 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[1]
203 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[2]
204 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[3]
205 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[4]
206 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[5]
207 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[6]
208 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[7]
209 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[8]
210 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[9]
211 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[10]
212 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[11]
213 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[12]
214 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[13]
215 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[14]
216 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dq_pin_name}[15]
217 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dqs_pin_name}[0]
218 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dqs_pin_name}[1]
219 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dm_pin_name}[0]
220 
set_instance_assignment -name OUTPUT_ENABLE_GROUP "711165762" -to ${mem_dm_pin_name}[1]
221 
set_instance_assignment -name CKN_CK_PAIR ON -from ${mem_clk_n_pin_name}${single_bit} -to ${mem_clk_pin_name}${single_bit}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.