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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sim/] [bin/] [wave_signals.sav] - Blame information for rev 12

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Line No. Rev Author Line
1 12 xianfeng 
[size] 1440 877
2 
[pos] 1279 28
3 
*-26.260912 1413940000 1137979000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
4 
[treeopen] CPUboard_tb.
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[treeopen] CPUboard_tb.soc0.
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[treeopen] CPUboard_tb.soc0.uart_top.
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[treeopen] CPUboard_tb.soc0.uart_top.regs.
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[treeopen] CPUboard_tb.soc0.uart_top.regs.transmitter.
9 
@28
10 
CPUboard_tb.clk
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@200
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-=====CPUBoard_tb=====
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@28
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CPUboard_tb.rstn
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@200
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-
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@22
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CPUboard_tb.gpio_pad_io[31:0]
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@200
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-===== SOC TOP =====
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@28
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CPUboard_tb.soc0.wb_clk_pad_i
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CPUboard_tb.soc0.wb_rst_pad_i
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CPUboard_tb.soc0.or1k_clmode_i[1:0]
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@22
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CPUboard_tb.soc0.pic_ints[19:0]
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@200
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-OR1k Instruction
29 
@28
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CPUboard_tb.soc0.or1k_iwb_stb_o
31 
CPUboard_tb.soc0.or1k_iwb_we_o
32 
CPUboard_tb.soc0.or1k_iwb_cyc_o
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CPUboard_tb.soc0.or1k_iwb_ack_i
34 
@22
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CPUboard_tb.soc0.or1k_iwb_sel_o[3:0]
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CPUboard_tb.soc0.or1k_iwb_adr_o[31:0]
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CPUboard_tb.soc0.or1k_iwb_dat_i[31:0]
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CPUboard_tb.soc0.or1k_iwb_dat_o[31:0]
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@28
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CPUboard_tb.soc0.or1k_iwb_err_i
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CPUboard_tb.soc0.or1k_iwb_rty_i
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@200
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-OR1k Data
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@28
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CPUboard_tb.soc0.or1k_dwb_stb_o
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CPUboard_tb.soc0.or1k_dwb_we_o
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CPUboard_tb.soc0.or1k_dwb_ack_i
48 
CPUboard_tb.soc0.or1k_dwb_cyc_o
49 
@22
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CPUboard_tb.soc0.or1k_dwb_sel_o[3:0]
51 
CPUboard_tb.soc0.or1k_dwb_adr_o[31:0]
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CPUboard_tb.soc0.or1k_dwb_dat_i[31:0]
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CPUboard_tb.soc0.or1k_dwb_dat_o[31:0]
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@28
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CPUboard_tb.soc0.or1k_dwb_err_i
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CPUboard_tb.soc0.or1k_dwb_rty_i
57 
@200
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-
59 
-=====Flash_top=====
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@28
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CPUboard_tb.soc0.flash_top.wb_clk_i
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CPUboard_tb.soc0.flash_top.wb_rst_i
63 
@22
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CPUboard_tb.soc0.flash_top.a[20:0]
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CPUboard_tb.soc0.flash_top.wb_sel_i[3:0]
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@28
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CPUboard_tb.soc0.flash_top.wb_stb_i
68 
CPUboard_tb.soc0.flash_top.wb_cyc_i
69 
CPUboard_tb.soc0.flash_top.wb_we_i
70 
CPUboard_tb.soc0.flash_top.wb_ack_o
71 
@22
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CPUboard_tb.soc0.flash_top.wb_adr_i[31:0]
73 
CPUboard_tb.soc0.flash_top.adr[31:0]
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CPUboard_tb.soc0.flash_top.wb_dat_i[31:0]
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CPUboard_tb.soc0.flash_top.wb_dat_o[31:0]
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@28
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CPUboard_tb.soc0.flash_top.a_oe
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CPUboard_tb.soc0.flash_top.cen
79 
@22
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CPUboard_tb.soc0.flash_top.d[7:0]
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@28
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CPUboard_tb.soc0.flash_top.delay[1:0]
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@22
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CPUboard_tb.soc0.flash_top.fflash[31:0]
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@28
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CPUboard_tb.soc0.flash_top.flash_rstn
87 
CPUboard_tb.soc0.flash_top.oen
88 
CPUboard_tb.soc0.flash_top.rdy
89 
CPUboard_tb.soc0.flash_top.wb_err
90 
CPUboard_tb.soc0.flash_top.wb_err_o
91 
CPUboard_tb.soc0.flash_top.wen
92 
@200
93 
-
94 
-=====uart_top=====
95 
@22
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CPUboard_tb.soc0.wb_us_adr_i[31:0]
97 
CPUboard_tb.soc0.wb_us_sel_i[3:0]
98 
@28
99 
CPUboard_tb.soc0.wb_us_stb_i
100 
CPUboard_tb.soc0.wb_us_cyc_i
101 
CPUboard_tb.soc0.wb_us_we_i
102 
CPUboard_tb.soc0.wb_us_ack_o
103 
@22
104 
CPUboard_tb.soc0.wb_us_dat_i[31:0]
105 
CPUboard_tb.soc0.wb_us_dat_o[31:0]
106 
@200
107 
-
108 
@22
109 
CPUboard_tb.soc0.uart_top.lcr[7:0]
110 
CPUboard_tb.soc0.uart_top.lsr[7:0]
111 
CPUboard_tb.soc0.uart_top.mcr[4:0]
112 
CPUboard_tb.soc0.uart_top.msr[7:0]
113 
@200
114 
-
115 
@22
116 
CPUboard_tb.soc0.uart_top.wb_dat8_i[7:0]
117 
@23
118 
CPUboard_tb.soc0.uart_top.wb_dat8_o[7:0]
119 
@22
120 
CPUboard_tb.soc0.uart_top.regs.transmitter.fifo_tx.count[4:0]
121 
CPUboard_tb.soc0.uart_top.regs.transmitter.fifo_tx.data_out[7:0]
122 
@28
123 
CPUboard_tb.soc0.uart_top.srx_pad_i
124 
CPUboard_tb.soc0.uart_top.stx_pad_o
125 
@200
126 
-=====mem_if=====
127 
@28
128 
CPUboard_tb.soc0.mc_clk_pad_i
129 
@22
130 
CPUboard_tb.soc0.mem_if_wb_sel_i[3:0]
131 
@28
132 
CPUboard_tb.soc0.mem_if_wb_err_o
133 
CPUboard_tb.soc0.mem_if_wb_stb_i
134 
CPUboard_tb.soc0.mem_if_wb_cyc_i
135 
CPUboard_tb.soc0.mem_if_wb_ack_o
136 
@22
137 
CPUboard_tb.soc0.mem_if_wb_addr_i[31:0]
138 
CPUboard_tb.soc0.mem_if_wb_data_i[31:0]
139 
CPUboard_tb.soc0.mem_if_wb_data_o[31:0]
140 
@28
141 
CPUboard_tb.soc0.mem_if_wb_we_i
142 
@200
143 
-
144 
@22
145 
CPUboard_tb.soc0.mem_adr_pad_o[12:0]
146 
@28
147 
CPUboard_tb.soc0.mem_dat_pad_oe
148 
@22
149 
CPUboard_tb.soc0.mem_dat_pad_i[31:0]
150 
CPUboard_tb.soc0.mem_dat_pad_o[31:0]
151 
CPUboard_tb.soc0.mem_dat_pad_io[31:0]
152 
CPUboard_tb.soc0.mc_addr_wire_o[23:0]
153 
@28
154 
CPUboard_tb.soc0.mem_ba_pad_o[1:0]
155 
CPUboard_tb.soc0.mem_cas_pad_o
156 
CPUboard_tb.soc0.mem_cke_pad_o
157 
CPUboard_tb.soc0.mem_con_pad_oe
158 
CPUboard_tb.soc0.mem_cs_pad_o
159 
@22
160 
CPUboard_tb.soc0.mem_csi_pad_o[7:0]
161 
CPUboard_tb.soc0.mem_dqm_pad_o[3:0]
162 
@28
163 
CPUboard_tb.soc0.mem_oe_pad_o_
164 
CPUboard_tb.soc0.mem_ras_pad_o
165 
CPUboard_tb.soc0.mem_we_pad_o
166 
@200
167 
-
168 
@22
169 
CPUboard_tb.mem_adr_pad_o[12:0]
170 
@28
171 
CPUboard_tb.mem_ba_pad_o[1:0]
172 
CPUboard_tb.mem_cas_pad_o
173 
CPUboard_tb.mem_cke_pad_o
174 
CPUboard_tb.mem_cs_pad_o
175 
@22
176 
CPUboard_tb.mem_dat_pad_io[31:0]
177 
CPUboard_tb.mem_dqm_pad_o[3:0]
178 
@28
179 
CPUboard_tb.mem_ras_pad_o
180 
CPUboard_tb.mem_we_pad_o

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