URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [orpmon/] [ram.ld] - Blame information for rev 20

Details | Compare with Previous | View Log


MEMORY
        {
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000
        flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000
        }
 
SECTIONS
{
        .vectors :
        {
        *(.crc)
        *(.vectors)
        } > vectors
 
        .text :
        {
        _text_begin = .;
        *(.text)
        _text_end = .;
        } > ram
 
        .mytext :
        {
        *(.mytext)
        _fprog_addr = .;
        . += 0x500;
        } > ram
 
        .data :
        AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))
        {
        *(.data)
        } > ram
 
        .rodata :
        {
        *(.rodata)
        *(.rodata.*)
        } > ram
 
        .bss :
        {
        *(.bss)
        } > ram
 
        .stack :
        {
        *(.stack)
        _src_addr = .;
        } > ram
 
        . = 0xf0000100;
 
        .monitor ALIGN(0x40000) :
        {
        *(.monitor)
        } > flash
 
        . += 0x100000;
 
        .config ALIGN(0x40000) :
        {
        _cfg_start = .;
        *(.config)
        _cfg_end = .;
        } > flash
}

Line No.	Rev	Author	Line
1	20	xianfeng	`MEMORY`
2			`{`
3			`vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000`
4			`ram : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000`
5			`flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000`
6			`}`
7
8			`SECTIONS`
9			`{`
10			`.vectors :`
11			`{`
12			`*(.crc)`
13			`*(.vectors)`
14			`} > vectors`
15
16			`.text :`
17			`{`
18			`_text_begin = .;`
19			`*(.text)`
20			`_text_end = .;`
21			`} > ram`
22
23			`.mytext :`
24			`{`
25			`*(.mytext)`
26			`_fprog_addr = .;`
27			`. += 0x500;`
28			`} > ram`
29
30			`.data :`
31			`AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))`
32			`{`
33			`*(.data)`
34			`} > ram`
35
36			`.rodata :`
37			`{`
38			`*(.rodata)`
39			`(.rodata.)`
40			`} > ram`
41
42			`.bss :`
43			`{`
44			`*(.bss)`
45			`} > ram`
46
47			`.stack :`
48			`{`
49			`*(.stack)`
50			`_src_addr = .;`
51			`} > ram`
52
53			`. = 0xf0000100;`
54
55			`.monitor ALIGN(0x40000) :`
56			`{`
57			`*(.monitor)`
58			`} > flash`
59
60			`. += 0x100000;`
61
62			`.config ALIGN(0x40000) :`
63			`{`
64			`_cfg_start = .;`
65			`*(.config)`
66			`_cfg_end = .;`
67			`} > flash`
68			`}`

Browse

Tools

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [orpmon/] [ram.ld] - Blame information for rev 20