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Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [sd_boot_loader/] [main.c] - Blame information for rev 13

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Line No. Rev Author Line
1 12 xianfeng 
 /*
2 
 * SD/MMC card bootloader for OR1k SoC
3 
 *
4 
 * Copyright (c) 2008 by:
5 13 xianfeng 
 *      Xianfeng Zeng <xianfeng.zeng@gmail.com, Xianfeng.zeng@SierraAtlantic.com>
6 12 xianfeng 
 *
7 
 * This program is free software; you can redistribute it and/or modify
8 
 * it under the terms of the BSD Licence, GNU General Public License
9 
 * as published by the Free Software Foundation; either version 2 of the
10 
 * License, or (at your option) any later version
11 
 *
12 
 * ChangeLog:
13 
 *      2009-10-05 12:56:55   xzeng
14 
 *          Init.
15 
 *
16 
 */
17 
 
18 
 
19 
#define INCLUDED_FROM_C_FILE
20 
 
21 
#include "orsocdef.h"
22 
#include "board.h"
23 
 
24 
 
25 
#define DEBUG 1
26 
 
27 
#define barrier() __asm__ __volatile__("": : :"memory")
28 
 
29 
#ifdef DEBUG
30 
void putc(int c)
31 
{
32 
        while ( 0x20 != (REG8(UART_BASE_ADD+5) & 0x20) )
33 
                ;
34 
 
35 
        REG8(UART_BASE_ADD) = c;
36 
}
37 
 
38 
void print(unsigned char *c)
39 
{
40 
        uint32 i;
41 
 
42 
        if (c == NULL)
43 
                return;
44 
 
45 
        for (i = 0; c[i] != 0; i++) {
46 
                putc(c[i]);
47 
        }
48 
}
49 
 
50 
void print32bit (long unsigned int val)
51 
{
52 
  int i;
53 
  unsigned long int myNibble;
54 
  char myChar;
55 
 
56 
  for (i=0;i<8;i++) {
57 
    myNibble =  (val >> 28) & 0xfUL;
58 
    if (myNibble <= 0x9)
59 
      myChar = (char) myNibble + 0x30;
60 
    else
61 
      myChar = (char) myNibble + 0x37;
62 
    putc (myChar);
63 
    val = val << 4;
64 
  }
65 
  putc ('\n');
66 
  putc ('\r');
67 
}
68 
 
69 
 
70 
#else
71 
#define putc(a)
72 
#define print(a)
73 
#endif
74 
 
75 
 
76 
void do_sleep()
77 
{
78 
        uint32 i;
79 
        for (i = 0; i < 200000; i++)
80 
                ;
81 
}
82 
 
83 
void do_sleep2()
84 
{
85 
        uint32 i;
86 
        for (i = 0; i < 1000; i++)
87 
                ;
88 
}
89 
 
90 
/******************************************************************************/
91 
/*                           G P I O   W  R I T E                             */
92 
/******************************************************************************/
93 
 
94 
// Write to the GPIO (32 bits)
95 
 
96 
void GPIO_Write(uint32 GPIO_data)
97 
{
98 
   REG32(GPIO_BASE + RGPIO_OUT) = GPIO_data;
99 
}
100 
 
101 
 
102 
/******************************************************************************/
103 
/*                           F O R   s p i M A S T E R                        */
104 
/******************************************************************************/
105 
//Initialize
106 
int spiMaster_init()
107 
{
108 
        uint8 data;
109 
        int   i;
110 
 
111 
        REG8(SD_BASE_ADD + SD_TX_FIFO_CONTROL_REG) = 0x10;
112 
 
113 
        for (i = 0; i < 5; i++) {
114 
                REG8(SD_BASE_ADD + SD_TRANS_TYPE_REG) = SD_INIT_SD;
115 
                REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 1; // TRANS_START;
116 
 
117 
                do_sleep();
118 
 
119 
                while (REG8(SD_BASE_ADD + SD_TRANS_STS_REG) & 0x1) { // exit while !TRABS_BUSY
120 
                        ;
121 
                }
122 
 
123 
                data = REG8(SD_BASE_ADD + SD_TRANS_ERROR_REG) & 0x3;
124 
 
125 
                if (data == 0)
126 
                        return data;
127 
        }
128 
        return data;
129 
}
130 
 
131 
unsigned char data[512];
132 
 
133 
int copy_sd2ddr(void)
134 
{
135 
 
136 
        int i, j;
137 
        uint8 data;
138 
        unsigned char transError;
139 
 
140 
        uint32 blockCnt;
141 
        uint32 numBlocks = 2 * 1024 * 10; // How mang blocks will be copied
142 
 
143 
        uint32 ddr_offset = 0;
144 
 
145 
        print("Start copying SD image to DDR SDRAM...\n\r");
146 
        print("Blocks:");
147 
        print32bit((long unsigned int)numBlocks);
148 
 
149 
        for (blockCnt = 0; blockCnt < numBlocks; blockCnt++) {
150 
                REG8(SD_BASE_ADD + SD_ADDR_7_0_REG)   = 0;
151 
                REG8(SD_BASE_ADD + SD_ADDR_15_8_REG)  = (unsigned char) ((ddr_offset >> 8) & 0xff);
152 
                REG8(SD_BASE_ADD + SD_ADDR_23_16_REG) = (unsigned char) ((ddr_offset >> 16) & 0xff);
153 
                REG8(SD_BASE_ADD + SD_ADDR_31_24_REG) = (unsigned char) ((ddr_offset >> 24) & 0xff);
154 
 
155 
 
156 
                REG8(SD_BASE_ADD + SD_TRANS_TYPE_REG) = SD_RW_READ_SD_BLOCK;
157 
                REG8(SD_BASE_ADD + SD_RX_FIFO_CONTROL_REG) = 0x1; // Clean the RX FIFO
158 
                REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 0x1; //TRANS_START
159 
                while (REG8(SD_BASE_ADD + SD_TRANS_STS_REG) & 0x1) { // exit while !TRABS_BUSY
160 
                        ;
161 
                }
162 
 
163 
                transError = REG8(SD_BASE_ADD + SD_TRANS_ERROR_REG) & 0xc;
164 
                if ( transError == SD_READ_NO_ERROR) {
165 
                        for (i = 0; i < 512; i++) {
166 
                                data = REG8(SD_BASE_ADD + SD_RX_FIFO_DATA_REG) ;
167 
                                REG8(DDR_SDRAM_BASE_ADDR + ddr_offset + i) = data ;
168 
//                              print32bit((long unsigned int)data);
169 
                        }
170 
                        if ((blockCnt % 0x40) == 0) {
171 
                                putc('.');
172 
                                j++;
173 
                        }
174 
                        if (j == 20) {
175 
                                j = 0;
176 
                                print("\n\r");
177 
                        }
178 
 
179 
                        ddr_offset += 512;
180 
                } else {
181 
                        putc('R');
182 
                        j++;
183 
                        if (j == 20) {
184 
                                j = 0;
185 
                                print("\n\r");
186 
                        }
187 
                        spiMaster_init(); // Init again and retry
188 
                        blockCnt--; // read the same block again
189 
                }
190 
        }
191 
 
192 
        print("\r\nSD Copy Done!\n\r");
193 
}
194 
 
195 
 
196 
/******************************************************************************/
197 
/*                        TEST EXTERNAL DDR SDRAM                             */
198 
/******************************************************************************/
199 
 
200 
void ddr_sdram_sample_test()
201 
{
202 
        uint32 int32;
203 
        uint16 int16;
204 
        uint8  int8;
205 
        int    i;
206 
 
207 
        REG32(DDR_SDRAM_BASE_ADDR) = 0x12345678;
208 
        int32 = REG32(DDR_SDRAM_BASE_ADDR);
209 
 
210 
        REG16(DDR_SDRAM_BASE_ADDR + 10) = 0x55aa;
211 
        int16 = REG16(DDR_SDRAM_BASE_ADDR + 10);
212 
 
213 
        REG8(DDR_SDRAM_BASE_ADDR + 20) = 0x5a;
214 
        int8 = REG8(DDR_SDRAM_BASE_ADDR + 20);
215 
 
216 
        if (REG8(DDR_SDRAM_BASE_ADDR + 20)  != 0x5a)
217 
                print ("DDR SDRAM accesses short type Error:20!\n\r");
218 
 
219 
        REG8(DDR_SDRAM_BASE_ADDR + 100) = 0x12;
220 
        REG8(DDR_SDRAM_BASE_ADDR + 101) = 0x34;
221 
        REG8(DDR_SDRAM_BASE_ADDR + 102) = 0x56;
222 
        REG8(DDR_SDRAM_BASE_ADDR + 103) = 0x78;
223 
 
224 
        int32 = REG32(DDR_SDRAM_BASE_ADDR + 100);
225 
 
226 
        if (REG8(DDR_SDRAM_BASE_ADDR + 100)  != 0x12)
227 
                print ("DDR SDRAM accesses char type Error:100!\n\r");
228 
        if (REG8(DDR_SDRAM_BASE_ADDR + 101)  != 0x34)
229 
                print ("DDR SDRAM accesses char type Error:101!\n\r");
230 
        if (REG8(DDR_SDRAM_BASE_ADDR + 102)  != 0x56)
231 
                print ("DDR SDRAM accesses char type Error:102!\n\r");
232 
        if (REG8(DDR_SDRAM_BASE_ADDR + 103)  != 0x78)
233 
                print ("DDR SDRAM accesses char type Error:103!\n\r");
234 
 
235 
        for (i=0;i<64;i++) {
236 
                REG8(DDR_SDRAM_BASE_ADDR + i) = i;
237 
        }
238 
 
239 
        for (i=0;i<64;i++) {
240 
                REG8(0x3900+i) = REG8(DDR_SDRAM_BASE_ADDR + i);
241 
        }
242 
 
243 
        print ("DDR SDRAM sample test done.\n\r");
244 
}
245 
 
246 
 
247 
/*$$EXTERNAL EXEPTIONS*/
248 
/******************************************************************************/
249 
/*                  E X T E R N A L   E X E P T I O N S                       */
250 
/******************************************************************************/
251 
 
252 
void external_exeption()
253 
{
254 
  REG uint8 i;
255 
  REG uint32 PicSr,sr;
256 
}
257 
 
258 
 
259 
/*$$MAIN*/
260 
/******************************************************************************/
261 
/*                                                                            */
262 
/*                       M A I N   P R O G R A M                              */
263 
/*                                                                            */
264 
/******************************************************************************/
265 
 
266 
void Start()
267 
{
268 
  uint32 i;
269 
  uint8  str[9];
270 
 
271 
  // Configure GPIO
272 
  REG32(GPIO_BASE + RGPIO_OE)   = 0xff;  // bit0-7 = outputs, bit8-31 = inputs
273 
  REG32(GPIO_BASE + RGPIO_INTE) = 0x0;   // Disable interrupts from GPIO
274 
 
275 
  print("\n\r\n\t");
276 
  print("==OpenRisc 1200 SOC==\n\r\n");
277 
  GPIO_Write(~0x0);
278 
 
279 
  print("\n\r");
280 
 
281 
  print("SD Card Bootloader, v0.1\n\r");
282 13 xianfeng 
  print("Xianfeng Zeng, 2009 SA\n\r");
283 
  print("Xianfeng@opencores.org\n\r");
284 
  print("http://www.opencores.org/project,or1k_soc_on_altera_embedded_dev_kit\n\r");
285 12 xianfeng 
 
286 
  print("\n\r");
287 
 
288 
  print("System Clock: 30MHz\n\r\n");
289 
 
290 
  print("DDR SDRAM Base Address: 0x00000000 - 32MB\n\r");
291 
  print("Ethernet Base Address:  0x20000000  IRQ 4\n\r");
292 
  print("UART Base Address:      0x30000000  IRQ 2\n\r");
293 
  print("GPIO Base Address:      0x40000000  IRQ 3\n\r");
294 
  print("SD Card Base Address:   0x50000000\n\r");
295 
  print("SRAM Base Address:      0xF0000000 - 16KB\n\r");
296 
  print("\r\n\n");
297 
 
298 
 
299 
  print("Init SD Card:");
300 
  if (spiMaster_init() == 0) {
301 
        print("Passed!\n\r");
302 
  } else {
303 
        print("Failed!\n\r");
304 
  }
305 
 
306 
  ddr_sdram_sample_test();
307 
  copy_sd2ddr();
308 
 
309 
  GPIO_Write(~0x1);
310 
 
311 
  print("\n\r");
312 
 
313 
  print("Jump to DDR SDRAM: 0x100\n\r");
314 
  jumpToRAM();
315 
 
316 
  print("Should not get here!!:\n\r");
317 
  while(TRUE) {
318 
        do_sleep();
319 
        putc('.');
320 
        GPIO_Write(~0x0);  // Test finished
321 
        do_sleep();
322 
        GPIO_Write(~0x1);
323 
        do_sleep();
324 
        GPIO_Write(~0x2);
325 
        do_sleep();
326 
        GPIO_Write(~0x4);
327 
        do_sleep();
328 
        GPIO_Write(~0x8);
329 
 
330 
        if (i == 39) {
331 
                print("\n\r");
332 
                i = 0;
333 
        } else
334 
                i++;
335 
  }
336 
}
337 
 

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