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Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [sd_boot_loader/] [main.c] - Blame information for rev 17

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Line No. Rev Author Line
1 12 xianfeng 
 /*
2 
 * SD/MMC card bootloader for OR1k SoC
3 
 *
4 
 * Copyright (c) 2008 by:
5 13 xianfeng 
 *      Xianfeng Zeng <xianfeng.zeng@gmail.com, Xianfeng.zeng@SierraAtlantic.com>
6 12 xianfeng 
 *
7 
 * This program is free software; you can redistribute it and/or modify
8 
 * it under the terms of the BSD Licence, GNU General Public License
9 
 * as published by the Free Software Foundation; either version 2 of the
10 
 * License, or (at your option) any later version
11 
 *
12 
 * ChangeLog:
13 
 *      2009-10-05 12:56:55   xzeng
14 
 *          Init.
15 
 *
16 
 */
17 
 
18 
 
19 
#define INCLUDED_FROM_C_FILE
20 
 
21 
#include "orsocdef.h"
22 
#include "board.h"
23 
 
24 
 
25 
#define DEBUG 1
26 
 
27 
#define barrier() __asm__ __volatile__("": : :"memory")
28 
 
29 
#ifdef DEBUG
30 
void putc(int c)
31 
{
32 
        while ( 0x20 != (REG8(UART_BASE_ADD+5) & 0x20) )
33 
                ;
34 
 
35 
        REG8(UART_BASE_ADD) = c;
36 
}
37 
 
38 
void print(unsigned char *c)
39 
{
40 
        uint32 i;
41 
 
42 
        if (c == NULL)
43 
                return;
44 
 
45 
        for (i = 0; c[i] != 0; i++) {
46 
                putc(c[i]);
47 
        }
48 
}
49 
 
50 
void print32bit (long unsigned int val)
51 
{
52 
  int i;
53 
  unsigned long int myNibble;
54 
  char myChar;
55 
 
56 
  for (i=0;i<8;i++) {
57 
    myNibble =  (val >> 28) & 0xfUL;
58 
    if (myNibble <= 0x9)
59 
      myChar = (char) myNibble + 0x30;
60 
    else
61 
      myChar = (char) myNibble + 0x37;
62 
    putc (myChar);
63 
    val = val << 4;
64 
  }
65 
  putc ('\n');
66 
  putc ('\r');
67 
}
68 
 
69 
 
70 
#else
71 
#define putc(a)
72 
#define print(a)
73 
#endif
74 
 
75 
 
76 
void do_sleep()
77 
{
78 
        uint32 i;
79 
        for (i = 0; i < 200000; i++)
80 
                ;
81 
}
82 
 
83 
void do_sleep2()
84 
{
85 
        uint32 i;
86 
        for (i = 0; i < 1000; i++)
87 
                ;
88 
}
89 
 
90 
/******************************************************************************/
91 
/*                           G P I O   W  R I T E                             */
92 
/******************************************************************************/
93 
 
94 
// Write to the GPIO (32 bits)
95 
 
96 
void GPIO_Write(uint32 GPIO_data)
97 
{
98 
   REG32(GPIO_BASE + RGPIO_OUT) = GPIO_data;
99 
}
100 
 
101 
 
102 
/******************************************************************************/
103 
/*                           F O R   s p i M A S T E R                        */
104 
/******************************************************************************/
105 17 xianfeng 
 
106 12 xianfeng 
//Initialize
107 
int spiMaster_init()
108 
{
109 
        uint8 data;
110 
        int   i;
111 
 
112 17 xianfeng 
        REG8(SD_BASE_ADD + SD_CLK_DEL_REG) = 0x1;
113 12 xianfeng 
 
114 
        for (i = 0; i < 5; i++) {
115 
                REG8(SD_BASE_ADD + SD_TRANS_TYPE_REG) = SD_INIT_SD;
116 
                REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 1; // TRANS_START;
117 
 
118 
                do_sleep();
119 
 
120 
                while (REG8(SD_BASE_ADD + SD_TRANS_STS_REG) & 0x1) { // exit while !TRABS_BUSY
121 
                        ;
122 
                }
123 
 
124 
                data = REG8(SD_BASE_ADD + SD_TRANS_ERROR_REG) & 0x3;
125 
 
126 17 xianfeng 
                if (data == 0) {
127 
                        return 0;
128 
                }
129 12 xianfeng 
        }
130 
        return data;
131 
}
132 
 
133 
unsigned char data[512];
134 
 
135 
int copy_sd2ddr(void)
136 
{
137 
 
138 
        int i, j;
139 
        uint8 data;
140 
        unsigned char transError;
141 
 
142 
        uint32 blockCnt;
143 
        uint32 numBlocks = 2 * 1024 * 10; // How mang blocks will be copied
144 
 
145 
        uint32 ddr_offset = 0;
146 
 
147 
        print("Start copying SD image to DDR SDRAM...\n\r");
148 
        print("Blocks:");
149 
        print32bit((long unsigned int)numBlocks);
150 
 
151 
        for (blockCnt = 0; blockCnt < numBlocks; blockCnt++) {
152 
                REG8(SD_BASE_ADD + SD_ADDR_7_0_REG)   = 0;
153 
                REG8(SD_BASE_ADD + SD_ADDR_15_8_REG)  = (unsigned char) ((ddr_offset >> 8) & 0xff);
154 
                REG8(SD_BASE_ADD + SD_ADDR_23_16_REG) = (unsigned char) ((ddr_offset >> 16) & 0xff);
155 
                REG8(SD_BASE_ADD + SD_ADDR_31_24_REG) = (unsigned char) ((ddr_offset >> 24) & 0xff);
156 
 
157 
 
158 
                REG8(SD_BASE_ADD + SD_TRANS_TYPE_REG) = SD_RW_READ_SD_BLOCK;
159 
                REG8(SD_BASE_ADD + SD_RX_FIFO_CONTROL_REG) = 0x1; // Clean the RX FIFO
160 
                REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 0x1; //TRANS_START
161 
                while (REG8(SD_BASE_ADD + SD_TRANS_STS_REG) & 0x1) { // exit while !TRABS_BUSY
162 
                        ;
163 
                }
164 
 
165 
                transError = REG8(SD_BASE_ADD + SD_TRANS_ERROR_REG) & 0xc;
166 
                if ( transError == SD_READ_NO_ERROR) {
167 
                        for (i = 0; i < 512; i++) {
168 
                                data = REG8(SD_BASE_ADD + SD_RX_FIFO_DATA_REG) ;
169 
                                REG8(DDR_SDRAM_BASE_ADDR + ddr_offset + i) = data ;
170 
//                              print32bit((long unsigned int)data);
171 
                        }
172 
                        if ((blockCnt % 0x40) == 0) {
173 
                                putc('.');
174 
                                j++;
175 
                        }
176 
                        if (j == 20) {
177 
                                j = 0;
178 
                                print("\n\r");
179 
                        }
180 
 
181 
                        ddr_offset += 512;
182 
                } else {
183 
                        putc('R');
184 
                        j++;
185 
                        if (j == 20) {
186 
                                j = 0;
187 
                                print("\n\r");
188 
                        }
189 
                        spiMaster_init(); // Init again and retry
190 
                        blockCnt--; // read the same block again
191 
                }
192 
        }
193 
 
194 
        print("\r\nSD Copy Done!\n\r");
195 
}
196 
 
197 
 
198 
/******************************************************************************/
199 
/*                        TEST EXTERNAL DDR SDRAM                             */
200 
/******************************************************************************/
201 
 
202 
void ddr_sdram_sample_test()
203 
{
204 
        uint32 int32;
205 
        uint16 int16;
206 
        uint8  int8;
207 
        int    i;
208 
 
209 
        REG32(DDR_SDRAM_BASE_ADDR) = 0x12345678;
210 
        int32 = REG32(DDR_SDRAM_BASE_ADDR);
211 
 
212 
        REG16(DDR_SDRAM_BASE_ADDR + 10) = 0x55aa;
213 
        int16 = REG16(DDR_SDRAM_BASE_ADDR + 10);
214 
 
215 
        REG8(DDR_SDRAM_BASE_ADDR + 20) = 0x5a;
216 
        int8 = REG8(DDR_SDRAM_BASE_ADDR + 20);
217 
 
218 
        if (REG8(DDR_SDRAM_BASE_ADDR + 20)  != 0x5a)
219 
                print ("DDR SDRAM accesses short type Error:20!\n\r");
220 
 
221 
        REG8(DDR_SDRAM_BASE_ADDR + 100) = 0x12;
222 
        REG8(DDR_SDRAM_BASE_ADDR + 101) = 0x34;
223 
        REG8(DDR_SDRAM_BASE_ADDR + 102) = 0x56;
224 
        REG8(DDR_SDRAM_BASE_ADDR + 103) = 0x78;
225 
 
226 
        int32 = REG32(DDR_SDRAM_BASE_ADDR + 100);
227 
 
228 
        if (REG8(DDR_SDRAM_BASE_ADDR + 100)  != 0x12)
229 
                print ("DDR SDRAM accesses char type Error:100!\n\r");
230 
        if (REG8(DDR_SDRAM_BASE_ADDR + 101)  != 0x34)
231 
                print ("DDR SDRAM accesses char type Error:101!\n\r");
232 
        if (REG8(DDR_SDRAM_BASE_ADDR + 102)  != 0x56)
233 
                print ("DDR SDRAM accesses char type Error:102!\n\r");
234 
        if (REG8(DDR_SDRAM_BASE_ADDR + 103)  != 0x78)
235 
                print ("DDR SDRAM accesses char type Error:103!\n\r");
236 
 
237 
        for (i=0;i<64;i++) {
238 
                REG8(DDR_SDRAM_BASE_ADDR + i) = i;
239 
        }
240 
 
241 
        for (i=0;i<64;i++) {
242 
                REG8(0x3900+i) = REG8(DDR_SDRAM_BASE_ADDR + i);
243 
        }
244 
 
245 
        print ("DDR SDRAM sample test done.\n\r");
246 
}
247 
 
248 
 
249 
/*$$EXTERNAL EXEPTIONS*/
250 
/******************************************************************************/
251 
/*                  E X T E R N A L   E X E P T I O N S                       */
252 
/******************************************************************************/
253 
 
254 
void external_exeption()
255 
{
256 
  REG uint8 i;
257 
  REG uint32 PicSr,sr;
258 
}
259 
 
260 
 
261 
/*$$MAIN*/
262 
/******************************************************************************/
263 
/*                                                                            */
264 
/*                       M A I N   P R O G R A M                              */
265 
/*                                                                            */
266 
/******************************************************************************/
267 
 
268 
void Start()
269 
{
270 
  uint32 i;
271 
  uint8  str[9];
272 
 
273 
  // Configure GPIO
274 
  REG32(GPIO_BASE + RGPIO_OE)   = 0xff;  // bit0-7 = outputs, bit8-31 = inputs
275 
  REG32(GPIO_BASE + RGPIO_INTE) = 0x0;   // Disable interrupts from GPIO
276 
 
277 
  print("\n\r\n\t");
278 
  print("==OpenRisc 1200 SOC==\n\r\n");
279 
  GPIO_Write(~0x0);
280 
 
281 
  print("\n\r");
282 
 
283 17 xianfeng 
  print("SD Card Bootloader, v0.2\n\r");
284 13 xianfeng 
  print("Xianfeng Zeng, 2009 SA\n\r");
285 
  print("Xianfeng@opencores.org\n\r");
286 
  print("http://www.opencores.org/project,or1k_soc_on_altera_embedded_dev_kit\n\r");
287 12 xianfeng 
 
288 
  print("\n\r");
289 
 
290 
  print("System Clock: 30MHz\n\r\n");
291 
 
292 
  print("DDR SDRAM Base Address: 0x00000000 - 32MB\n\r");
293 
  print("Ethernet Base Address:  0x20000000  IRQ 4\n\r");
294 
  print("UART Base Address:      0x30000000  IRQ 2\n\r");
295 
  print("GPIO Base Address:      0x40000000  IRQ 3\n\r");
296 
  print("SD Card Base Address:   0x50000000\n\r");
297 
  print("SRAM Base Address:      0xF0000000 - 16KB\n\r");
298 
  print("\r\n\n");
299 
 
300 
 
301 
  print("Init SD Card:");
302 17 xianfeng 
  REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 0x1;  /* reset spiMaster */
303 
  do_sleep();
304 
  REG8(SD_BASE_ADD + SD_TRANS_CTRL_REG) = 0x0;
305 12 xianfeng 
  if (spiMaster_init() == 0) {
306 
        print("Passed!\n\r");
307 
  } else {
308 
        print("Failed!\n\r");
309 
  }
310 
 
311 
  ddr_sdram_sample_test();
312 
  copy_sd2ddr();
313 
 
314 
  GPIO_Write(~0x1);
315 
 
316 
  print("\n\r");
317 
 
318 
  print("Jump to DDR SDRAM: 0x100\n\r");
319 
  jumpToRAM();
320 
 
321 
  print("Should not get here!!:\n\r");
322 
  while(TRUE) {
323 
        do_sleep();
324 
        putc('.');
325 
        GPIO_Write(~0x0);  // Test finished
326 
        do_sleep();
327 
        GPIO_Write(~0x1);
328 
        do_sleep();
329 
        GPIO_Write(~0x2);
330 
        do_sleep();
331 
        GPIO_Write(~0x4);
332 
        do_sleep();
333 
        GPIO_Write(~0x8);
334 
 
335 
        if (i == 39) {
336 
                print("\n\r");
337 
                i = 0;
338 
        } else
339 
                i++;
340 
  }
341 
}
342 
 

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