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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [sd_boot_loader/] [ram.ld] - Blame information for rev 22

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Line No. Rev Author Line
1 12 xianfeng
/* Use internal memory*/
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MEMORY
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{
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    ld_info     : ORIGIN = 0xF0000000, LENGTH = 0x000000F0
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    vectors     : ORIGIN = 0xF0000100, LENGTH = 0x00000D00 - 0x100
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    flash       : ORIGIN = 0xF0000D00, LENGTH = 0x00002000 - 0x0A00
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    ram         : ORIGIN = 0xF0003000, LENGTH = 0x00001000
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}
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/*
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  The following section defines where to put the different input sections.
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  .text contains the code.
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  .data contains the initialized data.
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  .bss contains uninitialized data.
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  .sdata contains small constant data.
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*/
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SECTIONS
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{
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      .ld_info :
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      {
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        revision.o(.data)
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      } > ld_info
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    .vectors :   { *(.vectors) }    > vectors
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    .text :     { *(.text)  }       > flash
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    . = ALIGN (0x20);
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    __end = .;
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    .rodata :   { *(.rodata)}       > flash
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    .rodata.str1.1 :   { *(.rodata.str1.1)}       > flash
37 22 xianfeng
    .rodata.cst4 :   { *(.rodata.cst4)}       > flash
38 12 xianfeng
    .data :     { *(.data)  }       > ram
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    .bss :      { *(.bss)   }       > ram
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    .stack :
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    {
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        __STACK_TOP    = . ;
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        . = . + 0x500;
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        __STACK_BOTTOM = . ;
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    }                               > ram
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}
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/*
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  Definitions of identifiers that control initialization and memory allocation:
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  These two symbols must be present.
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   __BSS_START  : Start of uninitialized data
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   __BSS_END    : End of data to be cleared
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*/
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__CODE_START  = ADDR( .text );
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__CODE_END    = ADDR( .text ) + SIZEOF( .text );
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__DATA_START  = ADDR( .bss );
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__DATA_END    = ADDR( .bss ) + SIZEOF( .bss );

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