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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>External interrupt 0</title>
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<!-- Generated by Doxygen 1.2.16 -->
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<hr><h1>External interrupt 0<br>
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<small>
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[<a class="el" href="group__pavr__hwres__iof__perif.html">Peripherals</a>]</small>
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</h1><table border=0 cellpadding=0 cellspacing=0>
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<dl compact><dt><b>
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Features</b><dd>
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External interrupt 0 is physically mapped on the line 0 (bit 0) of <a class="el" href="group__pavr__hwres__iof__perif__pa.html">port A</a>. <br>
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Its associated interrupt flag resides into the IO File register GIFR (General Interrupt Flags Register): <br>
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<img src="pavr_hwres_iof_perif_int0_01.gif" alt="pavr_hwres_iof_perif_int0_01.gif">
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<br>
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External interrupt 0 is enabled/disabled by setting/clearing bit 6 in GIMSK (General Interrupt Mask) register: <br>
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<img src="pavr_hwres_iof_perif_int0_02.gif" alt="pavr_hwres_iof_perif_int0_02.gif">
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<br>
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If enabled, it can trigger an interrupt on high-to-low transition, low-to-high transition, or on a low level of the interrupt 0 input. This behavior is defined by 2 bits in the MCUCR (Microcontroller Control) register: <br>
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<img src="pavr_hwres_iof_perif_int0_03.gif" alt="pavr_hwres_iof_perif_int0_03.gif">
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</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by
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width=110 height=53></a>1.2.16 </small></address>
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