| 1 |
4 |
doru |
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
|
| 2 |
|
|
<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
| 3 |
|
|
<title>ALU</title>
|
| 4 |
|
|
<link href="doxygen.css" rel="stylesheet" type="text/css">
|
| 5 |
|
|
</head><body>
|
| 6 |
|
|
<!-- Generated by Doxygen 1.2.16 -->
|
| 7 |
|
|
<center>
|
| 8 |
|
|
<a class="qindex" href="main.html">Main Page</a> <a class="qindex" href="modules.html">Modules</a> <a class="qindex" href="pages.html">Related Pages</a> </center>
|
| 9 |
|
|
<hr><h1>ALU<br>
|
| 10 |
|
|
<small>
|
| 11 |
|
|
[<a class="el" href="group__pavr__pipeline.html">Pipeline details</a>]</small>
|
| 12 |
|
|
</h1><table border=0 cellpadding=0 cellspacing=0>
|
| 13 |
|
|
</table>
|
| 14 |
|
|
<dl compact><dt><b>
|
| 15 |
|
|
ALU description</b><dd>
|
| 16 |
|
|
The ALU is not a potentially conflicting resource, as it is fully controlled by pipeline stage s5. <br>
|
| 17 |
|
|
<br>
|
| 18 |
|
|
There are two ALU operands. The first operand is taken either from RF read port 1, if it's an 8 bit operand, or taken from RF read port 1 (lower 8 bits) and from RF read port 2 (higher 8 bits), if it's a 16 bit operand. The second operand is taken either from the RF read port 2 or directly from the instruction opcode; it is always 8 bit-wide. <br>
|
| 19 |
|
|
Both operands are fed to the ALU through the Bypass Unit. <br>
|
| 20 |
|
|
All ALU-requiring instructions write their result into the Bypass Unit. <br>
|
| 21 |
|
|
Details about the ALU hardware resource (connectivity, ALU opcodes) can be found <a class="el" href="group__pavr__hwres__alu.html">here</a>. <br>
|
| 22 |
|
|
Instructions that make use of the ALU-related pipeline registers:<ul>
|
| 23 |
|
|
<li>ADD, ADC, ADIW<li>SUB, SUBI, SBC, SBCI, SBIW<li>INC, DEC<li>AND, ANDI<li>OR, ORI, EOR<li>COM, NEG, CP, CPC, CPI, SWAP<li>LSR, ROR, ASR<li>MUL, MULS, MULSU<li>FMUL, FMULS, FMULSU<li>MOV, MOVW</ul>
|
| 24 |
|
|
</dl><dl compact><dt><b>
|
| 25 |
|
|
Plugging the ALU into the pipeline</b><dd>
|
| 26 |
|
|
The pipeline registers related to ALU access are presented in the picture below. <br>
|
| 27 |
|
|
From this picture, it can also easely figured out instructions' timing. <br>
|
| 28 |
|
|
<a name="alu_pipe_ref_01"></a> <br>
|
| 29 |
|
|
<div align="center">
|
| 30 |
|
|
<img src="pavr_pipe_alu_01.gif" alt="pavr_pipe_alu_01.gif">
|
| 31 |
|
|
</div>
|
| 32 |
|
|
<br>
|
| 33 |
|
|
</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by
|
| 34 |
|
|
<a href="http://www.doxygen.org/index.html">
|
| 35 |
|
|
<img src="doxygen.png" alt="doxygen" align="middle" border=0
|
| 36 |
|
|
width=110 height=53></a>1.2.16 </small></address>
|
| 37 |
|
|
</body>
|
| 38 |
|
|
</html>
|
