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-- <File header>
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-- Project
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-- pAVR (pipelined AVR) is an 8 bit RISC controller, compatible with Atmel's
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-- AVR core, but about 3x faster in terms of both clock frequency and MIPS.
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-- The increase in speed comes from a relatively deep pipeline. The original
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-- AVR core has only two pipeline stages (fetch and execute), while pAVR has
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-- 6 pipeline stages:
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-- 1. PM (read Program Memory)
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-- 2. INSTR (load Instruction)
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-- 3. RFRD (decode Instruction and read Register File)
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-- 4. OPS (load Operands)
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-- 5. ALU (execute ALU opcode or access Unified Memory)
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-- 6. RFWR (write Register File)
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-- Version
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-- 0.32
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-- Date
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-- 2002 August 07
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-- Author
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-- Doru Cuturela, doruu@yahoo.com
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-- License
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-- </File header>
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-- <File info>
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-- This file defines the constants needed by pAVR.
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-- When costumizing pAVR, modify model-specific settings.
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-- However, don't touch family-specific settings.
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-- </File info>
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-- <File body>
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library work;
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use work.std_util.all;
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use work.pavr_util.all;
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library ieee;
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use ieee.std_logic_1164.all;
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package pavr_constants is
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----------------------------------------------------------------------------
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-- Controller model-specific settings. Modify here to costumize pAVR.
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-- Data memory RAM-related constants. Take care, these must be self-consistent.
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-- Data memory length and address width
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constant pavr_dm_len : natural := 4096;
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constant pavr_dm_addr_w : natural := 12;
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-- Is data memory bigger than 256 bytes? (to be corellated with the
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-- above) We need this to know whether to update both bytes of pointer
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-- registers, or only the low byte, in loads/stores with pre/post
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-- de/increment.
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-- This is basically a boolean (=1 -> true; =0 -> false).
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constant pavr_dm_bigger_than_256: std_logic := '1';
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-- Is data memory bigger than 64KB? (to be corellated with the above) We need
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-- this to know whether if to make use of data ramp registers or not. That
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-- is, ramp registers RAMPX, RAMPY and RAMPZ.
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constant pavr_dm_bigger_than_64K: std_logic := '0';
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-- Program memory-related constants
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-- Is program memory bigger than 64KB? We need this to know whether or not to
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-- make use of ramp registers when accessing the Program Memory. These
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-- registers are: ramp register EIND (for instructions EICALL and EIJMP)
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-- and RAMPZ (for instruction ELPM).
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constant pavr_pm_bigger_than_64K: std_logic := '1';
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-- IOF registers addresses
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-- Kernel registers
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constant pavr_sreg_addr : natural := 16#3F#;
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constant pavr_sph_addr : natural := 16#3E#;
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constant pavr_spl_addr : natural := 16#3D#;
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constant pavr_rampx_addr : natural := 16#39#;
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constant pavr_rampy_addr : natural := 16#3a#;
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constant pavr_rampz_addr : natural := 16#3b#;
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constant pavr_rampd_addr : natural := 16#30#;
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constant pavr_eind_addr : natural := 16#31#;
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-- Feature registers
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-- Microcontroller control
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constant pavr_mcucr_addr : natural := 16#35#;
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-- General interrupt mask
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constant pavr_gimsk_addr : natural := 16#34#;
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-- General interrupt flags
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constant pavr_gifr_addr : natural := 16#38#;
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-- Timer 0
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constant pavr_tcnt0_addr : natural := 16#32#;
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constant pavr_tccr0_addr : natural := 16#33#;
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constant pavr_tifr_addr : natural := 16#36#;
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constant pavr_timsk_addr : natural := 16#37#;
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-- Port A
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constant pavr_porta_addr : natural := 16#1B#;
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constant pavr_ddra_addr : natural := 16#1A#;
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constant pavr_pina_addr : natural := 16#19#;
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-- Interrupt priorities
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constant pavr_int0_int_pri: natural := 16#05#;
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constant pavr_tov0_int_pri: natural := 16#09#;
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-- Interrupt vectors
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-- These can be anywhere in the 22 bit wide addressing space.
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constant pavr_int0_int_vec: natural := 16#000001#;
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constant pavr_tov0_int_vec: natural := 16#000006#;
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----------------------------------------------------------------------------
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-- Family-specific settings. That is, don't touch.
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-- ALU
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constant pavr_alu_opcode_w : natural := 5;
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constant pavr_alu_opcode_nop : natural := 0;
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constant pavr_alu_opcode_op1 : natural := 1;
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constant pavr_alu_opcode_op2 : natural := 2;
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constant pavr_alu_opcode_add8 : natural := 3;
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constant pavr_alu_opcode_adc8 : natural := 4;
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constant pavr_alu_opcode_sub8 : natural := 5;
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constant pavr_alu_opcode_sbc8 : natural := 6;
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constant pavr_alu_opcode_and8 : natural := 7;
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constant pavr_alu_opcode_eor8 : natural := 8;
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constant pavr_alu_opcode_or8 : natural := 9;
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constant pavr_alu_opcode_inc8 : natural := 10;
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constant pavr_alu_opcode_dec8 : natural := 11;
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constant pavr_alu_opcode_com8 : natural := 12;
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constant pavr_alu_opcode_neg8 : natural := 13;
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constant pavr_alu_opcode_swap8 : natural := 14;
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constant pavr_alu_opcode_lsr8 : natural := 15;
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constant pavr_alu_opcode_asr8 : natural := 16;
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constant pavr_alu_opcode_ror8 : natural := 17;
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constant pavr_alu_opcode_add16 : natural := 18;
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constant pavr_alu_opcode_sub16 : natural := 19;
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constant pavr_alu_opcode_mul8 : natural := 20;
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constant pavr_alu_opcode_muls8 : natural := 21;
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constant pavr_alu_opcode_mulsu8 : natural := 22;
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constant pavr_alu_opcode_fmul8 : natural := 23;
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constant pavr_alu_opcode_fmuls8 : natural := 24;
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constant pavr_alu_opcode_fmulsu8 : natural := 25;
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-- Select operand 1's higher 8 bits source.
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constant pavr_alu_op1_hi8_sel_w : natural := 1;
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constant pavr_alu_op1_hi8_sel_zero : std_logic := '0';
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constant pavr_alu_op1_hi8_sel_op1bpu : std_logic := '1';
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-- Select operand 2's source.
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constant pavr_alu_op2_sel_w : natural := 2;
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constant pavr_alu_op2_sel_op2bpu : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "00";
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constant pavr_alu_op2_sel_k8 : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "01";
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constant pavr_alu_op2_sel_1 : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "10";
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constant pavr_alu_op2_sel_minus1 : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "11";
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-- Flags
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constant pavr_alu_h_sel_w : natural := 2;
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constant pavr_alu_h_sel_same : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "00";
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constant pavr_alu_h_sel_add8 : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "01";
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constant pavr_alu_h_sel_sub8 : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "10";
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constant pavr_alu_h_sel_neg8 : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "11";
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constant pavr_alu_s_sel_w : natural := 1;
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constant pavr_alu_s_sel_same : std_logic := '0';
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constant pavr_alu_s_sel_nxorv : std_logic := '1';
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constant pavr_alu_v_sel_w : natural := 4;
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constant pavr_alu_v_sel_same : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0000";
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constant pavr_alu_v_sel_add8 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0001";
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constant pavr_alu_v_sel_sub8 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0010";
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constant pavr_alu_v_sel_z : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0011";
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constant pavr_alu_v_sel_inc8 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0100";
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constant pavr_alu_v_sel_dec8 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0101";
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constant pavr_alu_v_sel_neg8 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0110";
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constant pavr_alu_v_sel_nxorc : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0111";
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constant pavr_alu_v_sel_add16 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "1000";
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constant pavr_alu_v_sel_sub16 : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "1001";
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constant pavr_alu_n_sel_w : natural := 2;
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constant pavr_alu_n_sel_same : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "00";
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constant pavr_alu_n_sel_msb8 : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "01";
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constant pavr_alu_n_sel_z : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "10";
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constant pavr_alu_n_sel_msb16 : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "11";
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constant pavr_alu_z_sel_w : natural := 2;
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constant pavr_alu_z_sel_same : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "00";
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constant pavr_alu_z_sel_z8 : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "01";
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constant pavr_alu_z_sel_z8c : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "10";
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constant pavr_alu_z_sel_z16 : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "11";
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constant pavr_alu_c_sel_w : natural := 3;
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constant pavr_alu_c_sel_same : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "000";
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constant pavr_alu_c_sel_add8 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "001";
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constant pavr_alu_c_sel_sub8 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "010";
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constant pavr_alu_c_sel_one : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "011";
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constant pavr_alu_c_sel_neg8 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "100";
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constant pavr_alu_c_sel_lsbop1 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "101";
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constant pavr_alu_c_sel_add16 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "110";
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constant pavr_alu_c_sel_sub16 : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "111";
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-- IOF
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constant pavr_iof_opcode_w : natural := 3;
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constant pavr_iof_opcode_nop : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "000";
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constant pavr_iof_opcode_rdbyte : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "001";
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constant pavr_iof_opcode_wrbyte : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "010";
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constant pavr_iof_opcode_clrbit : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "011";
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constant pavr_iof_opcode_setbit : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "100";
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constant pavr_iof_opcode_ldbit : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "101";
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constant pavr_iof_opcode_stbit : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "110";
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-- DACU
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constant pavr_dacudo_sel_w : natural := 2;
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constant pavr_dacudo_sel_rfrd1do : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "00";
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constant pavr_dacudo_sel_iofdo : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "01";
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constant pavr_dacudo_sel_dmdo : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "10";
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constant pavr_dacu_device_sel_w : natural := 2;
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constant pavr_dacu_device_sel_rf : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "00";
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constant pavr_dacu_device_sel_iof : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "01";
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constant pavr_dacu_device_sel_dm : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "10";
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-- PM
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constant pavr_pc_sel_w : natural := 1;
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constant pavr_pc_sel_same : std_logic := '0';
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constant pavr_pc_sel_inc : std_logic := '1';
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-- SFU
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constant pavr_s5_skip_cond_sel_w : natural := 2;
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constant pavr_s5_skip_cond_sel_zflag : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "00";
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constant pavr_s5_skip_cond_sel_bitrf : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "01";
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constant pavr_s5_skip_cond_sel_notbitrf : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "10";
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constant pavr_s6_skip_cond_sel_w : natural := 1;
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constant pavr_s6_skip_cond_sel_bitiof : std_logic := '0';
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constant pavr_s6_skip_cond_sel_notbitiof : std_logic := '1';
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constant pavr_s5_skip_bitrf_sel_w : natural := 3;
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constant pavr_s6_skip_bitiof_sel_w : natural := 3;
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constant pavr_s5_branch_cond_sel_w : natural := 1;
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constant pavr_s5_branch_cond_sel_bitsreg : std_logic := '0';
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constant pavr_s5_branch_cond_sel_notbitsreg : std_logic := '1';
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end;
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-- </File body>
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