URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_00/] [rtl/] [verilog/] [KNOWN_ISSUES] - Blame information for rev 154

Details | Compare with Previous | View Log


Known issues for current RTL version:
 
-  PCI Bridge's WISHBONE Master doesn't work properly,
   when REGISTER_WBM_OUTPUTS is defined and WISHBONE Slave connected to it
   operates with 0 wait cycles.

Line No.	Rev	Author	Line
1	23	mihad	`Known issues for current RTL version:`
2
3			`- PCI Bridge's WISHBONE Master doesn't work properly,`
4			`when REGISTER_WBM_OUTPUTS is defined and WISHBONE Slave connected to it`
5			`operates with 0 wait cycles.`

Browse

Tools

Subversion Repositories pci

[/] [pci/] [tags/] [rel_00/] [rtl/] [verilog/] [KNOWN_ISSUES] - Blame information for rev 154