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18 |
mihad |
/* Set search path for verilog include files */
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2 |
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search_path = search_path + { RTL_PATH } + { GATE_PATH }
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3 |
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4 |
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/* Read verilog files of the PCI IP core */
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if (TOPLEVEL == "TOP") {
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analyze -f verilog pci_bridge32.v
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7 |
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analyze -f verilog mas_load_next_crit.v
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8 |
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analyze -f verilog pci_parity_check.v
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9 |
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analyze -f verilog pci_target_unit.v
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10 |
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analyze -f verilog wb_addr_mux.v
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11 |
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analyze -f verilog cbe_en_crit.v
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12 |
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analyze -f verilog fifo_control.v
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13 |
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analyze -f verilog out_reg.v
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14 |
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analyze -f verilog pci_target32_ad_en_crit.v
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15 |
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analyze -f verilog pci_tpram.v
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16 |
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analyze -f verilog wb_master.v
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analyze -f verilog conf_cyc_addr_dec.v
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18 |
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analyze -f verilog frame_crit.v
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19 |
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analyze -f verilog par_cbe_crit.v
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20 |
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analyze -f verilog pci_target32_clk_en.v
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21 |
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analyze -f verilog pciw_fifo_control.v
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22 |
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analyze -f verilog wb_slave.v
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23 |
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analyze -f verilog conf_space.v
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24 |
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analyze -f verilog frame_en_crit.v
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25 |
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analyze -f verilog par_crit.v
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26 |
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analyze -f verilog pci_target32_ctrl_en_crit.v
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27 |
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analyze -f verilog pciw_pcir_fifos.v
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28 |
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analyze -f verilog wb_slave_unit.v
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29 |
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analyze -f verilog frame_load_crit.v
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30 |
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analyze -f verilog pci_bridge32.v
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31 |
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analyze -f verilog pci_target32_devs_crit.v
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32 |
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analyze -f verilog perr_crit.v
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33 |
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analyze -f verilog wbr_fifo_control.v
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34 |
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analyze -f verilog cur_out_reg.v
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35 |
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analyze -f verilog io_mux_en_mult.v
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36 |
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analyze -f verilog pci_decoder.v
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37 |
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analyze -f verilog pci_target32_interface.v
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38 |
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analyze -f verilog perr_en_crit.v
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39 |
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analyze -f verilog wbw_fifo_control.v
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40 |
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analyze -f verilog decoder.v
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41 |
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analyze -f verilog io_mux_load_mux.v
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42 |
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analyze -f verilog pci_in_reg.v
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43 |
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analyze -f verilog pci_target32_load_crit.v
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44 |
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analyze -f verilog serr_crit.v
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analyze -f verilog wbw_wbr_fifos.v
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analyze -f verilog delayed_sync.v
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47 |
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analyze -f verilog irdy_out_crit.v
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48 |
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analyze -f verilog pci_io_mux.v
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analyze -f verilog pci_target32_sm.v
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50 |
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analyze -f verilog serr_en_crit.v
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51 |
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analyze -f verilog delayed_write_reg.v
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52 |
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analyze -f verilog mas_ad_en_crit.v
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53 |
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analyze -f verilog pci_master32_sm.v
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analyze -f verilog pci_target32_stop_crit.v
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55 |
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analyze -f verilog synchronizer_flop.v
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56 |
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analyze -f verilog mas_ch_state_crit.v
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analyze -f verilog pci_master32_sm_if.v
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58 |
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analyze -f verilog pci_target32_trdy_crit.v
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analyze -f verilog top.v
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60 |
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analyze -f verilog pci_rst_int.v
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analyze -f verilog sync_module.v
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analyze -f verilog wb_tpram.v
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63 |
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} else {
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64 |
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echo "Non-existing top level."
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exit
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}
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67 |
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