URL
https://opencores.org/ocsvn/pci/pci/trunk
[/] [pci/] [tags/] [rel_3/] [syn/] [scr/] [cons_wb_ports.inc] - Blame information for rev 154
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Line No. |
Rev |
Author |
Line |
1 |
18 |
mihad |
set_input_delay -max 2 -clock WB_CLK {SDAT_I}
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2 |
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set_input_delay -max 2 -clock WB_CLK {ADR_I}
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3 |
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set_input_delay -max 2 -clock WB_CLK {SDAT_I}
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4 |
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set_input_delay -max 2 -clock WB_CLK {SEL_I}
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5 |
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set_input_delay -max 2 -clock WB_CLK {CYC_I}
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6 |
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set_input_delay -max 2 -clock WB_CLK {STB_I}
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7 |
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set_input_delay -max 2 -clock WB_CLK {CAB_I}
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8 |
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set_input_delay -max 2 -clock WB_CLK {WE_I}
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9 |
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10 |
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set_input_delay -max 2 -clock WB_CLK {MDAT_I}
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11 |
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set_input_delay -max 2 -clock WB_CLK {ACK_I}
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12 |
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set_input_delay -max 2 -clock WB_CLK {ERR_I}
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13 |
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set_input_delay -max 2 -clock WB_CLK {RTY_I}
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14 |
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15 |
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set_output_delay -max 2 -clock WB_CLK {SDAT_O}
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16 |
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set_output_delay -max 2 -clock WB_CLK {MDAT_O}
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17 |
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set_output_delay -max 2 -clock WB_CLK {ADR_O}
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18 |
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set_output_delay -max 2 -clock WB_CLK {ACK_O}
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19 |
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set_output_delay -max 2 -clock WB_CLK {ERR_O}
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20 |
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set_output_delay -max 2 -clock WB_CLK {RTY_O}
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21 |
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set_output_delay -max 2 -clock WB_CLK {CYC_O}
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22 |
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set_output_delay -max 2 -clock WB_CLK {CAB_O}
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23 |
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set_output_delay -max 2 -clock WB_CLK {WE_O}
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24 |
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set_output_delay -max 2 -clock WB_CLK {STB_O}
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