OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_8/] [apps/] [test/] [sim/] [rtl_sim/] [run/] [run_sim.scr] - Blame information for rev 154

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 93 mihad
#!/bin/csh -f
2
 
3
if ( $# < 1 ) then
4
    echo "First argument must be a top level module name!"
5
    exit
6
else
7
    set SIM_TOP = $1
8
endif
9
 
10
set current_par = 1
11
set output_waveform = 0
12
while ( $current_par < $# )
13
    @ current_par = $current_par + 1
14
    switch ($argv[$current_par])
15
    case "wave":
16
        @ output_waveform = 1
17
        breaksw
18
    default:
19
        echo 'Unknown option "'$argv[$current_par]'"!'
20
        exit
21
        breaksw
22
    endsw
23
end
24
 
25
echo "-CDSLIB ../bin/cds.lib"          > ncvlog.args
26
echo "-HDLVAR ../bin/hdl.var"         >> ncvlog.args
27
echo "-MESSAGES"                      >> ncvlog.args
28
echo "-INCDIR ../../../../../bench/verilog" >> ncvlog.args
29
echo "-INCDIR ../../../../../rtl/verilog"   >> ncvlog.args
30
echo "-NOCOPYRIGHT"                   >> ncvlog.args
31
echo "-LOGFILE ../log/ncvlog.log"     >> ncvlog.args
32
 
33
foreach filename ( `cat ../bin/file_list.txt` )
34
    echo $filename >> ncvlog.args
35
end
36
 
37
ncvlog -f ncvlog.args
38
 
39
echo "-MESSAGES"                             > ncelab.args
40
echo "-NOCOPYRIGHT"                         >> ncelab.args
41
echo "-CDSLIB ../bin/cds.lib"               >> ncelab.args
42
echo "-HDLVAR ../bin/hdl.var"               >> ncelab.args
43
echo "-LOGFILE ../log/ncelab.log"           >> ncelab.args
44
echo "-SNAPSHOT worklib.bench:rtl"          >> ncelab.args
45
echo "-NO_TCHK_MSG"                         >> ncelab.args
46
echo "-ACCESS +RWC"                         >> ncelab.args
47
echo "worklib.$SIM_TOP"                     >> ncelab.args
48
echo "worklib.glbl"                         >> ncelab.args
49
 
50
ncelab -f ncelab.args
51
 
52
echo "-MESSAGES"                   > ncsim.args
53
echo "-NOCOPYRIGHT"               >> ncsim.args
54
echo "-CDSLIB ../bin/cds.lib"     >> ncsim.args
55
echo "-HDLVAR ../bin/hdl.var"     >> ncsim.args
56
echo "-INPUT ncsim.tcl"           >> ncsim.args
57
echo "-LOGFILE ../log/ncsim.log"  >> ncsim.args
58
echo "worklib.bench:rtl"          >> ncsim.args
59
 
60
if ( $output_waveform ) then
61
    echo "database -open waves -shm -into ../out/waves.shm"             > ./ncsim.tcl
62
    echo "probe -create -database waves $SIM_TOP -shm -all -depth all" >> ./ncsim.tcl
63
    echo "run"                                                         >> ./ncsim.tcl
64
else
65
    echo "run"  > ./ncsim.tcl
66
endif
67
 
68
echo "quit" >> ncsim.tcl
69
 
70
ncsim -LICQUEUE -f ./ncsim.args

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.