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[/] [pci_core/] [trunk/] [vhdl_behav/] [Tg32pci.vhd] - Blame information for rev 10

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1 6 olupas
--===================================================================--
2
--
3
--  www.OpenCores.Org - January 2000
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--  This model adheres to the GNU public license  
5
--
6
-- Design units   : Target device for PCI Local Bus 33 MHz 32 bits
7
--                  (BoardLevel Simulation model)
8
--                  (Entity and architecture)
9
--
10
-- File name      : Tg32PCI.vhd
11
--
12
-- Purpose        : The Target device is used to simulate a target 
13
--                  device on the PCI-Bus
14
--
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-- Note           : This model is modelled after the PCI protocol 
16
--                  as described in Xilinx & Altera AppNotes
17
--
18
--                There can be used more than one target devices in a
19
--                design, every device being identified by the three 
20
--                base addresses in generic.
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--
22
-- Limitations    : None known
23
--
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-- Errors         : None known
25
--
26
-- Library        : PCI_Lib.vhd
27
--
28
-- Dependencies   : IEEE.Std_Logic_1164
29
--
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-- Author         : Ovidiu Lupas
31
--                  olupas@opencores.org
32
--
33
-- Simulator    : ModelSim EE version 5.2 on a Windows95 PC
34
--                ActiveVHDL 3.1 on a Windows95 PC
35
--===================================================================--
36
-----------------------------------------------------------------------
37
-- Entity for Target device in a PCI bus 33 MHZ 32 bit configuration
38
-----------------------------------------------------------------------
39
library ieee,work;
40
  use ieee.Std_Logic_1164.all;
41
  use work.Simulation.all;
42
  use work.PCI_Def.all;
43
-----------------------------------------------------------------------
44
-----------------------------------------------------------------------
45 8 olupas
entity TG32PCI is
46 6 olupas
    generic (
47
      devtype : string(1 to 4); -- type of the device (Fast, Medi, Slow)
48
      tdelay  : Time;   -- delay time parameter when the device will change
49
                        -- data on AD_Bus (referenced to CLK signal)
50
      tsetup  : Time;
51
      thold   : Time;
52
      bamem   : Std_Logic_Vector(31 downto 0);  -- base address for memory
53
      baio    : Std_Logic_Vector(31 downto 0);  -- base address for I/O port
54
      bacfg   : Std_Logic_Vector(31 downto 0)); -- base address for cfg space
55
    port (
56
        -- Address, Data and Command buses (37)
57
        AD_Bus   : inout Std_Logic_Vector (31 downto 0); -- Address and Data Bus
58
        C_BE_Bus : in    Std_Logic_Vector (3 downto 0);  -- Command Bus
59
        PAR      : inout Std_Logic;                      --
60
        -- Interface control signals (6)
61
        FRAME_N  : in    Std_Logic;
62
        TRDY_N   : inout Std_Logic;
63
        IRDY_N   : in    Std_Logic;
64
        STOP_N   : out   Std_Logic;
65
        DEVSEL_N : inout Std_Logic;
66
        IDSEL    : in    Std_Logic;
67
        -- Error reporting signals (2)
68
        PERR_N   : inout Std_Logic;
69
        SERR_N   : inout Std_Logic;
70
        -- System signals (2)
71
        CLK      : in    Std_Logic;
72
        RST_N    : in    Std_Logic);
73 8 olupas
end TG32PCI; --=================== End of entity ====================--
74 6 olupas
-----------------------------------------------------------------------
75
-- Architecture for Target device PCI bus 33MHZ 32 bit configuration
76
-----------------------------------------------------------------------
77
architecture Behavior of Target32PCI is
78
  ---------------------------------------------------------------------
79
  -- Definition of Memory type,
80
  ---------------------------------------------------------------------
81
  type MEMORY is array(0 to 255) of Std_Logic_Vector(31 downto 0);
82
  ---------------------------------------------------------------------
83
  -- Local declarations
84
  ---------------------------------------------------------------------
85
  shared variable addr      : Std_Logic_Vector (31 downto 0);  -- Address
86
  shared variable busaddr   : Integer;     -- address present on bus
87
  shared variable cfgaddr   : Integer;     -- current configuration register address
88
  shared variable memaddr   : Integer;     -- current memory address
89
  shared variable ioaddr    : Integer;     -- current I/O port address
90
  shared variable IOmem     : Memory;      -- IOport registers
91
  shared variable Cfgmem    : Memory;      -- Configuration registers
92
  shared variable Mem       : Memory;      -- memory locations
93
  shared variable trdywaits : Boolean := false; -- wait enable
94
  shared variable trdy_st,trdy_nr,trdy_loop : Integer := 0;
95
  ---------------------------------------------------------------------
96
  -- Signals
97
  ---------------------------------------------------------------------  
98
  signal cmd         : Std_Logic_Vector (3 downto 0);   -- Command bus
99
  signal Busy        : Std_Logic := '0';
100
  signal IORead      : Std_Logic := '0';
101
  signal IOWrite     : Std_Logic := '0';
102
  signal MemRead     : Std_Logic := '0';
103
  signal MemWrite    : Std_Logic := '0';
104
  signal WaitWrite   : Std_Logic := '0';
105
  signal CfgRead     : Std_Logic := '0';
106
  signal CfgWrite    : Std_Logic := '0';
107
  signal FrameEv     : Std_Logic := '0';
108
  signal CmdBusReady : Std_Logic := '0';
109
  signal TrnArnd     : Std_Logic := '0';
110
  signal DevAddr     : Std_Logic := '0';
111
  signal ResFin      : Std_Logic := '0';
112
  signal Waits       : Std_Logic := '0';
113
  signal Init        : Std_Logic := '0';
114
begin--======================== Architecture ========================--
115
  ---------------------------------------------------------------------
116
  -- Initialize the memory contents with zeroes
117
  ---------------------------------------------------------------------
118
  Initialize : process
119
  begin
120
     for i in 0 to 255 loop
121
         IOmem(i)  := x"00000000";
122
         Mem(i)    := x"00000000";
123
         Cfgmem(i) := x"00000000";
124
     end loop;
125
     wait;
126
  end process;
127
  ---------------------------------------------------------------------
128
  -- Implements the parity generation and parity checking over the
129
  -- AD bus and C/BE bus.
130
  -- Also, generates the PERR_N signal, if the computed parity is not 
131
  -- equal with PAR signal, when PAR signal is generated by master
132
  ---------------------------------------------------------------------
133
  Parity : process(CLK,RST_N)
134
     variable parbit  : Std_Logic;
135
     variable lastpar : Std_Logic;
136
     variable errbit  : Std_Logic;
137
     variable pargen  : Boolean := false;
138
     variable errgen  : Boolean := false;
139
     variable cmdbus  : Std_Logic_Vector(3 downto 0);
140
     variable addrbus : Std_Logic_Vector(31 downto 0);
141
  begin
142
     if (Falling_Edge(RST_N) or RST_N = '0') then
143
        PAR <= 'Z';
144
        PERR_N <= 'Z';
145
     elsif (CLK'Event and CLK = '1') then  -- parity computation on every cycle
146
         addrbus := AD_Bus;
147
         cmdbus  := C_BE_Bus;
148
         lastpar := parbit;
149
         parbit  := '0';
150
         if addrbus /= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ" then
151
            for I in 0 to 31 loop
152
                parbit := parbit xor addrbus(i);
153
            end loop;
154
            for I in 0 to 3 loop
155
                parbit := parbit xor cmdbus(I);
156
            end loop;
157
         else
158
            parbit := 'Z';
159
         end if;
160
         if PAR = lastpar then -- PERR computation on every cycle
161
            errbit := '1';
162
         elsif PAR /= lastpar then
163
            errbit := '0';
164
         elsif PAR = 'Z' then
165
            errbit := 'H';
166
         end if;
167
         if ((IORead = '1' or MemRead = '1' or CfgRead = '1') and DevAddr = '1') then
168
            pargen := true;
169
         else
170
            pargen := false;
171
         end if;
172
     elsif (CLK'Event and CLK = '0' and DevAddr = '1') then -- parity generation if necessary
173
         if errgen = true then
174
            PERR_N <= errbit;
175
         else
176
            PERR_N <= 'H';
177
         end if;
178
         if pargen = true then
179
            PAR <= parbit;
180
            errgen := false;
181
         else
182
            PAR <= 'Z';
183
            errgen := true;
184
         end if;
185
     elsif (CLK'Event and CLK = '0' and DevAddr = '0') then --not the selected device
186
         PAR    <= 'Z';                            -- by the address
187
         PERR_N <= 'H';
188
         SERR_N <= 'Z';
189
     end if;
190
  end process;
191
  ---------------------------------------------------------------------
192
  -- Implements the command decoding, to receive commands from master
193
  ---------------------------------------------------------------------
194
  Decode : process(CLK,FRAME_N,Busy,DevAddr,cmdBusReady,RST_N)
195
     variable counter : Integer;
196
     variable devdel  : Boolean := false;
197
  begin
198
    if (Falling_Edge(RST_N) or RST_N = '0') then
199
        DEVSEL_N <= 'Z';
200
        STOP_N   <= 'Z';
201
        Busy <= '0';
202
    elsif (Frame_N'Event and Frame_N = '0') then -- the target device is awakened by 
203
        FrameEv <= '1';                        -- falling_edge of FRAME signal
204
        counter := 0;
205
    elsif (Busy'Event and Busy = '0') then
206
        IOWrite  <= '0';
207
        MemWrite <= '0';
208
        CfgWrite <= '0';
209
        WaitWrite <= '0';
210
        IORead   <= '0';
211
        MemRead  <= '0';
212
        CfgRead  <= '0';
213
    elsif (Busy'Event and Busy = '1') then
214
       if ( IOWrite = '1' or MemWrite = '1' or CfgWrite = '1' or WaitWrite = '1') then
215
          report "Target device is selected for write operations!"
216
          severity Note;
217
          if devtype = "Fast" then
218
             DEVSEL_N <= '0' after 8 ns;
219
             Stop_N   <= '1' after 10 ns;
220
             devdel := false;
221
          else
222
             devdel := true;
223
             counter := 0;
224
          end if;
225
       elsif ( IORead = '1' or MemRead = '1' or CfgRead = '1') then
226
          report "Target device is selected for read operations!"
227
          severity Note;
228
          if devtype = "Fast" then
229
             DEVSEL_N <= '0' after 8 ns;
230
             Stop_N   <= '1' after 10 ns;
231
             devdel := false;
232
          else
233
             devdel := true;
234
             counter := 0;
235
          end if;
236
       end if;
237
    elsif (DevAddr'Event and DevAddr = '0') then
238
       Busy <= '0';
239
    elsif (cmdBusReady'Event and cmdBusReady = '1') then
240
       TrnArnd <= '0';
241
    elsif (CLK'Event and CLK = '0') then
242
       if Busy = '0' and DevAddr = '1' then  -- deselect
243
          DEVSEL_N <= 'H';
244
          STOP_N   <= '1';
245
       elsif DevAddr = '0' then  -- deselect device
246
          DEVSEL_N <= 'Z';
247
          STOP_N   <= 'Z';
248
       end if;
249
    elsif (CLK'Event and CLK = '1') then
250
       if ResFin = '1' then    -- memory reserved mode command
251
          if MemWrite = '1' then  -- master writes to target memory
252
             if TRDY_N = '0' and IRDY_N = '0' then
253
                Busy   <= '0';
254
                ResFin <= '0';
255
             end if;
256
          elsif MemRead = '1' then  -- master reads from target memory
257
             if TrnArnd = '0' and TRDY_N = '0' and IRDY_N = '0' then
258
                Busy   <= '0';
259
                ResFin <= '0';
260
             end if;
261
          end if;
262
       end if;
263
       if devdel = true then
264
          if devtype = "Medi" then
265
             if counter = 0 then
266
                DEVSEL_N <= '0' after 8 ns;
267
                Stop_N   <= '1' after 10 ns;
268
                devdel := false;
269
             end if;
270
          elsif devtype = "Slow" then
271
             if counter = 1 then
272
                DEVSEL_N <= '0' after 8 ns;
273
                Stop_N   <= '1' after 10 ns;
274
                devdel := false;
275
             else
276
                counter := counter + 1;
277
             end if;
278
          end if;
279
       end if;
280
       if FRAME_N = '1' then    -- end of cycle
281
          assert (IRDY_N = '0')
282
            report "Target device : FRAME signal deassertion error. IRDY is not asserted."
283
            severity Error;
284
          if TRDY_N = '0' and IRDY_N = '0' then  -- finish the current cycle
285
             Busy <= '0';
286
          end if;
287
       elsif FrameEv = '1' then -- decoding
288
          FrameEv <= '0';
289
          assert (FRAME_N'Last_Event >= tsetup)
290
            report "Target device : Frame setup time violation in decode cycle!"
291
            severity warning;
292
          assert (AD_Bus'Last_Event >= tsetup)
293
            report "Target device : Address setup time violation in decode cycle!"
294
            severity warning;
295
          assert (C_BE_Bus'Last_Event >= tsetup)
296
            report "Target device : Command setup time violation in decode cycle!"
297
            severity warning;
298
          addr := AD_Bus;
299
          case C_BE_Bus is           -- decoding the command bus
300
               when "0001" => -- Special Cycle! Used to transfer from master device the 
301
                              -- wait states parameters
302
                   if (addr(31 downto 8) = bacfg(31 downto 8) and IDSEL ='1') then
303
                      WaitWrite <= '1';
304
                      DevAddr  <= '1';
305
                      Busy <= '1';
306
                      trdywaits := true;
307
                   else        -- this device is not the addressed one,
308
                      DevAddr  <= '0';   -- so it is not responding
309
                      trdywaits := false;
310
                   end if;
311
                   cfgaddr := Byte2Int(addr(7 downto 0));
312
               when "0010" => -- I/O Read! Master reads from target device.
313
                   if addr(31 downto 8) = baio(31 downto 8) then
314
                       DevAddr <= '1';
315
                       Busy <= '1';
316
                       IORead <= '1';
317
                       TrnArnd <= '1';
318
                       ioaddr := Byte2Int(addr(7 downto 0));
319
                   else          -- this device is not the addressed one,
320
                       DevAddr  <= '0';   -- so it is not responding
321
                   end if;
322
               when "0011" => -- I/O Write! Master writes to target device.
323
                   if addr(31 downto 8) = baio(31 downto 8) then
324
                       DevAddr <= '1';
325
                       Busy <= '1';
326
                       IOWrite <= '1';
327
                       ioaddr := Byte2Int(addr(7 downto 0));
328
                   else        -- this device is not the addressed one,
329
                       DevAddr  <= '0';   -- so it is not responding
330
                   end if;
331
               when "1100" => -- Memory Read! Master reads from target device.
332
                   if addr(31 downto 8) = bamem(31 downto 8) then
333
                       DevAddr <= '1';
334
                       Busy <= '1';
335
                       MemRead <= '1';
336
                       TrnArnd <= '1';
337
                       if addr(1 downto 0) = "01" then    -- reserved mode                  
338
                          ResFin <= '1';
339
                       elsif addr(1 downto 0) = "11" then -- reserved mode
340
                          ResFin <= '1';
341
                       end if;
342
                       memaddr := Byte2Int(addr(7 downto 0));
343
                   else     -- this device is not the addressed one,
344
                       DevAddr  <= '0';   -- so it is not responding
345
                   end if;
346
               when "1110" => -- Memory Read Line! Master reads from target device.
347
                   if addr(31 downto 8) = bamem(31 downto 8) then
348
                       DevAddr <= '1';
349
                       Busy <= '1';
350
                       MemRead <= '1';
351
                       TrnArnd <= '1';
352
                       if addr(1 downto 0) = "01" then    -- reserved mode                  
353
                          ResFin <= '1';
354
                       elsif addr(1 downto 0) = "11" then -- reserved mode
355
                          ResFin <= '1';
356
                       end if;
357
                       memaddr := Byte2Int(addr(7 downto 0));
358
                   else     -- this device is not the addressed one,
359
                       DevAddr  <= '0';   -- so it is not responding
360
                   end if;
361
               when "1111" => -- Memory Write! Master writes to target device.
362
                   if addr(31 downto 8) = bamem(31 downto 8) then
363
                       DevAddr <= '1';
364
                       Busy <= '1';
365
                       MemWrite <= '1';
366
                       if addr(1 downto 0) = "01" then    -- reserved mode                  
367
                          ResFin <= '1';
368
                       elsif addr(1 downto 0) = "11" then -- reserved mode
369
                          ResFin <= '1';
370
                       end if;
371
                       memaddr := Byte2Int(addr(7 downto 0));
372
                   else      -- this device is not the addressed one,
373
                       DevAddr  <= '0';   -- so it is not responding
374
                   end if;
375
               when "0110" => -- Memory Read! Master reads from target device.
376
                   if addr(31 downto 8) = bamem(31 downto 8) then
377
                       DevAddr <= '1';
378
                       Busy <= '1';
379
                       MemRead <= '1';
380
                       TrnArnd <= '1';
381
                       if addr(1 downto 0) = "01" then    -- reserved mode                  
382
                          ResFin <= '1';
383
                       elsif addr(1 downto 0) = "11" then -- reserved mode
384
                          ResFin <= '1';
385
                       end if;
386
                       memaddr := Byte2Int(addr(7 downto 0));
387
                   else     -- this device is not the addressed one,
388
                       DevAddr  <= '0';   -- so it is not responding
389
                   end if;
390
               when "0111" => -- Memory Write! Master writes to target device.
391
                   if addr(31 downto 8) = bamem(31 downto 8) then
392
                       DevAddr <= '1';
393
                       Busy <= '1';
394
                       MemWrite <= '1';
395
                       if addr(1 downto 0) = "01" then    -- reserved mode                  
396
                          ResFin <= '1';
397
                       elsif addr(1 downto 0) = "11" then -- reserved mode
398
                          ResFin <= '1';
399
                       end if;
400
                       memaddr := Byte2Int(addr(7 downto 0));
401
                   else      -- this device is not the addressed one,
402
                       DevAddr  <= '0';   -- so it is not responding
403
                   end if;
404
               when "1010" => -- Configuration Read! Master reads from target device.
405
                   if (addr(31 downto 8) = bacfg(31 downto 8) and IDSEL = '1') then
406
                      if addr(1 downto 0) = "01" then
407
                         report "Target device: Type 1 configuration access on bus! Ignored."
408
                         severity Note;
409
                      elsif addr(1 downto 0) = "00" then
410
                         CfgRead <= '1';
411
                         TrnArnd <= '1';
412
                         DevAddr <= '1';
413
                         Busy <= '1';
414
                      end if;
415
                      cfgaddr := Byte2Int(addr(7 downto 0));
416
                   else       -- this device is not the addressed one,
417
                      DevAddr  <= '0';   -- so it is not responding
418
                   end if;
419
               when "1011" => -- Configuration Write! Master writes to target device.
420
                   if (addr(31 downto 8) = bacfg(31 downto 8) and IDSEL = '1') then
421
                      if addr(1 downto 0) = "01" then
422
                         report "Target device: Type 1 configuration access on bus! Ignored."
423
                         severity Note;
424
                      elsif addr(1 downto 0) = "00" then
425
                         CfgWrite <= '1';
426
                         DevAddr <= '1';
427
                         Busy <= '1';
428
                      end if;
429
                      cfgaddr := Byte2Int(addr(7 downto 0));
430
                   else
431
                             -- this device is not the addressed one,
432
                      DevAddr  <= '0';   -- so it is not responding
433
                   end if;
434
               when "0100" =>
435
                  report "Target device: Reserved Command detected on C/BE bus! Target will not respond."
436
                  severity Warning;
437
               when "0101" =>
438
                  report "Target device: Reserved Command detected on C/BE bus! Target will not respond."
439
                  severity Warning;
440
               when "1000" =>
441
                  report "Target device: Reserved Command detected on C/BE bus! Target will not respond."
442
                  severity Warning;
443
               when "1001" =>
444
                  report "Target device: Reserved Command detected on C/BE bus! Target will not respond."
445
                  severity Warning;
446
               when "ZZZZ" => null;
447
               when others =>
448
                  report "Target device: Unknown or invalid command on C/BE bus! Ignored."
449
                  severity Error;
450
             end case;
451
       end if;
452
    -- elsif (Frame_N'Event and Frame_N = '1') then
453
    end if;
454
  end process;
455
  ---------------------------------------------------------------------
456
  -- Implementation of Write command. 
457
  -- Master writes to Target device.
458
  --------------------------------------------------------------------- 
459
  WriteProc : process(CLK,RST_N)
460
      variable waitreg : Std_Logic_Vector(15 downto 0) := x"0000";
461
      variable Char3_2,Char1,Char0 : Std_Logic_Vector(7 downto 0) := x"00";
462
  begin
463
     if (CLK'Event and CLK = '1' and ((IRDY_N = '0' and TRDY_N = '0') or FRAME_N = '1')) then
464
        assert (AD_Bus'Last_Event >= tsetup)
465
          report "Target device : Data setup time violation in decode cycle!"
466
          severity warning;
467
        assert (C_BE_Bus'Last_Event >= tsetup)
468
          report "Target device : Byte Enables setup time violation in decode cycle!"
469
          severity warning;
470
        if (WaitWrite = '1') then
471
           Char3_2 := AD_Bus(15 downto 8);
472
           Char1   := "0000" & AD_Bus(7 downto 4);
473
           Char0   := "0000" & AD_Bus(3 downto 0);
474
           trdy_loop := Byte2Int(Char3_2) ;
475
           trdy_nr   := Byte2Int(Char1); -- + 1;
476
           trdy_st   := Byte2Int(Char0);
477
        elsif IOWrite = '1' then
478
           -- Master writes to target I/O space
479
           case addr(1 downto 0) is
480
               when "00"   =>
481
                  if C_BE_Bus = "0000" then
482
                      IOmem(ioaddr) := AD_Bus;
483
                  elsif C_BE_Bus = "1000" then
484
                      IOmem(ioaddr)(23 downto 0) := AD_Bus(23 downto 0);
485
                  elsif C_BE_Bus = "0100" then
486
                      IOmem(ioaddr)(31 downto 24) := AD_Bus(31 downto 24);
487
                      IOmem(ioaddr)(15 downto 0) := AD_Bus(15 downto 0);
488
                  elsif C_BE_Bus = "1100" then
489
                      IOmem(ioaddr)(15 downto 0) := AD_Bus(15 downto 0);
490
                  elsif C_BE_Bus = "0010" then
491
                      IOmem(ioaddr)(31 downto 16) := AD_Bus(31 downto 16);
492
                      IOmem(ioaddr)(7 downto 0) := AD_Bus(7 downto 0);
493
                  elsif C_BE_Bus = "1010" then
494
                      IOmem(ioaddr)(23 downto 16) := AD_Bus(23 downto 16);
495
                      IOmem(ioaddr)(7 downto 0) := AD_Bus(7 downto 0);
496
                  elsif C_BE_Bus = "0110" then
497
                      IOmem(ioaddr)(31 downto 24) := AD_Bus(31 downto 24);
498
                      IOmem(ioaddr)(7 downto 0) := AD_Bus(7 downto 0);
499
                  elsif C_BE_Bus = "1110" then
500
                      IOmem(ioaddr)(7 downto 0) := AD_Bus(7 downto 0);
501
                  elsif C_BE_Bus(0) = '1' then
502
                      report "Target device: Byte Enable word not valid !"
503
                      severity Error;
504
                  end if;
505
               when "01"   =>
506
                  if C_BE_Bus = "0001" then
507
                      IOmem(ioaddr)(31 downto 8) := AD_Bus(31 downto 8);
508
                  elsif C_BE_Bus = "1001" then
509
                      IOmem(ioaddr)(23 downto 8) := AD_Bus(23 downto 8);
510
                  elsif C_BE_Bus = "0101" then
511
                      IOmem(ioaddr)(31 downto 24) := AD_Bus(31 downto 24);
512
                      IOmem(ioaddr)(15 downto 8) := AD_Bus(15 downto 8);
513
                  elsif C_BE_Bus = "1101" then
514
                      IOmem(ioaddr)(15 downto 8) := AD_Bus(15 downto 8);
515
                  elsif C_BE_Bus(1) = '1' then
516
                      report "Target device: Byte Enable word not valid !"
517
                      severity Error;
518
                  end if;
519
               when "10"   =>
520
                  if C_BE_Bus = "0011" then
521
                      IOmem(ioaddr)(31 downto 16) := AD_Bus(31 downto 16);
522
                  elsif C_BE_Bus = "1011" then
523
                      IOmem(ioaddr)(23 downto 16) := AD_Bus(23 downto 16);
524
                  elsif C_BE_Bus(2) = '1' then
525
                      report "Target device: Byte Enable word not valid !"
526
                      severity Error;
527
                  end if;
528
               when "11"   =>
529
                  if C_BE_Bus = "0111" then
530
                      IOmem(ioaddr)(31 downto 24) := AD_Bus(31 downto 24);
531
                  elsif C_BE_Bus(3) = '1' then
532
                      report "Target device: Byte Enable word not valid !"
533
                      severity Error;
534
                  end if;
535
               when others =>
536
                  null;
537
           end case;
538
           ioaddr := ioaddr + 1;
539
        elsif MemWrite = '1' then
540
        -- Master writes to target memory space
541
           case addr(1 downto 0) is
542
                when "00"   =>  -- linear incrementing mode
543
                    if C_BE_Bus = "0000" then
544
                       Mem(memaddr) := AD_Bus;
545
                    elsif C_BE_Bus = "0001" then
546
                       Mem(memaddr)(31 downto 8) := AD_Bus(31 downto 8);
547
                    elsif C_BE_Bus = "0010" then
548
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
549
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
550
                    elsif C_BE_Bus = "0011" then
551
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
552
                    elsif C_BE_Bus = "0100" then
553
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
554
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
555
                    elsif C_BE_Bus = "0101" then
556
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
557
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
558
                    elsif C_BE_Bus = "0110" then
559
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
560
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
561
                    elsif C_BE_Bus = "0111" then
562
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
563
                    elsif C_BE_Bus = "1000" then
564
                       Mem(memaddr)(23 downto 0) := AD_Bus(23 downto 0);
565
                    elsif C_BE_Bus = "1001" then
566
                       Mem(memaddr)(23 downto 8) := AD_Bus(23 downto 8);
567
                    elsif C_BE_Bus = "1010" then
568
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
569
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
570
                    elsif C_BE_Bus = "1011" then
571
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
572
                    elsif C_BE_Bus = "1100" then
573
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
574
                    elsif C_BE_Bus = "1101" then
575
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
576
                    elsif C_BE_Bus = "1110" then
577
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
578
                    elsif C_BE_Bus = "1111" then
579
                       report "Target device: Byte Enable word not valid !"
580
                       severity Error;
581
                    end if;
582
                    memaddr := memaddr + 1;
583
               when "01"   =>  -- reserved mode (disconnect after first data phase)
584
                    if C_BE_Bus = "0000" then
585
                       Mem(memaddr) := AD_Bus;
586
                    elsif C_BE_Bus = "0001" then
587
                       Mem(memaddr)(31 downto 8) := AD_Bus(31 downto 8);
588
                    elsif C_BE_Bus = "0010" then
589
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
590
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
591
                    elsif C_BE_Bus = "0011" then
592
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
593
                    elsif C_BE_Bus = "0100" then
594
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
595
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
596
                    elsif C_BE_Bus = "0101" then
597
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
598
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
599
                    elsif C_BE_Bus = "0110" then
600
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
601
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
602
                    elsif C_BE_Bus = "0111" then
603
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
604
                    elsif C_BE_Bus = "1000" then
605
                       Mem(memaddr)(23 downto 0) := AD_Bus(23 downto 0);
606
                    elsif C_BE_Bus = "1001" then
607
                       Mem(memaddr)(23 downto 8) := AD_Bus(23 downto 8);
608
                    elsif C_BE_Bus = "1010" then
609
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
610
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
611
                    elsif C_BE_Bus = "1011" then
612
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
613
                    elsif C_BE_Bus = "1100" then
614
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
615
                    elsif C_BE_Bus = "1101" then
616
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
617
                    elsif C_BE_Bus = "1110" then
618
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
619
                    elsif C_BE_Bus = "1111" then
620
                       report "Target device: Byte Enable word not valid !"
621
                       severity Error;
622
                    end if;
623
               when "10"   =>  -- cacheline wrap mode
624
                    if C_BE_Bus = "0000" then
625
                       Mem(memaddr) := AD_Bus;
626
                    elsif C_BE_Bus = "0001" then
627
                       Mem(memaddr)(31 downto 8) := AD_Bus(31 downto 8);
628
                    elsif C_BE_Bus = "0010" then
629
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
630
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
631
                    elsif C_BE_Bus = "0011" then
632
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
633
                    elsif C_BE_Bus = "0100" then
634
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
635
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
636
                    elsif C_BE_Bus = "0101" then
637
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
638
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
639
                    elsif C_BE_Bus = "0110" then
640
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
641
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
642
                    elsif C_BE_Bus = "0111" then
643
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
644
                    elsif C_BE_Bus = "1000" then
645
                       Mem(memaddr)(23 downto 0) := AD_Bus(23 downto 0);
646
                    elsif C_BE_Bus = "1001" then
647
                       Mem(memaddr)(23 downto 8) := AD_Bus(23 downto 8);
648
                    elsif C_BE_Bus = "1010" then
649
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
650
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
651
                    elsif C_BE_Bus = "1011" then
652
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
653
                    elsif C_BE_Bus = "1100" then
654
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
655
                    elsif C_BE_Bus = "1101" then
656
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
657
                    elsif C_BE_Bus = "1110" then
658
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
659
                    elsif C_BE_Bus = "1111" then
660
                       report "Target device: Byte Enable word not valid !"
661
                       severity Error;
662
                    end if;
663
                    memaddr := memaddr + 1;
664
               when "11"   =>  -- reserved mode (disconnect after first data phase)
665
                    if C_BE_Bus = "0000" then
666
                       Mem(memaddr) := AD_Bus;
667
                    elsif C_BE_Bus = "0001" then
668
                       Mem(memaddr)(31 downto 8) := AD_Bus(31 downto 8);
669
                    elsif C_BE_Bus = "0010" then
670
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
671
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
672
                    elsif C_BE_Bus = "0011" then
673
                       Mem(memaddr)(31 downto 16) := AD_Bus(31 downto 16);
674
                    elsif C_BE_Bus = "0100" then
675
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
676
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
677
                    elsif C_BE_Bus = "0101" then
678
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
679
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
680
                    elsif C_BE_Bus = "0110" then
681
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
682
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
683
                    elsif C_BE_Bus = "0111" then
684
                       Mem(memaddr)(31 downto 24) := AD_Bus(31 downto 24);
685
                    elsif C_BE_Bus = "1000" then
686
                       Mem(memaddr)(23 downto 0) := AD_Bus(23 downto 0);
687
                    elsif C_BE_Bus = "1001" then
688
                       Mem(memaddr)(23 downto 8) := AD_Bus(23 downto 8);
689
                    elsif C_BE_Bus = "1010" then
690
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
691
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
692
                    elsif C_BE_Bus = "1011" then
693
                       Mem(memaddr)(23 downto 16) := AD_Bus(23 downto 16);
694
                    elsif C_BE_Bus = "1100" then
695
                       Mem(memaddr)(15 downto 0) := AD_Bus(15 downto 0);
696
                    elsif C_BE_Bus = "1101" then
697
                       Mem(memaddr)(15 downto 8) := AD_Bus(15 downto 8);
698
                    elsif C_BE_Bus = "1110" then
699
                       Mem(memaddr)(7 downto 0) := AD_Bus(7 downto 0);
700
                    elsif C_BE_Bus = "1111" then
701
                       report "Target device: Byte Enable word not valid !"
702
                       severity Error;
703
                    end if;
704
               when others =>
705
                    null;
706
           end case;
707
        elsif CfgWrite = '1' then
708
        -- Master writes to target configuration space
709
           if C_BE_Bus = "0000" then
710
              Cfgmem(cfgaddr) := AD_Bus;
711
           elsif C_BE_Bus = "0001" then
712
              Cfgmem(cfgaddr)(31 downto 8) := AD_Bus(31 downto 8);
713
           elsif C_BE_Bus = "0010" then
714
              Cfgmem(cfgaddr)(31 downto 16) := AD_Bus(31 downto 16);
715
              Cfgmem(cfgaddr)(7 downto 0) := AD_Bus(7 downto 0);
716
           elsif C_BE_Bus = "0011" then
717
              Cfgmem(cfgaddr)(31 downto 16) := AD_Bus(31 downto 16);
718
           elsif C_BE_Bus = "0100" then
719
              Cfgmem(cfgaddr)(31 downto 24) := AD_Bus(31 downto 24);
720
              Cfgmem(cfgaddr)(15 downto 0) := AD_Bus(15 downto 0);
721
           elsif C_BE_Bus = "0101" then
722
              Cfgmem(cfgaddr)(31 downto 24) := AD_Bus(31 downto 24);
723
              Cfgmem(cfgaddr)(15 downto 8) := AD_Bus(15 downto 8);
724
           elsif C_BE_Bus = "0110" then
725
              Cfgmem(cfgaddr)(31 downto 24) := AD_Bus(31 downto 24);
726
              Cfgmem(cfgaddr)(7 downto 0) := AD_Bus(7 downto 0);
727
           elsif C_BE_Bus = "0111" then
728
              Cfgmem(cfgaddr)(31 downto 24) := AD_Bus(31 downto 24);
729
           elsif C_BE_Bus = "1000" then
730
              Cfgmem(cfgaddr)(23 downto 0) := AD_Bus(23 downto 0);
731
           elsif C_BE_Bus = "1001" then
732
              Cfgmem(cfgaddr)(23 downto 8) := AD_Bus(23 downto 8);
733
           elsif C_BE_Bus = "1010" then
734
              Cfgmem(cfgaddr)(23 downto 16) := AD_Bus(23 downto 16);
735
              Cfgmem(cfgaddr)(7 downto 0) := AD_Bus(7 downto 0);
736
           elsif C_BE_Bus = "1011" then
737
              Cfgmem(cfgaddr)(23 downto 16) := AD_Bus(23 downto 16);
738
           elsif C_BE_Bus = "1100" then
739
              Cfgmem(cfgaddr)(15 downto 0) := AD_Bus(15 downto 0);
740
           elsif C_BE_Bus = "1101" then
741
              Cfgmem(cfgaddr)(15 downto 8) := AD_Bus(15 downto 8);
742
           elsif C_BE_Bus = "1110" then
743
              Cfgmem(cfgaddr)(7 downto 0) := AD_Bus(7 downto 0);
744
           elsif C_BE_Bus = "1111" then
745
              report "Target device: Byte Enable word not valid !"
746
              severity Error;
747
           end if;
748
           cfgaddr := cfgaddr + 1;
749
        end if;
750
    end if;
751
  end process;
752
  ---------------------------------------------------------------------
753
  -- Implementation of Read command. 
754
  -- Master read from Target device.
755
  --------------------------------------------------------------------- 
756
  ReadProc : process(RST_N,CLK,cmdBusReady,IORead,IOWrite,MemRead,MemWrite,CfgRead,CfgWrite)
757
      variable first : Boolean := true;
758
  begin
759
     if (Falling_Edge(RST_N) or RST_N = '0') then
760
        AD_Bus <= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";
761
     elsif (CLK'Event and CLK = '0') then
762
        cmdBusReady <= '0';
763
        if (first = true or TrnArnd ='1') then
764
     -- Initialize the AD_Bus to avoid bus conflict
765
           AD_Bus <= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";
766
           first := false;
767
        elsif Init = '1' then
768
           Init <= '0';
769
           AD_Bus <= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ" after tdelay;
770
        end if;
771
     elsif IORead'Event and IORead = '0' then
772
           Init <= '1';
773
     elsif MemRead'Event and MemRead = '0' then
774
           Init <= '1';
775
     elsif CfgRead'Event and CfgRead = '0' then
776
           Init <= '1';
777
     elsif (CLK'Event and CLK = '1' and IRDY_N = '0') then
778
        if (IORead = '1' or MemRead = '1' or CfgRead = '1') then
779
           cmd <= C_BE_Bus; -- read the byte enable command
780
           cmdBusReady <= '1';
781
        end if;
782
     elsif (cmdBusReady'Event and cmdBusReady = '0' and TRDY_N = '0') then
783
         if IORead = '1' then
784
     -- Master reads from target I/O space
785
            case addr(1 downto 0) is
786
               when "00"   =>
787
                  if cmd = "0000" then
788
                      AD_Bus <= IOmem(ioaddr) after tdelay;
789
                  elsif cmd = "1000" then
790
                      AD_Bus(31 downto 24) <= "11111111" after tdelay;
791
                      AD_Bus(23 downto 0)  <= IOmem(ioaddr)(23 downto 0) after tdelay;
792
                  elsif cmd = "0100" then
793
                      AD_Bus(31 downto 24) <= IOmem(ioaddr)(31 downto 24) after tdelay;
794
                      AD_Bus(23 downto 16) <= "11111111" after tdelay;
795
                      AD_Bus(15 downto 0)  <= IOmem(ioaddr)(15 downto 0) after tdelay;
796
                  elsif cmd = "1100" then
797
                      AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
798
                      AD_Bus(15 downto 0)  <= IOmem(ioaddr)(15 downto 0) after tdelay;
799
                  elsif cmd = "0010" then
800
                      AD_Bus(31 downto 16) <= IOmem(ioaddr)(31 downto 16) after tdelay;
801
                      AD_Bus(15 downto 8)  <= "11111111" after tdelay;
802
                      AD_Bus(7 downto 0)   <= IOmem(ioaddr)(7 downto 0) after tdelay;
803
                  elsif cmd = "1010" then
804
                      AD_Bus(31 downto 24) <= "11111111" after tdelay;
805
                      AD_Bus(23 downto 16) <= IOmem(ioaddr)(23 downto 16) after tdelay;
806
                      AD_Bus(15 downto 8)  <= "11111111" after tdelay;
807
                      AD_Bus(7 downto 0)   <= IOmem(ioaddr)(7 downto 0) after tdelay;
808
                  elsif cmd = "0110" then
809
                      AD_Bus(31 downto 24) <= IOmem(ioaddr)(31 downto 24) after tdelay;
810
                      AD_Bus(23 downto 8)  <= "1111111111111111" after tdelay;
811
                      AD_Bus(7 downto 0)   <= IOmem(ioaddr)(7 downto 0) after tdelay;
812
                  elsif cmd = "1110" then
813
                      AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
814
                      AD_Bus(7 downto 0)  <= IOmem(ioaddr)(7 downto 0) after tdelay;
815
                  elsif cmd(0) = '1' then
816
                      report "Target device: Byte Enable word not valid !"
817
                      severity Error;
818
                  end if;
819
               when "01"   =>
820
                  if cmd = "0001" then
821
                      AD_Bus(31 downto 8) <= IOmem(ioaddr)(31 downto 8) after tdelay;
822
                      AD_Bus(7 downto 0)  <= "11111111" after tdelay;
823
                  elsif cmd = "1001" then
824
                      AD_Bus(31 downto 24) <= "11111111" after tdelay;
825
                      AD_Bus(23 downto 8)  <= IOmem(ioaddr)(23 downto 8) after tdelay;
826
                      AD_Bus(7 downto 0)   <= "11111111" after tdelay;
827
                  elsif cmd = "0101" then
828
                      AD_Bus(31 downto 24) <= IOmem(ioaddr)(31 downto 24) after tdelay;
829
                      AD_Bus(23 downto 16) <= "11111111" after tdelay;
830
                      AD_Bus(15 downto 8)  <= IOmem(ioaddr)(15 downto 8) after tdelay;
831
                      AD_Bus(7 downto 0)   <= "11111111" after tdelay;
832
                  elsif cmd = "1101" then
833
                      AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
834
                      AD_Bus(15 downto 8)  <= IOmem(ioaddr)(15 downto 8) after tdelay;
835
                      AD_Bus(7 downto 0)   <= "11111111" after tdelay;
836
                  elsif cmd(1) = '1' then
837
                      report "Target device: Byte Enable word not valid !"
838
                      severity Error;
839
                  end if;
840
               when "10"   =>
841
                  if cmd = "0011" then
842
                      AD_Bus(31 downto 16) <= IOmem(ioaddr)(31 downto 16) after tdelay;
843
                      AD_Bus(15 downto 0)  <= "1111111111111111" after tdelay;
844
                  elsif cmd = "1011" then
845
                      AD_Bus(31 downto 24) <= "11111111" after tdelay;
846
                      AD_Bus(23 downto 16) <= IOmem(ioaddr)(23 downto 16) after tdelay;
847
                      AD_Bus(15 downto 0)  <= "1111111111111111" after tdelay;
848
                  elsif cmd(2) = '1' then
849
                      report "Target device: Byte Enable word not valid !"
850
                      severity Error;
851
                  end if;
852
               when "11"   =>
853
                  if cmd = "0111" then
854
                      AD_Bus(31 downto 24) <= IOmem(ioaddr)(31 downto 24) after tdelay;
855
                      AD_Bus(23 downto 0)  <= "111111111111111111111111" after tdelay;
856
                  elsif cmd(3) = '1' then
857
                      report "Target device: Byte Enable word not valid !"
858
                      severity Error;
859
                  end if;
860
               when others =>
861
                  null;
862
            end case;
863
            ioaddr := ioaddr + 1;
864
         elsif MemRead = '1' then
865
     -- Master reads from target memory space
866
            case addr(1 downto 0) is
867
               when "00"   =>  -- linear incrementing mode
868
                    if cmd = "0000" then
869
                       AD_Bus <= Mem(memaddr) after tdelay;
870
                    elsif cmd = "0001" then
871
                       AD_Bus(31 downto 8) <= Mem(memaddr)(31 downto 8) after tdelay;
872
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
873
                    elsif cmd = "0010" then
874
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
875
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
876
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
877
                    elsif cmd = "0011" then
878
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
879
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
880
                    elsif cmd = "0100" then
881
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
882
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
883
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
884
                    elsif cmd = "0101" then
885
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
886
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
887
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
888
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
889
                    elsif cmd = "0110" then
890
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
891
                       AD_Bus(23 downto 8) <= "1111111111111111" after tdelay;
892
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
893
                    elsif cmd = "0111" then
894
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
895
                       AD_Bus(23 downto 0) <= "111111111111111111111111" after tdelay;
896
                    elsif cmd = "1000" then
897
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
898
                       AD_Bus(23 downto 0) <= Mem(memaddr)(23 downto 0) after tdelay;
899
                    elsif cmd = "1001" then
900
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
901
                       AD_Bus(23 downto 8) <= Mem(memaddr)(23 downto 8) after tdelay;
902
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
903
                    elsif cmd = "1010" then
904
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
905
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
906
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
907
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
908
                    elsif cmd = "1011" then
909
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
910
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
911
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
912
                    elsif cmd = "1100" then
913
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
914
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
915
                    elsif cmd = "1101" then
916
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
917
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
918
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
919
                    elsif cmd = "1110" then
920
                       AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
921
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
922
                    elsif cmd = "1111" then
923
                       report "Target device: Byte Enable word not valid !"
924
                       severity Error;
925
                    end if;
926
                    memaddr := memaddr + 1;
927
               when "01"   =>  -- reserved mode (disconnect after first data phase)
928
                    if cmd = "0000" then
929
                       AD_Bus <= Mem(memaddr) after tdelay;
930
                    elsif cmd = "0001" then
931
                       AD_Bus(31 downto 8) <= Mem(memaddr)(31 downto 8) after tdelay;
932
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
933
                    elsif cmd = "0010" then
934
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
935
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
936
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
937
                    elsif cmd = "0011" then
938
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
939
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
940
                    elsif cmd = "0100" then
941
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
942
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
943
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
944
                    elsif cmd = "0101" then
945
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
946
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
947
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
948
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
949
                    elsif cmd = "0110" then
950
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
951
                       AD_Bus(23 downto 8) <= "1111111111111111" after tdelay;
952
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
953
                    elsif cmd = "0111" then
954
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
955
                       AD_Bus(23 downto 0) <= "111111111111111111111111" after tdelay;
956
                    elsif cmd = "1000" then
957
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
958
                       AD_Bus(23 downto 0) <= Mem(memaddr)(23 downto 0) after tdelay;
959
                    elsif cmd = "1001" then
960
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
961
                       AD_Bus(23 downto 8) <= Mem(memaddr)(23 downto 8) after tdelay;
962
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
963
                    elsif cmd = "1010" then
964
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
965
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
966
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
967
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
968
                    elsif cmd = "1011" then
969
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
970
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
971
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
972
                    elsif cmd = "1100" then
973
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
974
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
975
                    elsif cmd = "1101" then
976
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
977
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
978
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
979
                    elsif cmd = "1110" then
980
                       AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
981
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
982
                    elsif cmd = "1111" then
983
                       report "Target device: Byte Enable word not valid !"
984
                       severity Error;
985
                    end if;
986
               when "10"   =>  -- cacheline wrap mode
987
                    if cmd = "0000" then
988
                       AD_Bus <= Mem(memaddr) after tdelay;
989
                    elsif cmd = "0001" then
990
                       AD_Bus(31 downto 8) <= Mem(memaddr)(31 downto 8) after tdelay;
991
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
992
                    elsif cmd = "0010" then
993
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
994
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
995
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
996
                    elsif cmd = "0011" then
997
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
998
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
999
                    elsif cmd = "0100" then
1000
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1001
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
1002
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
1003
                    elsif cmd = "0101" then
1004
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1005
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
1006
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
1007
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1008
                    elsif cmd = "0110" then
1009
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1010
                       AD_Bus(23 downto 8) <= "1111111111111111" after tdelay;
1011
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1012
                    elsif cmd = "0111" then
1013
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1014
                       AD_Bus(23 downto 0) <= "111111111111111111111111" after tdelay;
1015
                    elsif cmd = "1000" then
1016
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1017
                       AD_Bus(23 downto 0) <= Mem(memaddr)(23 downto 0) after tdelay;
1018
                    elsif cmd = "1001" then
1019
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1020
                       AD_Bus(23 downto 8) <= Mem(memaddr)(23 downto 8) after tdelay;
1021
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1022
                    elsif cmd = "1010" then
1023
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1024
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
1025
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
1026
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1027
                    elsif cmd = "1011" then
1028
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1029
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
1030
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
1031
                    elsif cmd = "1100" then
1032
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1033
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
1034
                    elsif cmd = "1101" then
1035
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1036
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
1037
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1038
                    elsif cmd = "1110" then
1039
                       AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
1040
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1041
                    elsif cmd = "1111" then
1042
                       report "Target device: Byte Enable word not valid !"
1043
                       severity Error;
1044
                    end if;
1045
                    memaddr := memaddr + 1;
1046
               when "11"   =>  -- reserved mode (disconnect after first data phase)
1047
                    if cmd = "0000" then
1048
                       AD_Bus <= Mem(memaddr) after tdelay;
1049
                    elsif cmd = "0001" then
1050
                       AD_Bus(31 downto 8) <= Mem(memaddr)(31 downto 8) after tdelay;
1051
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1052
                    elsif cmd = "0010" then
1053
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
1054
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1055
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
1056
                    elsif cmd = "0011" then
1057
                       AD_Bus(31 downto 16) <= Mem(memaddr)(31 downto 16) after tdelay;
1058
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
1059
                    elsif cmd = "0100" then
1060
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1061
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
1062
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
1063
                    elsif cmd = "0101" then
1064
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1065
                       AD_Bus(23 downto 16) <= "11111111" after tdelay;
1066
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
1067
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1068
                    elsif cmd = "0110" then
1069
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1070
                       AD_Bus(23 downto 8) <= "1111111111111111" after tdelay;
1071
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1072
                    elsif cmd = "0111" then
1073
                       AD_Bus(31 downto 24) <= Mem(memaddr)(31 downto 24) after tdelay;
1074
                       AD_Bus(23 downto 0) <= "111111111111111111111111" after tdelay;
1075
                    elsif cmd = "1000" then
1076
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1077
                       AD_Bus(23 downto 0) <= Mem(memaddr)(23 downto 0) after tdelay;
1078
                    elsif cmd = "1001" then
1079
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1080
                       AD_Bus(23 downto 8) <= Mem(memaddr)(23 downto 8) after tdelay;
1081
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1082
                    elsif cmd = "1010" then
1083
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1084
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
1085
                       AD_Bus(15 downto 8) <= "11111111" after tdelay;
1086
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1087
                    elsif cmd = "1011" then
1088
                       AD_Bus(31 downto 24) <= "11111111" after tdelay;
1089
                       AD_Bus(23 downto 16) <= Mem(memaddr)(23 downto 16) after tdelay;
1090
                       AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
1091
                    elsif cmd = "1100" then
1092
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1093
                       AD_Bus(15 downto 0) <= Mem(memaddr)(15 downto 0) after tdelay;
1094
                    elsif cmd = "1101" then
1095
                       AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1096
                       AD_Bus(15 downto 8) <= Mem(memaddr)(15 downto 8) after tdelay;
1097
                       AD_Bus(7 downto 0) <= "11111111" after tdelay;
1098
                    elsif cmd = "1110" then
1099
                       AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
1100
                       AD_Bus(7 downto 0) <= Mem(memaddr)(7 downto 0) after tdelay;
1101
                    elsif cmd = "1111" then
1102
                       report "Target device: Byte Enable word not valid !"
1103
                       severity Error;
1104
                    end if;
1105
               when others =>
1106
                    null;
1107
            end case;
1108
         elsif CfgRead = '1' then
1109
     -- Master reads from target configuration space
1110
            if cmd = "0000" then
1111
               AD_Bus <= Cfgmem(cfgaddr) after tdelay;
1112
            elsif cmd = "0001" then
1113
               AD_Bus(31 downto 8) <= Cfgmem(cfgaddr)(31 downto 8) after tdelay;
1114
               AD_Bus(7 downto 0) <= "11111111" after tdelay;
1115
            elsif cmd = "0010" then
1116
               AD_Bus(31 downto 16) <= Cfgmem(cfgaddr)(31 downto 16) after tdelay;
1117
               AD_Bus(15 downto 8) <= "11111111" after tdelay;
1118
               AD_Bus(7 downto 0) <= Cfgmem(cfgaddr)(7 downto 0) after tdelay;
1119
            elsif cmd = "0011" then
1120
               AD_Bus(31 downto 16) <= Cfgmem(cfgaddr)(31 downto 16) after tdelay;
1121
               AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
1122
            elsif cmd = "0100" then
1123
               AD_Bus(31 downto 24) <= Cfgmem(cfgaddr)(31 downto 24) after tdelay;
1124
               AD_Bus(15 downto 0) <= Cfgmem(cfgaddr)(15 downto 0) after tdelay;
1125
               AD_Bus(23 downto 16) <= "11111111" after tdelay;
1126
            elsif cmd = "0101" then
1127
               AD_Bus(31 downto 24) <= Cfgmem(cfgaddr)(31 downto 24) after tdelay;
1128
               AD_Bus(23 downto 16) <= "11111111" after tdelay;
1129
               AD_Bus(15 downto 8) <= Cfgmem(cfgaddr)(15 downto 8) after tdelay;
1130
               AD_Bus(7 downto 0) <= "11111111" after tdelay;
1131
            elsif cmd = "0110" then
1132
               AD_Bus(31 downto 24) <= Cfgmem(cfgaddr)(31 downto 24) after tdelay;
1133
               AD_Bus(23 downto 8) <= "1111111111111111" after tdelay;
1134
               AD_Bus(7 downto 0) <= Cfgmem(cfgaddr)(7 downto 0) after tdelay;
1135
            elsif cmd = "0111" then
1136
               AD_Bus(31 downto 24) <= Cfgmem(cfgaddr)(31 downto 24) after tdelay;
1137
               AD_Bus(23 downto 0) <= "111111111111111111111111" after tdelay;
1138
            elsif cmd = "1000" then
1139
               AD_Bus(31 downto 24) <= "11111111" after tdelay;
1140
               AD_Bus(23 downto 0) <= Cfgmem(cfgaddr)(23 downto 0) after tdelay;
1141
            elsif cmd = "1001" then
1142
               AD_Bus(31 downto 24) <= "11111111" after tdelay;
1143
               AD_Bus(23 downto 8) <= Cfgmem(cfgaddr)(23 downto 8) after tdelay;
1144
               AD_Bus(7 downto 0) <= "11111111" after tdelay;
1145
            elsif cmd = "1010" then
1146
               AD_Bus(31 downto 24) <= "11111111" after tdelay;
1147
               AD_Bus(23 downto 16) <= Cfgmem(cfgaddr)(23 downto 16) after tdelay;
1148
               AD_Bus(15 downto 8) <= "11111111" after tdelay;
1149
               AD_Bus(7 downto 0) <= Cfgmem(cfgaddr)(7 downto 0) after tdelay;
1150
            elsif cmd = "1011" then
1151
               AD_Bus(31 downto 24) <= "11111111" after tdelay;
1152
               AD_Bus(23 downto 16) <= Cfgmem(cfgaddr)(23 downto 16) after tdelay;
1153
               AD_Bus(15 downto 0) <= "1111111111111111" after tdelay;
1154
            elsif cmd = "1100" then
1155
               AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1156
               AD_Bus(15 downto 0) <= Cfgmem(cfgaddr)(15 downto 0) after tdelay;
1157
            elsif cmd = "1101" then
1158
               AD_Bus(31 downto 16) <= "1111111111111111" after tdelay;
1159
               AD_Bus(15 downto 8) <= Cfgmem(cfgaddr)(15 downto 8) after tdelay;
1160
               AD_Bus(7 downto 0) <= "11111111" after tdelay;
1161
            elsif cmd = "1110" then
1162
               AD_Bus(31 downto 8) <= "111111111111111111111111" after tdelay;
1163
               AD_Bus(7 downto 0) <= Cfgmem(cfgaddr)(7 downto 0) after tdelay;
1164
            elsif cmd = "1111" then
1165
               report "Target device: Byte Enable word not valid !"
1166
               severity Error;
1167
            end if;
1168
            cfgaddr := cfgaddr + 1;
1169
         end if;
1170
     end if;
1171
  end process;
1172
  ---------------------------------------------------------------------
1173
  -- Implements the wait states process.
1174
  -- Target generates wait states accordingly to wait states parameters
1175
  -- received from master during Special Cycle.
1176
  -- Master reads the parameters from commands file.
1177
  --------------------------------------------------------------------- 
1178
  WaitProc : process(CLK,FRAME_N,RST_N)
1179
     variable counter : Integer;
1180
     variable waitcnt : Integer;
1181
     variable start   : Boolean;
1182
  begin
1183
     if (Falling_Edge(RST_N) or RST_N = '0') then
1184
        TRDY_N <= 'Z';
1185
     elsif (FRAME_N'Event and FRAME_N = '0') then
1186
        counter := 0;
1187
        start := true;
1188
        TRDY_N <= '1';
1189
     elsif (CLK'Event and CLK = '0') then
1190
        if (Busy = '0' and DevAddr = '0') then  -- deselect device
1191
           TRDY_N <= 'H';
1192
        elsif (Busy = '0' and DevAddr = '1') then  -- deselect signal
1193
           TRDY_N <= '1';
1194
        end if;
1195
        if (DevAddr = '1' and TrnArnd = '0' and DEVSEL_N = '0') then
1196
           if (counter >= trdy_st and start = true and TRDY_N = '1') then
1197
              -- finish waitstates at start
1198
              TRDY_N <= '0';
1199
              start := false;
1200
           elsif (counter = trdy_loop and TRDY_N = '0') then
1201
              -- random waitstates 
1202
              TRDY_N <= '1';
1203
              waits <= '1';
1204
              waitcnt := 1;
1205
           elsif (waitcnt = trdy_nr and waits = '1') then
1206
              -- finish random waitstates
1207
              waits <= '0';
1208
              TRDY_N <= '0';
1209
           elsif waits = '1' then -- count random waitstates
1210
              waitcnt := waitcnt + 1;
1211
           end if;
1212
        end if;
1213
     counter := counter + 1;
1214
     end if;
1215
  end process;
1216
  ---------------------------------------------------------------------
1217
  -- Implements the assertion process for IRDY_N, FRAME_N, and IDSEL 
1218
  -- signals.
1219
  --------------------------------------------------------------------- 
1220
  AsrtProc : process(CLK,FRAME_N,IRDY_N,IDSEL,AD_Bus)
1221
     variable irdevs  : Boolean := false;
1222
     variable idsevs  : Boolean := false;
1223
     variable counter : Integer;
1224
  begin
1225
     if Rising_Edge(CLK) and FRAME_N = '0' and IRDY_N = '1' then
1226
        counter := counter + 1;
1227
        if counter >= 8 then
1228
           report"Target device:IRDY is not asserted within 8 clocks from FRAME assertion!"
1229
           severity warning;
1230
        end if;
1231
     end if;
1232
     if AD_Bus'Event then
1233
         assert(CLK'Last_Event <= thold)
1234
           report"Target device: Address or Data hold time violation!"
1235
           severity warning;
1236
     end if;
1237
     if Rising_Edge(CLK) and DevAddr = '1' then
1238
        if irdevs = true then
1239
           irdevs := false;
1240
           assert(IRDY_N'Last_Event >= tsetup)
1241
             report"Target device: IRDY setup time violation in current data transfer!"
1242
             severity warning;
1243
        end if;
1244
        if idsevs = true then
1245
           idsevs := false;
1246
           assert(IDSEL'Last_Event >= tsetup)
1247
             report"Target device: IDSEL setup time violation!"
1248
             severity warning;
1249
        end if;
1250
        if FRAME_N = '0' and IRDY_N = '1' then
1251
           counter := counter + 1 ;
1252
        end if;
1253
        assert (counter <= 8)
1254
          report"Target device: IRDY has not been asserted within 8 clocks from FRAME assertion!"
1255
          severity warning;
1256
     elsif Falling_Edge(FRAME_N) then
1257
           counter := 0;
1258
     elsif Rising_Edge(FRAME_N) then
1259
         assert(CLK'Last_Event <= thold)
1260
           report"Target device: FRAME hold time violation in current data transfer!"
1261
           severity warning;
1262
     elsif Falling_Edge(IRDY_N) and DevAddr = '1' then
1263
        irdevs := true;
1264
     elsif Rising_Edge(IRDY_N) and DevAddr = '1' then
1265
         assert(CLK'Last_Event <= thold)
1266
           report"Target device: IRDY hold time violation in current data transfer!"
1267
           severity warning;
1268
     elsif Rising_Edge(IDSEL) and DevAddr = '1' then
1269
         idsevs := true;
1270
     elsif Falling_Edge(IDSEL) and DevAddr = '1' then
1271
         assert(CLK'Last_Event <= thold)
1272
           report"Target device: IDSEL hold time violation!"
1273
           severity warning;
1274
     end if;
1275
  end process;
1276
end Behavior; --================ End of architecture ================--
1277
-----------------------------------------------------------------------
1278
-- Revision list
1279
-- Version     Author          Date           Changes
1280
--
1281
-- 0.1       Ovidiu Lupas   June 09, 2000     New model
1282
-----------------------------------------------------------------------
1283
 

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