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//-----------------------------------------------------------------------------
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//
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// (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
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//
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// This file contains confidential and proprietary information
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// of Xilinx, Inc. and is protected under U.S. and
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// international copyright and other intellectual property
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// laws.
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//
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// DISCLAIMER
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// This disclaimer is not a license and does not grant any
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// rights to the materials distributed herewith. Except as
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// otherwise provided in a valid license issued to you by
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// Xilinx, and to the maximum extent permitted by applicable
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// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
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// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
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// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
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// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
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// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
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// (2) Xilinx shall not be liable (whether in contract or tort,
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// including negligence, or under any other theory of
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// liability) for any loss or damage of any kind or nature
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// related to, arising under or in connection with these
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// materials, including for any direct, or any indirect,
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// special, incidental, or consequential loss or damage
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// (including loss of data, profits, goodwill, or any type of
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// loss or damage suffered as a result of any action brought
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// by a third party) even if such damage or loss was
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// reasonably foreseeable or Xilinx had been advised of the
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// possibility of the same.
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//
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// CRITICAL APPLICATIONS
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// Xilinx products are not designed or intended to be fail-
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// safe, or for use in any application requiring fail-safe
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// performance, such as life-support or safety devices or
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// systems, Class III medical devices, nuclear facilities,
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// applications related to the deployment of airbags, or any
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// other applications that could lead to death, personal
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// injury, or severe property or environmental damage
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// (individually and collectively, "Critical
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// Applications"). Customer assumes the sole risk and
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// liability of any use of Xilinx products in Critical
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// Applications, subject only to applicable laws and
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// regulations governing limitations on product liability.
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//
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// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
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// PART OF THIS FILE AT ALL TIMES.
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//
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//-----------------------------------------------------------------------------
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// Project : V5-Block Plus for PCI Express
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// File : extend_clk.v
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//--------------------------------------------------------------------------------
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//--------------------------------------------------------------------------------
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//
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// ____ ____
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// / /\/ /
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// /___/ \ / Vendor : Xilinx
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// \ \ \/ Version : 1.1
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// \ \ Application : Generated by Xilinx PCI Express Wizard
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// / / Filename : extend_clk.v
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// /___/ /\ Module : Extend Clk period of certain signals
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// \ \ / \
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// \___\/\___\
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//
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//------------------------------------------------------------------------------
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// Purpose: Extend signals coming out of Block that are clocked with core_clk
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// by 0, 2 or 4 signals depending on frequency so BlkPlus(clocked using
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// user_clk) logic does not miss them.
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`ifndef Tcq
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`define Tcq 1
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`endif
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module extend_clk
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#(
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// use 1 for 250Mhz use 2 for 125Mhz and 4 for 62.5Mhz
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parameter CLKRATIO=1
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)
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(
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input clk,
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input rst_n,
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input [6:0] l0_dll_error_vector,
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input [1:0] l0_rx_mac_link_error,
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output [6:0] l0_dll_error_vector_retime,
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output [1:0] l0_rx_mac_link_error_retime
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);
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reg [6:0] l0_dll_error_vector_d;
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reg [6:0] l0_dll_error_vector_dd;
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reg [6:0] l0_dll_error_vector_ddd;
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reg [1:0] l0_rx_mac_link_error_d;
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reg [1:0] l0_rx_mac_link_error_dd;
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reg [1:0] l0_rx_mac_link_error_ddd;
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always @(posedge clk) begin
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if (CLKRATIO == 2) begin // 125Mhz
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if (!rst_n) begin
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l0_dll_error_vector_d <= #`Tcq 6'h00;
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l0_rx_mac_link_error_d <= #`Tcq 2'h0;
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end else begin
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l0_dll_error_vector_d <= #`Tcq l0_dll_error_vector;
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l0_rx_mac_link_error_d <= #`Tcq l0_rx_mac_link_error;
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end
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end else if (CLKRATIO == 4) begin // 62.5Mhz
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if (!rst_n)
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begin
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l0_dll_error_vector_d <= #`Tcq 6'h00;
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l0_dll_error_vector_dd <= #`Tcq 6'h00;
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l0_dll_error_vector_ddd <= #`Tcq 6'h00;
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l0_rx_mac_link_error_d <= #`Tcq 2'h0;
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l0_rx_mac_link_error_dd <= #`Tcq 2'h0;
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l0_rx_mac_link_error_ddd <= #`Tcq 2'h0;
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end else begin
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l0_dll_error_vector_d <= #`Tcq l0_dll_error_vector;
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l0_dll_error_vector_dd <= #`Tcq l0_dll_error_vector_d;
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l0_dll_error_vector_ddd <= #`Tcq l0_dll_error_vector_dd;
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l0_rx_mac_link_error_d <= #`Tcq l0_rx_mac_link_error;
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l0_rx_mac_link_error_dd <= #`Tcq l0_rx_mac_link_error_d;
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l0_rx_mac_link_error_ddd <= #`Tcq l0_rx_mac_link_error_dd;
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end
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end
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end
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assign l0_dll_error_vector_retime[6] =
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(CLKRATIO==2) ? (l0_dll_error_vector[6] | l0_dll_error_vector_d[6]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[6] | l0_dll_error_vector_d[6] |
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l0_dll_error_vector_dd[6] | l0_dll_error_vector_ddd[6]) :
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l0_dll_error_vector[6];
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assign l0_dll_error_vector_retime[5] =
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(CLKRATIO==2) ? (l0_dll_error_vector[5] | l0_dll_error_vector_d[5]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[5] | l0_dll_error_vector_d[5] |
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l0_dll_error_vector_dd[5] | l0_dll_error_vector_ddd[5]) :
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l0_dll_error_vector[5];
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assign l0_dll_error_vector_retime[4] =
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(CLKRATIO==2) ? (l0_dll_error_vector[4] | l0_dll_error_vector_d[4]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[4] | l0_dll_error_vector_d[4] |
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l0_dll_error_vector_dd[4] | l0_dll_error_vector_ddd[4]) :
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l0_dll_error_vector[4];
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assign l0_dll_error_vector_retime[3] =
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(CLKRATIO==2) ? (l0_dll_error_vector[3] | l0_dll_error_vector_d[3]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[3] | l0_dll_error_vector_d[3] |
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l0_dll_error_vector_dd[3] | l0_dll_error_vector_ddd[3]) :
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l0_dll_error_vector[3];
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assign l0_dll_error_vector_retime[2] =
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(CLKRATIO==2) ? (l0_dll_error_vector[2] | l0_dll_error_vector_d[2]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[2] | l0_dll_error_vector_d[2] |
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l0_dll_error_vector_dd[2] | l0_dll_error_vector_ddd[2]) :
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l0_dll_error_vector[2];
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assign l0_dll_error_vector_retime[1] =
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(CLKRATIO==2) ? (l0_dll_error_vector[1] | l0_dll_error_vector_d[1]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[1] | l0_dll_error_vector_d[1] |
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l0_dll_error_vector_dd[1] | l0_dll_error_vector_ddd[1]) :
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l0_dll_error_vector[1];
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assign l0_dll_error_vector_retime[0] =
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(CLKRATIO==2) ? (l0_dll_error_vector[0] | l0_dll_error_vector_d[0]) :
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(CLKRATIO==4) ? (l0_dll_error_vector[0] | l0_dll_error_vector_d[0] |
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l0_dll_error_vector_dd[0] | l0_dll_error_vector_ddd[0]) :
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l0_dll_error_vector[0];
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assign l0_rx_mac_link_error_retime[1] =
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(CLKRATIO==2) ? (l0_rx_mac_link_error[1] | l0_rx_mac_link_error_d[1]) :
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(CLKRATIO==4) ? (l0_rx_mac_link_error_d[1] | l0_rx_mac_link_error_dd[1] |
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l0_rx_mac_link_error_dd[1] | l0_rx_mac_link_error_ddd[1]) :
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l0_rx_mac_link_error;
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assign l0_rx_mac_link_error_retime[0] =
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(CLKRATIO==2) ? (l0_rx_mac_link_error[0] | l0_rx_mac_link_error_d[0]) :
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(CLKRATIO==4) ? (l0_rx_mac_link_error_d[0] | l0_rx_mac_link_error_dd[0] |
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l0_rx_mac_link_error_dd[0] | l0_rx_mac_link_error_ddd[0]) :
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l0_rx_mac_link_error;
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endmodule
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