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-------------------------------------------------------------------------------
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--
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-- Title : pcie_core64_m6
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-- Author : Dmitry Smekhov
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-- Company : Instrumental Systems
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-- E-mail : dsmv@insys.ru
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--
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-- Version : 1.0
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--
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-------------------------------------------------------------------------------
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--
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-- Description : Контроллер шины PCI Express
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-- Модификация 6 - для подключения к Spartan-6
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use work.core64_type_pkg.all;
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package pcie_core64_m6_pkg is
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--! контроллер PCI-Express
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component pcie_core64_m6 is
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generic (
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is_simulation : integer:=0 --! 0 - синтез, 1 - моделирование
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);
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port (
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---- PCI-Express ----
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txp : out std_logic_vector( 0 downto 0 );
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txn : out std_logic_vector( 0 downto 0 );
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rxp : in std_logic_vector( 0 downto 0 );
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rxn : in std_logic_vector( 0 downto 0 );
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mgt125 : in std_logic; -- тактовая частота 125 MHz от PCI_Express
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perst : in std_logic; -- 0 - сброс
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px : out std_logic_vector( 7 downto 0 ); --! контрольные точки
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pcie_lstatus : out std_logic_vector( 15 downto 0 ); -- регистр LSTATUS
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pcie_link_up : out std_logic; -- 0 - завершена инициализация PCI-Express
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---- Локальная шина ----
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clk_out : out std_logic; --! тактовая частота 250 MHz
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reset_out : out std_logic; --! 0 - сброс
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dcm_rstp : out std_logic; --! 1 - сброс DCM 266 МГц
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---- BAR0 - блоки управления ----
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bp_host_data : out std_logic_vector( 31 downto 0 ); --! шина данных - выход
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bp_data : in std_logic_vector( 31 downto 0 ); --! шина данных - вход
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bp_adr : out std_logic_vector( 19 downto 0 ); --! адрес регистра
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bp_we : out std_logic_vector( 3 downto 0 ); --! 1 - запись в регистры
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bp_rd : out std_logic_vector( 3 downto 0 ); --! 1 - чтение из регистров блока
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bp_sel : out std_logic_vector( 1 downto 0 ); --! номер блока для чтения
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bp_reg_we : out std_logic; --! 1 - запись в регистр по адресам 0x100000 - 0x1FFFFF
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bp_reg_rd : out std_logic; --! 1 - чтение из регистра по адресам 0x100000 - 0x1FFFFF
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bp_irq : in std_logic; --! 1 - запрос прерывания
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---- BAR1 ----
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aclk : in std_logic; --! тактовая частота локальной шины - 266 МГц
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aclk_lock : in std_logic; --! 1 - захват частоты
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pb_master : out type_pb_master; --! запрос
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pb_slave : in type_pb_slave --! ответ
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);
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end component;
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end package;
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library ieee;
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use ieee.std_logic_1164.all;
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use work.core64_type_pkg.all;
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use work.core64_rx_engine_m4_pkg.all;
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use work.core64_tx_engine_m4_pkg.all;
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use work.core64_reg_access_pkg.all;
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use work.core64_pb_disp_pkg.all;
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use work.block_pe_fifo_ext_pkg.all;
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use work.core64_interrupt_pkg.all;
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--! контроллер PCI-Express
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entity pcie_core64_m6 is
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generic (
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is_simulation : integer:=0 --! 0 - синтез, 1 - моделирование
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);
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port (
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---- PCI-Express ----
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txp : out std_logic_vector( 0 downto 0 );
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txn : out std_logic_vector( 0 downto 0 );
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rxp : in std_logic_vector( 0 downto 0 );
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rxn : in std_logic_vector( 0 downto 0 );
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mgt125 : in std_logic; -- тактовая частота 125 MHz от PCI_Express
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perst : in std_logic; -- 0 - сброс
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px : out std_logic_vector( 7 downto 0 ); --! контрольные точки
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pcie_lstatus : out std_logic_vector( 15 downto 0 ); -- регистр LSTATUS
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pcie_link_up : out std_logic; -- 0 - завершена инициализация PCI-Express
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---- Локальная шина ----
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clk_out : out std_logic; --! тактовая частота 250 MHz
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reset_out : out std_logic; --! 0 - сброс
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dcm_rstp : out std_logic; --! 1 - сброс DCM 266 МГц
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---- BAR0 - блоки управления ----
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bp_host_data : out std_logic_vector( 31 downto 0 ); --! шина данных - выход
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bp_data : in std_logic_vector( 31 downto 0 ); --! шина данных - вход
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bp_adr : out std_logic_vector( 19 downto 0 ); --! адрес регистра
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bp_we : out std_logic_vector( 3 downto 0 ); --! 1 - запись в регистры
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bp_rd : out std_logic_vector( 3 downto 0 ); --! 1 - чтение из регистров блока
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bp_sel : out std_logic_vector( 1 downto 0 ); --! номер блока для чтения
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bp_reg_we : out std_logic; --! 1 - запись в регистр по адресам 0x100000 - 0x1FFFFF
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bp_reg_rd : out std_logic; --! 1 - чтение из регистра по адресам 0x100000 - 0x1FFFFF
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bp_irq : in std_logic; --! 1 - запрос прерывания
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---- BAR1 ----
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aclk : in std_logic; --! тактовая частота локальной шины - 266 МГц
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aclk_lock : in std_logic; --! 1 - захват частоты
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pb_master : out type_pb_master; --! запрос
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pb_slave : in type_pb_slave --! ответ
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);
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end pcie_core64_m6;
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architecture pcie_core64_m6 of pcie_core64_m6 is
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component cl_s6pcie_m2 is
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generic (
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TL_TX_RAM_RADDR_LATENCY : integer := 0;
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TL_TX_RAM_RDATA_LATENCY : integer := 2;
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TL_RX_RAM_RADDR_LATENCY : integer := 0;
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TL_RX_RAM_RDATA_LATENCY : integer := 2;
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TL_RX_RAM_WRITE_LATENCY : integer := 0;
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VC0_TX_LASTPACKET : integer := 28;
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VC0_RX_RAM_LIMIT : bit_vector := x"7FF";
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VC0_TOTAL_CREDITS_PH : integer := 32;
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VC0_TOTAL_CREDITS_PD : integer := 211;
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VC0_TOTAL_CREDITS_NPH : integer := 8;
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VC0_TOTAL_CREDITS_CH : integer := 40;
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VC0_TOTAL_CREDITS_CD : integer := 211;
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VC0_CPL_INFINITE : boolean := TRUE;
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BAR0 : bit_vector := x"FFE00000";
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BAR1 : bit_vector := x"FFE00000";
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BAR2 : bit_vector := x"00000000";
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BAR3 : bit_vector := x"00000000";
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BAR4 : bit_vector := x"00000000";
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BAR5 : bit_vector := x"00000000";
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EXPANSION_ROM : bit_vector := "0000000000000000000000";
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DISABLE_BAR_FILTERING : boolean := FALSE;
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DISABLE_ID_CHECK : boolean := FALSE;
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TL_TFC_DISABLE : boolean := FALSE;
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TL_TX_CHECKS_DISABLE : boolean := FALSE;
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USR_CFG : boolean := FALSE;
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USR_EXT_CFG : boolean := FALSE;
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DEV_CAP_MAX_PAYLOAD_SUPPORTED : integer := 1;
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CLASS_CODE : bit_vector := x"FFFFFF";
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CARDBUS_CIS_POINTER : bit_vector := x"00000000";
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PCIE_CAP_CAPABILITY_VERSION : bit_vector := x"1";
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PCIE_CAP_DEVICE_PORT_TYPE : bit_vector := x"0";
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PCIE_CAP_SLOT_IMPLEMENTED : boolean := FALSE;
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PCIE_CAP_INT_MSG_NUM : bit_vector := "00000";
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DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT : integer := 0;
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DEV_CAP_EXT_TAG_SUPPORTED : boolean := FALSE;
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DEV_CAP_ENDPOINT_L0S_LATENCY : integer := 7;
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DEV_CAP_ENDPOINT_L1_LATENCY : integer := 7;
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SLOT_CAP_ATT_BUTTON_PRESENT : boolean := FALSE;
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SLOT_CAP_ATT_INDICATOR_PRESENT : boolean := FALSE;
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SLOT_CAP_POWER_INDICATOR_PRESENT : boolean := FALSE;
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DEV_CAP_ROLE_BASED_ERROR : boolean := TRUE;
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LINK_CAP_ASPM_SUPPORT : integer := 1;
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LINK_CAP_L0S_EXIT_LATENCY : integer := 7;
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LINK_CAP_L1_EXIT_LATENCY : integer := 7;
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LL_ACK_TIMEOUT : bit_vector := x"0000";
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LL_ACK_TIMEOUT_EN : boolean := FALSE;
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LL_REPLAY_TIMEOUT : bit_vector := x"0000";
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LL_REPLAY_TIMEOUT_EN : boolean := FALSE;
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MSI_CAP_MULTIMSGCAP : integer := 0;
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MSI_CAP_MULTIMSG_EXTENSION : integer := 0;
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LINK_STATUS_SLOT_CLOCK_CONFIG : boolean := TRUE;
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PLM_AUTO_CONFIG : boolean := FALSE;
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FAST_TRAIN : boolean := FALSE;
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ENABLE_RX_TD_ECRC_TRIM : boolean := TRUE;
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DISABLE_SCRAMBLING : boolean := FALSE;
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PM_CAP_VERSION : integer := 3;
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PM_CAP_PME_CLOCK : boolean := FALSE;
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PM_CAP_DSI : boolean := FALSE;
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PM_CAP_AUXCURRENT : integer := 0;
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PM_CAP_D1SUPPORT : boolean := TRUE;
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PM_CAP_D2SUPPORT : boolean := TRUE;
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PM_CAP_PMESUPPORT : bit_vector := x"0F";
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PM_DATA0 : bit_vector := x"00";
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PM_DATA_SCALE0 : bit_vector := x"0";
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PM_DATA1 : bit_vector := x"00";
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PM_DATA_SCALE1 : bit_vector := x"0";
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PM_DATA2 : bit_vector := x"00";
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PM_DATA_SCALE2 : bit_vector := x"0";
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PM_DATA3 : bit_vector := x"00";
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PM_DATA_SCALE3 : bit_vector := x"0";
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PM_DATA4 : bit_vector := x"00";
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PM_DATA_SCALE4 : bit_vector := x"0";
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PM_DATA5 : bit_vector := x"00";
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PM_DATA_SCALE5 : bit_vector := x"0";
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PM_DATA6 : bit_vector := x"00";
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PM_DATA_SCALE6 : bit_vector := x"0";
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PM_DATA7 : bit_vector := x"00";
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PM_DATA_SCALE7 : bit_vector := x"0";
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PCIE_GENERIC : bit_vector := "000010101111";
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GTP_SEL : integer := 0;
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CFG_VEN_ID : std_logic_vector(15 downto 0) := x"4953";
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CFG_DEV_ID : std_logic_vector(15 downto 0) := x"5507";
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CFG_REV_ID : std_logic_vector(7 downto 0) := x"10";
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CFG_SUBSYS_VEN_ID : std_logic_vector(15 downto 0) := x"4953";
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CFG_SUBSYS_ID : std_logic_vector(15 downto 0) := x"0008";
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REF_CLK_FREQ : integer := 1
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);
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port (
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-- PCI Express Fabric Interface
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pci_exp_txp : out std_logic;
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pci_exp_txn : out std_logic;
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pci_exp_rxp : in std_logic;
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pci_exp_rxn : in std_logic;
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-- Transaction (TRN) Interface
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trn_lnk_up_n : out std_logic;
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-- Tx
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trn_td : in std_logic_vector(31 downto 0);
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trn_tsof_n : in std_logic;
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trn_teof_n : in std_logic;
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trn_tsrc_rdy_n : in std_logic;
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trn_tdst_rdy_n : out std_logic;
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trn_terr_drop_n : out std_logic;
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trn_tsrc_dsc_n : in std_logic;
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trn_terrfwd_n : in std_logic;
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trn_tbuf_av : out std_logic_vector(5 downto 0);
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trn_tstr_n : in std_logic;
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trn_tcfg_req_n : out std_logic;
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trn_tcfg_gnt_n : in std_logic;
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-- Rx
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trn_rd : out std_logic_vector(31 downto 0);
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trn_rsof_n : out std_logic;
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trn_reof_n : out std_logic;
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trn_rsrc_rdy_n : out std_logic;
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trn_rsrc_dsc_n : out std_logic;
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trn_rdst_rdy_n : in std_logic;
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trn_rerrfwd_n : out std_logic;
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trn_rnp_ok_n : in std_logic;
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trn_rbar_hit_n : out std_logic_vector(6 downto 0);
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trn_fc_sel : in std_logic_vector(2 downto 0);
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trn_fc_nph : out std_logic_vector(7 downto 0);
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trn_fc_npd : out std_logic_vector(11 downto 0);
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trn_fc_ph : out std_logic_vector(7 downto 0);
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trn_fc_pd : out std_logic_vector(11 downto 0);
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trn_fc_cplh : out std_logic_vector(7 downto 0);
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trn_fc_cpld : out std_logic_vector(11 downto 0);
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-- Host (CFG) Interface
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cfg_do : out std_logic_vector(31 downto 0);
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cfg_rd_wr_done_n : out std_logic;
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cfg_dwaddr : in std_logic_vector(9 downto 0);
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cfg_rd_en_n : in std_logic;
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cfg_err_ur_n : in std_logic;
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cfg_err_cor_n : in std_logic;
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cfg_err_ecrc_n : in std_logic;
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cfg_err_cpl_timeout_n : in std_logic;
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cfg_err_cpl_abort_n : in std_logic;
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cfg_err_posted_n : in std_logic;
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cfg_err_locked_n : in std_logic;
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cfg_err_tlp_cpl_header : in std_logic_vector(47 downto 0);
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cfg_err_cpl_rdy_n : out std_logic;
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cfg_interrupt_n : in std_logic;
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cfg_interrupt_rdy_n : out std_logic;
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cfg_interrupt_assert_n : in std_logic;
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cfg_interrupt_do : out std_logic_vector(7 downto 0);
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cfg_interrupt_di : in std_logic_vector(7 downto 0);
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cfg_interrupt_mmenable : out std_logic_vector(2 downto 0);
|
299 |
|
|
cfg_interrupt_msienable : out std_logic;
|
300 |
|
|
cfg_turnoff_ok_n : in std_logic;
|
301 |
|
|
cfg_to_turnoff_n : out std_logic;
|
302 |
|
|
cfg_pm_wake_n : in std_logic;
|
303 |
|
|
cfg_pcie_link_state_n : out std_logic_vector(2 downto 0);
|
304 |
|
|
cfg_trn_pending_n : in std_logic;
|
305 |
|
|
cfg_dsn : in std_logic_vector(63 downto 0);
|
306 |
|
|
cfg_bus_number : out std_logic_vector(7 downto 0);
|
307 |
|
|
cfg_device_number : out std_logic_vector(4 downto 0);
|
308 |
|
|
cfg_function_number : out std_logic_vector(2 downto 0);
|
309 |
|
|
cfg_status : out std_logic_vector(15 downto 0);
|
310 |
|
|
cfg_command : out std_logic_vector(15 downto 0);
|
311 |
|
|
cfg_dstatus : out std_logic_vector(15 downto 0);
|
312 |
|
|
cfg_dcommand : out std_logic_vector(15 downto 0);
|
313 |
|
|
cfg_lstatus : out std_logic_vector(15 downto 0);
|
314 |
|
|
cfg_lcommand : out std_logic_vector(15 downto 0);
|
315 |
|
|
|
316 |
|
|
-- System Interface
|
317 |
|
|
sys_clk : in std_logic;
|
318 |
|
|
sys_reset_n : in std_logic;
|
319 |
|
|
trn_clk : out std_logic;
|
320 |
|
|
trn_reset_n : out std_logic;
|
321 |
|
|
received_hot_reset : out std_logic
|
322 |
|
|
);
|
323 |
|
|
end component;
|
324 |
|
|
|
325 |
|
|
|
326 |
|
|
--signal sys_clk_c : std_logic;
|
327 |
|
|
|
328 |
|
|
--signal sys_reset_n_c : std_logic;
|
329 |
|
|
signal trn_clk_c : std_logic;
|
330 |
|
|
signal trn_reset_n_c : std_logic;
|
331 |
|
|
signal trn_lnk_up_n_c : std_logic;
|
332 |
|
|
signal cfg_trn_pending_n_c : std_logic;
|
333 |
|
|
signal trn_tsof_n_c : std_logic;
|
334 |
|
|
signal trn_teof_n_c : std_logic;
|
335 |
|
|
signal trn_tsrc_rdy_n_c : std_logic;
|
336 |
|
|
signal trn_tdst_rdy_n_c : std_logic;
|
337 |
|
|
signal trn_tsrc_dsc_n_c : std_logic;
|
338 |
|
|
signal trn_terrfwd_n_c : std_logic;
|
339 |
|
|
signal trn_tdst_dsc_n_c : std_logic;
|
340 |
|
|
signal trn_td_c : std_logic_vector((64 - 1) downto 0);
|
341 |
|
|
signal trn_trem_n_c : std_logic_vector(7 downto 0);
|
342 |
|
|
signal trn_tbuf_av_c : std_logic_vector(( 4 -1 ) downto 0);
|
343 |
|
|
signal trn_rsof_n_c : std_logic;
|
344 |
|
|
signal trn_reof_n_c : std_logic;
|
345 |
|
|
signal trn_rsrc_rdy_n_c : std_logic;
|
346 |
|
|
signal trn_rsrc_dsc_n_c : std_logic;
|
347 |
|
|
signal trn_rdst_rdy_n_c : std_logic;
|
348 |
|
|
signal trn_rerrfwd_n_c : std_logic;
|
349 |
|
|
signal trn_rnp_ok_n_c : std_logic;
|
350 |
|
|
|
351 |
|
|
signal trn_rd_c : std_logic_vector((64 - 1) downto 0);
|
352 |
|
|
signal trn_rrem_n_c : std_logic_vector(7 downto 0);
|
353 |
|
|
signal trn_rbar_hit_n_c : std_logic_vector(6 downto 0);
|
354 |
|
|
signal trn_rfc_nph_av_c : std_logic_vector(7 downto 0);
|
355 |
|
|
signal trn_rfc_npd_av_c : std_logic_vector(11 downto 0);
|
356 |
|
|
signal trn_rfc_ph_av_c : std_logic_vector(7 downto 0);
|
357 |
|
|
signal trn_rfc_pd_av_c : std_logic_vector(11 downto 0);
|
358 |
|
|
signal trn_rcpl_streaming_n_c : std_logic;
|
359 |
|
|
|
360 |
|
|
signal cfg_do_c : std_logic_vector(31 downto 0);
|
361 |
|
|
signal cfg_di_c : std_logic_vector(31 downto 0);
|
362 |
|
|
signal cfg_dwaddr_c : std_logic_vector(9 downto 0) ;
|
363 |
|
|
signal cfg_byte_en_n_c : std_logic_vector(3 downto 0);
|
364 |
|
|
signal cfg_err_tlp_cpl_header_c : std_logic_vector(47 downto 0);
|
365 |
|
|
signal cfg_wr_en_n_c : std_logic;
|
366 |
|
|
signal cfg_rd_en_n_c : std_logic;
|
367 |
|
|
signal cfg_rd_wr_done_n_c : std_logic;
|
368 |
|
|
signal cfg_err_cor_n_c : std_logic;
|
369 |
|
|
signal cfg_err_ur_n_c : std_logic;
|
370 |
|
|
signal cfg_err_ecrc_n_c : std_logic;
|
371 |
|
|
signal cfg_err_cpl_timeout_n_c : std_logic;
|
372 |
|
|
signal cfg_err_cpl_abort_n_c : std_logic;
|
373 |
|
|
signal cfg_err_cpl_unexpect_n_c : std_logic;
|
374 |
|
|
signal cfg_err_posted_n_c : std_logic;
|
375 |
|
|
|
376 |
|
|
signal cfg_err_cpl_rdy_n_c : std_logic;
|
377 |
|
|
signal cfg_interrupt_n_c : std_logic;
|
378 |
|
|
signal cfg_interrupt_rdy_n_c : std_logic;
|
379 |
|
|
|
380 |
|
|
signal cfg_interrupt_assert_n_c : std_logic;
|
381 |
|
|
signal cfg_interrupt_di_c : std_logic_vector(7 downto 0);
|
382 |
|
|
signal cfg_interrupt_do_c : std_logic_vector(7 downto 0);
|
383 |
|
|
signal cfg_interrupt_mmenable_c : std_logic_vector(2 downto 0);
|
384 |
|
|
signal cfg_interrupt_msienable_c: std_logic;
|
385 |
|
|
|
386 |
|
|
signal cfg_turnoff_ok_n_c : std_logic;
|
387 |
|
|
signal cfg_to_turnoff_n_c : std_logic;
|
388 |
|
|
signal cfg_pm_wake_n_c : std_logic;
|
389 |
|
|
signal cfg_pcie_link_state_n_c : std_logic_vector(2 downto 0);
|
390 |
|
|
signal cfg_bus_number_c : std_logic_vector(7 downto 0);
|
391 |
|
|
signal cfg_device_number_c : std_logic_vector(4 downto 0);
|
392 |
|
|
signal cfg_function_number_c : std_logic_vector(2 downto 0);
|
393 |
|
|
signal cfg_status_c : std_logic_vector(15 downto 0);
|
394 |
|
|
signal cfg_command_c : std_logic_vector(15 downto 0);
|
395 |
|
|
signal cfg_dstatus_c : std_logic_vector(15 downto 0);
|
396 |
|
|
signal cfg_dcommand_c : std_logic_vector(15 downto 0);
|
397 |
|
|
signal cfg_lstatus_c : std_logic_vector(15 downto 0);
|
398 |
|
|
signal cfg_lcommand_c : std_logic_vector(15 downto 0);
|
399 |
|
|
--signal unsigned_fast_simulation: unsigned(0 downto 0);
|
400 |
|
|
signal vector_fast_simulation: std_logic_vector(0 downto 0):=(0=>'1');
|
401 |
|
|
|
402 |
|
|
signal refclkout : std_logic;
|
403 |
|
|
|
404 |
|
|
|
405 |
|
|
signal clk : std_logic;
|
406 |
|
|
signal rstp : std_logic;
|
407 |
|
|
signal trn_rx : type_trn_rx; --! приём пакета
|
408 |
|
|
signal trn_rx_back : type_trn_rx_back; --! готовность к приёму пакета
|
409 |
|
|
|
410 |
|
|
signal reg_access : type_reg_access; --! запрос на доступ к регистрам
|
411 |
|
|
|
412 |
|
|
signal rx_tx_engine : type_rx_tx_engine; --! обмен RX->TX
|
413 |
|
|
signal tx_rx_engine : type_tx_rx_engine; --! обмен TX->RX
|
414 |
|
|
|
415 |
|
|
signal rx_ext_fifo : type_rx_ext_fifo; --! обмен RX->EXT_FIFO
|
416 |
|
|
signal tx_ext_fifo : type_tx_ext_fifo;
|
417 |
|
|
signal tx_ext_fifo_back : type_tx_ext_fifo_back;
|
418 |
|
|
signal reg_access_back : type_reg_access_back;
|
419 |
|
|
signal completer_id : std_logic_vector( 15 downto 0 );
|
420 |
|
|
|
421 |
|
|
signal trn_tx : type_trn_tx;
|
422 |
|
|
signal trn_tx_back : type_trn_tx_back;
|
423 |
|
|
|
424 |
|
|
signal reg_disp : type_reg_disp;
|
425 |
|
|
signal reg_disp_back : type_reg_disp_back;
|
426 |
|
|
|
427 |
|
|
signal reg_ext_fifo : type_reg_ext_fifo;
|
428 |
|
|
signal reg_ext_fifo_back : type_reg_ext_fifo_back;
|
429 |
|
|
|
430 |
|
|
signal ext_fifo_disp : type_ext_fifo_disp; --! запрос на доступ от узла EXT_FIFO
|
431 |
|
|
signal ext_fifo_disp_back : type_ext_fifo_disp_back; --! ответ на запрос
|
432 |
|
|
|
433 |
|
|
signal pb_rstp : std_logic;
|
434 |
|
|
|
435 |
|
|
signal irq : std_logic;
|
436 |
|
|
|
437 |
|
|
function SET_FAST_TRAIN( is_simulation : integer ) return boolean is
|
438 |
|
|
|
439 |
|
|
variable ret : boolean;
|
440 |
|
|
begin
|
441 |
|
|
|
442 |
|
|
if( is_simulation=0 ) then
|
443 |
|
|
ret:=false;
|
444 |
|
|
else
|
445 |
|
|
ret:=true;
|
446 |
|
|
end if;
|
447 |
|
|
return ret;
|
448 |
|
|
|
449 |
|
|
end SET_FAST_TRAIN;
|
450 |
|
|
|
451 |
|
|
constant PL_FAST_TRAIN : boolean:= SET_FAST_TRAIN( is_simulation );
|
452 |
|
|
|
453 |
|
|
begin
|
454 |
|
|
|
455 |
|
|
gen_sim: if( is_simulation/=0 ) generate
|
456 |
|
|
vector_fast_simulation <= (others=>'1');
|
457 |
|
|
end generate;
|
458 |
|
|
|
459 |
|
|
gen_syn: if( is_simulation=0 ) generate
|
460 |
|
|
vector_fast_simulation <= (others=>'0');
|
461 |
|
|
end generate;
|
462 |
|
|
|
463 |
|
|
|
464 |
|
|
clk_out <= clk;
|
465 |
|
|
reset_out <= not pb_rstp after 1 ns when rising_edge( clk );
|
466 |
|
|
|
467 |
|
|
ep : cl_s6pcie_m2
|
468 |
|
|
generic map
|
469 |
|
|
(
|
470 |
|
|
FAST_TRAIN => PL_FAST_TRAIN
|
471 |
|
|
)
|
472 |
|
|
port map
|
473 |
|
|
(
|
474 |
|
|
|
475 |
|
|
--
|
476 |
|
|
-- PCI Express Fabric Interface
|
477 |
|
|
--
|
478 |
|
|
|
479 |
|
|
pci_exp_txp => txp(0), -- O (7/3/0:0)
|
480 |
|
|
pci_exp_txn => txn(0), -- O (7/3/0:0)
|
481 |
|
|
pci_exp_rxp => rxp(0), -- O (7/3/0:0)
|
482 |
|
|
pci_exp_rxn => rxn(0), -- O (7/3/0:0)
|
483 |
|
|
|
484 |
|
|
|
485 |
|
|
--
|
486 |
|
|
-- System ( SYS ) Interface
|
487 |
|
|
--
|
488 |
|
|
sys_clk => mgt125, -- I
|
489 |
|
|
|
490 |
|
|
sys_reset_n => perst, -- I
|
491 |
|
|
|
492 |
|
|
-- refclkout => refclkout, -- O
|
493 |
|
|
|
494 |
|
|
--
|
495 |
|
|
-- Transaction ( TRN ) Interface
|
496 |
|
|
--
|
497 |
|
|
|
498 |
|
|
trn_clk => clk , -- O
|
499 |
|
|
trn_reset_n => trn_reset_n_c, -- O
|
500 |
|
|
trn_lnk_up_n => trn_lnk_up_n_c, -- O
|
501 |
|
|
|
502 |
|
|
-- Tx Local-Link
|
503 |
|
|
|
504 |
|
|
trn_td => trn_tx.trn_td( 31 downto 0 ), -- I (63/31:0)
|
505 |
|
|
-- trn_trem_n => trn_tx.trn_trem_n,
|
506 |
|
|
trn_tsof_n => trn_tx.trn_tsof_n, -- I
|
507 |
|
|
trn_teof_n => trn_tx.trn_teof_n, -- I
|
508 |
|
|
trn_tsrc_rdy_n => trn_tx.trn_tsrc_rdy_n, -- I
|
509 |
|
|
trn_tsrc_dsc_n => trn_tx.trn_tsrc_dsc_n, -- I
|
510 |
|
|
trn_terrfwd_n => trn_tx.trn_terrfwd_n, -- I
|
511 |
|
|
|
512 |
|
|
trn_tbuf_av => trn_tx_back.trn_tbuf_av, -- O (4/3:0)
|
513 |
|
|
trn_tdst_rdy_n => trn_tx_back.trn_tdst_rdy_n, -- O
|
514 |
|
|
-- trn_tdst_dsc_n => trn_tx_back.trn_tdst_dsc_n, -- O
|
515 |
|
|
|
516 |
|
|
trn_tstr_n => '1',
|
517 |
|
|
trn_tcfg_gnt_n => '0',
|
518 |
|
|
|
519 |
|
|
|
520 |
|
|
-- Rx Local-Link
|
521 |
|
|
|
522 |
|
|
trn_rd => trn_rx.trn_rd( 31 downto 0 ), -- O (63/31:0)
|
523 |
|
|
-- trn_rrem_n => trn_rx.trn_rrem_n,
|
524 |
|
|
trn_rsof_n => trn_rx.trn_rsof_n, -- O
|
525 |
|
|
trn_reof_n => trn_rx.trn_reof_n, -- O
|
526 |
|
|
trn_rsrc_rdy_n => trn_rx.trn_rsrc_rdy_n, -- O
|
527 |
|
|
trn_rsrc_dsc_n => trn_rx.trn_rsrc_dsc_n, -- O
|
528 |
|
|
trn_rdst_rdy_n => trn_rx_back.trn_rdst_rdy_n, -- I
|
529 |
|
|
trn_rerrfwd_n => trn_rx.trn_rerrfwd_n, -- O
|
530 |
|
|
trn_rnp_ok_n => trn_rx_back.trn_rnp_ok_n, -- I
|
531 |
|
|
trn_rbar_hit_n => trn_rx.trn_rbar_hit_n, -- O (6:0)
|
532 |
|
|
-- trn_rfc_nph_av => trn_rx.trn_rfc_nph_av, -- O (11:0)
|
533 |
|
|
-- trn_rfc_npd_av => trn_rx.trn_rfc_npd_av, -- O (7:0)
|
534 |
|
|
-- trn_rfc_ph_av => trn_rx.trn_rfc_ph_av, -- O (11:0)
|
535 |
|
|
-- trn_rfc_pd_av => trn_rx.trn_rfc_pd_av, -- O (7:0)
|
536 |
|
|
-- trn_rcpl_streaming_n => trn_rx_back.trn_rcpl_streaming_n,
|
537 |
|
|
|
538 |
|
|
trn_fc_sel => "000",
|
539 |
|
|
--
|
540 |
|
|
-- Host ( CFG ) Interface
|
541 |
|
|
--
|
542 |
|
|
|
543 |
|
|
cfg_do => cfg_do_c, -- O (31:0)
|
544 |
|
|
cfg_rd_wr_done_n => cfg_rd_wr_done_n_c, -- O
|
545 |
|
|
-- cfg_di => cfg_di_c, -- I (31:0)
|
546 |
|
|
-- cfg_byte_en_n => cfg_byte_en_n_c, -- I (3:0)
|
547 |
|
|
cfg_dwaddr => cfg_dwaddr_c, -- I (9:0)
|
548 |
|
|
-- cfg_wr_en_n => cfg_wr_en_n_c, -- I
|
549 |
|
|
cfg_rd_en_n => cfg_rd_en_n_c, -- I
|
550 |
|
|
cfg_err_cor_n => cfg_err_cor_n_c, -- I
|
551 |
|
|
cfg_err_ur_n => cfg_err_ur_n_c, -- I
|
552 |
|
|
cfg_err_ecrc_n => cfg_err_ecrc_n_c, -- I
|
553 |
|
|
cfg_err_cpl_timeout_n => cfg_err_cpl_timeout_n_c, -- I
|
554 |
|
|
cfg_err_cpl_abort_n => cfg_err_cpl_abort_n_c, -- I
|
555 |
|
|
-- cfg_err_cpl_unexpect_n => cfg_err_cpl_unexpect_n_c, -- I
|
556 |
|
|
cfg_err_posted_n => cfg_err_posted_n_c, -- I
|
557 |
|
|
cfg_err_cpl_rdy_n => cfg_err_cpl_rdy_n_c, -- O
|
558 |
|
|
cfg_err_locked_n => '1', -- I
|
559 |
|
|
cfg_err_tlp_cpl_header => cfg_err_tlp_cpl_header_c, -- I (47:0)
|
560 |
|
|
cfg_interrupt_n => cfg_interrupt_n_c, -- I
|
561 |
|
|
cfg_interrupt_rdy_n => cfg_interrupt_rdy_n_c, -- O
|
562 |
|
|
|
563 |
|
|
cfg_interrupt_assert_n => cfg_interrupt_assert_n_c, -- I
|
564 |
|
|
cfg_interrupt_di => cfg_interrupt_di_c, -- I [7:0]
|
565 |
|
|
cfg_interrupt_do => cfg_interrupt_do_c, -- O [7:0]
|
566 |
|
|
cfg_interrupt_mmenable => cfg_interrupt_mmenable_c, -- O [2:0]
|
567 |
|
|
cfg_interrupt_msienable=> cfg_interrupt_msienable_c, -- O
|
568 |
|
|
cfg_to_turnoff_n => cfg_to_turnoff_n_c, -- O
|
569 |
|
|
cfg_pm_wake_n => cfg_pm_wake_n_c, -- I
|
570 |
|
|
cfg_pcie_link_state_n => cfg_pcie_link_state_n_c, -- O (2:0)
|
571 |
|
|
cfg_trn_pending_n => cfg_trn_pending_n_c, -- I
|
572 |
|
|
cfg_bus_number => cfg_bus_number_c, -- O (7:0)
|
573 |
|
|
cfg_device_number => cfg_device_number_c, -- O (4:0)
|
574 |
|
|
cfg_function_number => cfg_function_number_c, -- O (2:0)
|
575 |
|
|
cfg_status => cfg_status_c, -- O (15:0)
|
576 |
|
|
cfg_command => cfg_command_c, -- O (15:0)
|
577 |
|
|
cfg_dstatus => cfg_dstatus_c, -- O (15:0)
|
578 |
|
|
cfg_dcommand => trn_tx_back.cfg_dcommand, -- O (15:0)
|
579 |
|
|
cfg_lstatus => cfg_lstatus_c, -- O (15:0)
|
580 |
|
|
cfg_lcommand => cfg_lcommand_c, -- O (15:0)
|
581 |
|
|
cfg_dsn => (others => '0'),
|
582 |
|
|
|
583 |
|
|
cfg_turnoff_ok_n => '1'
|
584 |
|
|
|
585 |
|
|
-- fast_train_simulation_only => vector_fast_simulation(0)
|
586 |
|
|
|
587 |
|
|
);
|
588 |
|
|
|
589 |
|
|
pcie_link_up <= trn_lnk_up_n_c;
|
590 |
|
|
pcie_lstatus <= cfg_lstatus_c;
|
591 |
|
|
|
592 |
|
|
rstp <= not trn_reset_n_c after 1 ns when rising_edge( clk );
|
593 |
|
|
dcm_rstp <= not trn_reset_n_c;
|
594 |
|
|
|
595 |
|
|
pb_rstp <= rstp or ( not aclk_lock ) after 1 ns when rising_edge( clk );
|
596 |
|
|
|
597 |
|
|
trn_rnp_ok_n_c <= '0';
|
598 |
|
|
trn_rcpl_streaming_n_c <= '1';
|
599 |
|
|
trn_terrfwd_n_c <= '1';
|
600 |
|
|
|
601 |
|
|
cfg_err_cor_n_c <= '1';
|
602 |
|
|
cfg_err_ur_n_c <= '1';
|
603 |
|
|
cfg_err_ecrc_n_c <= '1';
|
604 |
|
|
cfg_err_cpl_timeout_n_c <= '1';
|
605 |
|
|
cfg_err_cpl_abort_n_c <= '1';
|
606 |
|
|
cfg_err_cpl_unexpect_n_c <= '1';
|
607 |
|
|
cfg_err_posted_n_c <= '0';
|
608 |
|
|
|
609 |
|
|
cfg_interrupt_di_c <= X"00";
|
610 |
|
|
|
611 |
|
|
cfg_pm_wake_n_c <= '1';
|
612 |
|
|
cfg_trn_pending_n_c <= '1';
|
613 |
|
|
cfg_dwaddr_c <= (others => '0');
|
614 |
|
|
cfg_err_tlp_cpl_header_c <= (others => '0');
|
615 |
|
|
cfg_di_c <= (others => '0');
|
616 |
|
|
cfg_byte_en_n_c <= X"F"; -- 4-bit bus
|
617 |
|
|
cfg_wr_en_n_c <= '1';
|
618 |
|
|
cfg_rd_en_n_c <= '1';
|
619 |
|
|
-- cfg_completer_id_c <= (cfg_bus_number &
|
620 |
|
|
-- cfg_device_number &
|
621 |
|
|
-- cfg_function_number);
|
622 |
|
|
-- cfg_bus_mstr_enable_c <= cfg_command(2);
|
623 |
|
|
|
624 |
|
|
|
625 |
|
|
|
626 |
|
|
rx: core64_rx_engine_m4
|
627 |
|
|
port map(
|
628 |
|
|
|
629 |
|
|
--- General ---
|
630 |
|
|
rstp => rstp, --! 1 - сброс
|
631 |
|
|
clk => clk, --! тактовая частота ядра - 250 MHz
|
632 |
|
|
|
633 |
|
|
trn_rx => trn_rx, --! приём пакета
|
634 |
|
|
trn_rx_back => trn_rx_back, --! готовность к приёму пакета
|
635 |
|
|
|
636 |
|
|
reg_access => reg_access, --! запрос на доступ к регистрам
|
637 |
|
|
|
638 |
|
|
rx_tx_engine => rx_tx_engine, --! обмен RX->TX
|
639 |
|
|
tx_rx_engine => tx_rx_engine, --! обмен TX->RX
|
640 |
|
|
|
641 |
|
|
rx_ext_fifo => rx_ext_fifo --! обмен RX->EXT_FIFO
|
642 |
|
|
|
643 |
|
|
|
644 |
|
|
|
645 |
|
|
);
|
646 |
|
|
|
647 |
|
|
|
648 |
|
|
tx: core64_tx_engine_m4
|
649 |
|
|
port map(
|
650 |
|
|
|
651 |
|
|
--- General ---
|
652 |
|
|
rstp => rstp, --! 1 - сброс
|
653 |
|
|
clk => clk, --! тактовая частота ядра - 250 MHz
|
654 |
|
|
|
655 |
|
|
trn_tx => trn_tx, --! передача пакета
|
656 |
|
|
trn_tx_back => trn_tx_back, --! готовность к передаче пакета
|
657 |
|
|
|
658 |
|
|
completer_id => completer_id, --! идентификатор устройства
|
659 |
|
|
|
660 |
|
|
reg_access_back => reg_access_back, --! запрос на доступ к регистрам
|
661 |
|
|
|
662 |
|
|
rx_tx_engine => rx_tx_engine, --! обмен RX->TX
|
663 |
|
|
tx_rx_engine => tx_rx_engine, --! обмен TX->RX
|
664 |
|
|
|
665 |
|
|
tx_ext_fifo => tx_ext_fifo, --! обмен TX->EXT_FIFO
|
666 |
|
|
tx_ext_fifo_back=> tx_ext_fifo_back --! обмен TX->EXT_FIFO
|
667 |
|
|
|
668 |
|
|
);
|
669 |
|
|
|
670 |
|
|
completer_id <= (cfg_bus_number_c &
|
671 |
|
|
cfg_device_number_c &
|
672 |
|
|
cfg_function_number_c );
|
673 |
|
|
|
674 |
|
|
|
675 |
|
|
reg: core64_reg_access
|
676 |
|
|
port map(
|
677 |
|
|
--- General ---
|
678 |
|
|
rstp => rstp, --! 1 - сброс
|
679 |
|
|
clk => clk, --! тактовая частота ядра - 250 MHz
|
680 |
|
|
|
681 |
|
|
--- RX_ENGINE ----
|
682 |
|
|
reg_access => reg_access, --! запрос на доступ к регистрам
|
683 |
|
|
|
684 |
|
|
--- TX_ENGINE ----
|
685 |
|
|
reg_access_back => reg_access_back, --! ответ на запрос
|
686 |
|
|
|
687 |
|
|
---- PB_DISP ----
|
688 |
|
|
reg_disp => reg_disp, --! запрос на доступ к регистрам из BAR1
|
689 |
|
|
reg_disp_back => reg_disp_back, --! ответ на запрос
|
690 |
|
|
|
691 |
|
|
---- BLOCK EXT_FIFO ----
|
692 |
|
|
reg_ext_fifo => reg_ext_fifo, --! запрос на доступ к блокам управления EXT_FIFO
|
693 |
|
|
reg_ext_fifo_back => reg_ext_fifo_back, --! ответ на запрос
|
694 |
|
|
|
695 |
|
|
---- BAR0 - блоки управления ----
|
696 |
|
|
bp_host_data => bp_host_data, --! шина данных - выход
|
697 |
|
|
bp_data => bp_data, --! шина данных - вход
|
698 |
|
|
bp_adr => bp_adr, --! адрес регистра
|
699 |
|
|
bp_we => bp_we, --! 1 - запись в регистры
|
700 |
|
|
bp_rd => bp_rd, --! 1 - чтение из регистров блока
|
701 |
|
|
bp_sel => bp_sel, --! номер блока для чтения
|
702 |
|
|
bp_reg_we => bp_reg_we, --! 1 - запись в регистр по адресам 0x100000 - 0x1FFFFF
|
703 |
|
|
bp_reg_rd => bp_reg_rd, --! 1 - чтение из регистра по адресам 0x100000 - 0x1FFFFF
|
704 |
|
|
bp_irq => bp_irq --! 1 - запрос прерывания
|
705 |
|
|
);
|
706 |
|
|
|
707 |
|
|
|
708 |
|
|
disp: core64_pb_disp
|
709 |
|
|
port map(
|
710 |
|
|
--- General ---
|
711 |
|
|
rstp => pb_rstp, --! 1 - сброс
|
712 |
|
|
clk => clk, --! тактовая частота ядра - 250 MHz
|
713 |
|
|
|
714 |
|
|
---- PB_DISP ----
|
715 |
|
|
reg_disp => reg_disp, --! запрос на доступ к регистрам из BAR1
|
716 |
|
|
reg_disp_back => reg_disp_back, --! ответ на запрос
|
717 |
|
|
|
718 |
|
|
---- EXT_FIFO ----
|
719 |
|
|
ext_fifo_disp => ext_fifo_disp, --! запрос на доступ от узла EXT_FIFO
|
720 |
|
|
ext_fifo_disp_back => ext_fifo_disp_back, --! ответ на запрос
|
721 |
|
|
|
722 |
|
|
---- BAR1 ----
|
723 |
|
|
aclk => aclk, --! тактовая частота локальной шины - 266 МГц
|
724 |
|
|
pb_master => pb_master, --! запрос
|
725 |
|
|
pb_slave => pb_slave --! ответ
|
726 |
|
|
|
727 |
|
|
);
|
728 |
|
|
|
729 |
|
|
|
730 |
|
|
|
731 |
|
|
fifo: block_pe_fifo_ext
|
732 |
|
|
generic map(
|
733 |
|
|
is_dsp48 => 0 -- 1 - использовать DSP48, 0 - не использовать DSP48
|
734 |
|
|
)
|
735 |
|
|
port map(
|
736 |
|
|
|
737 |
|
|
---- Global ----
|
738 |
|
|
rstp => pb_rstp,
|
739 |
|
|
clk => clk,
|
740 |
|
|
aclk => aclk,
|
741 |
|
|
|
742 |
|
|
---- TX_ENGINE ----
|
743 |
|
|
tx_ext_fifo => tx_ext_fifo,
|
744 |
|
|
tx_ext_fifo_back => tx_ext_fifo_back,
|
745 |
|
|
|
746 |
|
|
---- RX_ENGINE ----
|
747 |
|
|
rx_ext_fifo => rx_ext_fifo,
|
748 |
|
|
|
749 |
|
|
---- REG ----
|
750 |
|
|
reg_ext_fifo => reg_ext_fifo,
|
751 |
|
|
reg_ext_fifo_back => reg_ext_fifo_back,
|
752 |
|
|
|
753 |
|
|
---- DISP ----
|
754 |
|
|
ext_fifo_disp => ext_fifo_disp,
|
755 |
|
|
ext_fifo_disp_back => ext_fifo_disp_back,
|
756 |
|
|
|
757 |
|
|
irq => irq, -- 1 - запрос прерывания
|
758 |
|
|
|
759 |
|
|
test => px
|
760 |
|
|
);
|
761 |
|
|
|
762 |
|
|
|
763 |
|
|
|
764 |
|
|
|
765 |
|
|
int: core64_interrupt
|
766 |
|
|
port map(
|
767 |
|
|
|
768 |
|
|
rstp => pb_rstp, -- 1 - сброс
|
769 |
|
|
clk => clk, -- Тактовая частота ядра 250 МГц
|
770 |
|
|
|
771 |
|
|
irq => irq, -- 1 - запрос прерывания
|
772 |
|
|
|
773 |
|
|
cfg_command10 => cfg_command_c(10), -- 1 - прерывания запрещены
|
774 |
|
|
cfg_interrupt => cfg_interrupt_n_c, -- 0 - изменение состояния прерывания
|
775 |
|
|
cfg_interrupt_assert => cfg_interrupt_assert_n_c,-- 0 - формирование прерывания, 1 - сниятие прерывания
|
776 |
|
|
cfg_interrupt_rdy => cfg_interrupt_rdy_n_c -- 0 - подтверждение изменения прерывания
|
777 |
|
|
|
778 |
|
|
);
|
779 |
|
|
|
780 |
|
|
-- cfg_interrupt_n_c <= '1';
|
781 |
|
|
-- cfg_interrupt_assert_n_c <= '1';
|
782 |
|
|
|
783 |
|
|
end pcie_core64_m6;
|