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Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] [wishbone/] [cross/] [wb_conmax_top_pkg.vhd] - Blame information for rev 2

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1 2 dsmv 
----------------------------------------------------------------------------------
2 
-- Company:         ;)
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-- Engineer:        Kuzmi4
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--
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-- Create Date:     17:40:25 05/21/2010
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-- Design Name:
7 
-- Module Name:     wb_conmax_top Verilog component package
8 
-- Project Name:    DS_DMA
9 
-- Target Devices:  any
10 
-- Tool versions:
11 
-- Description:
12 
--
13 
--
14 
--
15 
--
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-- Revision:
17 
-- Revision 0.01 - File Created
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--
19 
----------------------------------------------------------------------------------
20 
library IEEE;
21 
use IEEE.STD_LOGIC_1164.ALL;
22 
 
23 
package wb_conmax_top_pkg is
24 
-- Define WB_CROSS:
25 
component wb_conmax_top is
26 
generic
27 
(
28 
    dw  :   integer;
29 
    aw  :   integer
30 
 
31 
);
32 
port
33 
(
34 
    --
35 
    -- SYS_CON
36 
    clk_i : in  STD_LOGIC;
37 
    rst_i : in  STD_LOGIC;
38 
    --
39 
    -- Master 0 Interface
40 
    m0_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
41 
    m0_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
42 
    m0_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
43 
    m0_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
44 
    m0_we_i     :   in  STD_LOGIC;
45 
    m0_cyc_i    :   in  STD_LOGIC;
46 
    m0_stb_i    :   in  STD_LOGIC;
47 
    m0_ack_o    :   out STD_LOGIC;
48 
    m0_err_o    :   out STD_LOGIC;
49 
    m0_rty_o    :   out STD_LOGIC;
50 
    m0_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
51 
    m0_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
52 
    --
53 
    -- Master 1 Interface
54 
    m1_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
55 
    m1_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
56 
    m1_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
57 
    m1_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
58 
    m1_we_i     :   in  STD_LOGIC;
59 
    m1_cyc_i    :   in  STD_LOGIC;
60 
    m1_stb_i    :   in  STD_LOGIC;
61 
    m1_ack_o    :   out STD_LOGIC;
62 
    m1_err_o    :   out STD_LOGIC;
63 
    m1_rty_o    :   out STD_LOGIC;
64 
    m1_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
65 
    m1_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
66 
    --
67 
    -- Master 2 Interface
68 
    m2_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
69 
    m2_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
70 
    m2_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
71 
    m2_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
72 
    m2_we_i     :   in  STD_LOGIC;
73 
    m2_cyc_i    :   in  STD_LOGIC;
74 
    m2_stb_i    :   in  STD_LOGIC;
75 
    m2_ack_o    :   out STD_LOGIC;
76 
    m2_err_o    :   out STD_LOGIC;
77 
    m2_rty_o    :   out STD_LOGIC;
78 
    m2_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
79 
    m2_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
80 
    --
81 
    -- Master 3 Interface
82 
    m3_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
83 
    m3_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
84 
    m3_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
85 
    m3_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
86 
    m3_we_i     :   in  STD_LOGIC;
87 
    m3_cyc_i    :   in  STD_LOGIC;
88 
    m3_stb_i    :   in  STD_LOGIC;
89 
    m3_ack_o    :   out STD_LOGIC;
90 
    m3_err_o    :   out STD_LOGIC;
91 
    m3_rty_o    :   out STD_LOGIC;
92 
    m3_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
93 
    m3_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
94 
    --
95 
    -- Master 4 Interface
96 
    m4_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
97 
    m4_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
98 
    m4_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
99 
    m4_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
100 
    m4_we_i     :   in  STD_LOGIC;
101 
    m4_cyc_i    :   in  STD_LOGIC;
102 
    m4_stb_i    :   in  STD_LOGIC;
103 
    m4_ack_o    :   out STD_LOGIC;
104 
    m4_err_o    :   out STD_LOGIC;
105 
    m4_rty_o    :   out STD_LOGIC;
106 
    m4_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
107 
    m4_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
108 
    --
109 
    -- Master 5 Interface
110 
    m5_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
111 
    m5_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
112 
    m5_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
113 
    m5_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
114 
    m5_we_i     :   in  STD_LOGIC;
115 
    m5_cyc_i    :   in  STD_LOGIC;
116 
    m5_stb_i    :   in  STD_LOGIC;
117 
    m5_ack_o    :   out STD_LOGIC;
118 
    m5_err_o    :   out STD_LOGIC;
119 
    m5_rty_o    :   out STD_LOGIC;
120 
    m5_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
121 
    m5_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
122 
    --
123 
    -- Master 6 Interface
124 
    m6_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
125 
    m6_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
126 
    m6_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
127 
    m6_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
128 
    m6_we_i     :   in  STD_LOGIC;
129 
    m6_cyc_i    :   in  STD_LOGIC;
130 
    m6_stb_i    :   in  STD_LOGIC;
131 
    m6_ack_o    :   out STD_LOGIC;
132 
    m6_err_o    :   out STD_LOGIC;
133 
    m6_rty_o    :   out STD_LOGIC;
134 
    m6_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
135 
    m6_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
136 
    --
137 
    -- Master 7 Interface
138 
    m7_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
139 
    m7_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
140 
    m7_addr_i   :   in  STD_LOGIC_VECTOR(aw-1 downto 0);
141 
    m7_sel_i    :   in  STD_LOGIC_VECTOR(dw/8-1 downto 0);
142 
    m7_we_i     :   in  STD_LOGIC;
143 
    m7_cyc_i    :   in  STD_LOGIC;
144 
    m7_stb_i    :   in  STD_LOGIC;
145 
    m7_ack_o    :   out STD_LOGIC;
146 
    m7_err_o    :   out STD_LOGIC;
147 
    m7_rty_o    :   out STD_LOGIC;
148 
    m7_cti_i    :   in  STD_LOGIC_VECTOR(2 downto 0);
149 
    m7_bte_i    :   in  STD_LOGIC_VECTOR(1 downto 0);
150 
    --
151 
    --
152 
    -- Slave 0 Interface
153 
    s0_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
154 
    s0_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
155 
    s0_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
156 
    s0_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
157 
    s0_we_o     :   out STD_LOGIC;
158 
    s0_cyc_o    :   out STD_LOGIC;
159 
    s0_stb_o    :   out STD_LOGIC;
160 
    s0_ack_i    :   in  STD_LOGIC;
161 
    s0_err_i    :   in  STD_LOGIC;
162 
    s0_rty_i    :   in  STD_LOGIC;
163 
    s0_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
164 
    s0_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
165 
    --
166 
    -- Slave 1 Interface
167 
    s1_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
168 
    s1_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
169 
    s1_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
170 
    s1_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
171 
    s1_we_o     :   out STD_LOGIC;
172 
    s1_cyc_o    :   out STD_LOGIC;
173 
    s1_stb_o    :   out STD_LOGIC;
174 
    s1_ack_i    :   in  STD_LOGIC;
175 
    s1_err_i    :   in  STD_LOGIC;
176 
    s1_rty_i    :   in  STD_LOGIC;
177 
    s1_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
178 
    s1_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
179 
    --
180 
    -- Slave 2 Interface
181 
    s2_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
182 
    s2_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
183 
    s2_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
184 
    s2_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
185 
    s2_we_o     :   out STD_LOGIC;
186 
    s2_cyc_o    :   out STD_LOGIC;
187 
    s2_stb_o    :   out STD_LOGIC;
188 
    s2_ack_i    :   in  STD_LOGIC;
189 
    s2_err_i    :   in  STD_LOGIC;
190 
    s2_rty_i    :   in  STD_LOGIC;
191 
    s2_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
192 
    s2_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
193 
    --
194 
    -- Slave 3 Interface
195 
    s3_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
196 
    s3_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
197 
    s3_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
198 
    s3_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
199 
    s3_we_o     :   out STD_LOGIC;
200 
    s3_cyc_o    :   out STD_LOGIC;
201 
    s3_stb_o    :   out STD_LOGIC;
202 
    s3_ack_i    :   in  STD_LOGIC;
203 
    s3_err_i    :   in  STD_LOGIC;
204 
    s3_rty_i    :   in  STD_LOGIC;
205 
    s3_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
206 
    s3_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
207 
    --
208 
    -- Slave 4 Interface
209 
    s4_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
210 
    s4_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
211 
    s4_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
212 
    s4_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
213 
    s4_we_o     :   out STD_LOGIC;
214 
    s4_cyc_o    :   out STD_LOGIC;
215 
    s4_stb_o    :   out STD_LOGIC;
216 
    s4_ack_i    :   in  STD_LOGIC;
217 
    s4_err_i    :   in  STD_LOGIC;
218 
    s4_rty_i    :   in  STD_LOGIC;
219 
    s4_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
220 
    s4_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
221 
    --
222 
    -- Slave 5 Interface
223 
    s5_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
224 
    s5_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
225 
    s5_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
226 
    s5_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
227 
    s5_we_o     :   out STD_LOGIC;
228 
    s5_cyc_o    :   out STD_LOGIC;
229 
    s5_stb_o    :   out STD_LOGIC;
230 
    s5_ack_i    :   in  STD_LOGIC;
231 
    s5_err_i    :   in  STD_LOGIC;
232 
    s5_rty_i    :   in  STD_LOGIC;
233 
    s5_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
234 
    s5_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
235 
    --
236 
    -- Slave 6 Interface
237 
    s6_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
238 
    s6_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
239 
    s6_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
240 
    s6_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
241 
    s6_we_o     :   out STD_LOGIC;
242 
    s6_cyc_o    :   out STD_LOGIC;
243 
    s6_stb_o    :   out STD_LOGIC;
244 
    s6_ack_i    :   in  STD_LOGIC;
245 
    s6_err_i    :   in  STD_LOGIC;
246 
    s6_rty_i    :   in  STD_LOGIC;
247 
    s6_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
248 
    s6_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
249 
    --
250 
    -- Slave 7 Interface
251 
    s7_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
252 
    s7_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
253 
    s7_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
254 
    s7_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
255 
    s7_we_o     :   out STD_LOGIC;
256 
    s7_cyc_o    :   out STD_LOGIC;
257 
    s7_stb_o    :   out STD_LOGIC;
258 
    s7_ack_i    :   in  STD_LOGIC;
259 
    s7_err_i    :   in  STD_LOGIC;
260 
    s7_rty_i    :   in  STD_LOGIC;
261 
    s7_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
262 
    s7_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
263 
    --
264 
    -- Slave 8 Interface
265 
    s8_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
266 
    s8_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
267 
    s8_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
268 
    s8_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
269 
    s8_we_o     :   out STD_LOGIC;
270 
    s8_cyc_o    :   out STD_LOGIC;
271 
    s8_stb_o    :   out STD_LOGIC;
272 
    s8_ack_i    :   in  STD_LOGIC;
273 
    s8_err_i    :   in  STD_LOGIC;
274 
    s8_rty_i    :   in  STD_LOGIC;
275 
    s8_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
276 
    s8_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
277 
    --
278 
    -- Slave 9 Interface
279 
    s9_data_i   :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
280 
    s9_data_o   :   out STD_LOGIC_VECTOR(dw-1 downto 0);
281 
    s9_addr_o   :   out STD_LOGIC_VECTOR(aw-1 downto 0);
282 
    s9_sel_o    :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
283 
    s9_we_o     :   out STD_LOGIC;
284 
    s9_cyc_o    :   out STD_LOGIC;
285 
    s9_stb_o    :   out STD_LOGIC;
286 
    s9_ack_i    :   in  STD_LOGIC;
287 
    s9_err_i    :   in  STD_LOGIC;
288 
    s9_rty_i    :   in  STD_LOGIC;
289 
    s9_cti_o    :   out STD_LOGIC_VECTOR(2 downto 0);
290 
    s9_bte_o    :   out STD_LOGIC_VECTOR(1 downto 0);
291 
    --
292 
    -- Slave 10 Interface
293 
    s10_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
294 
    s10_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
295 
    s10_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
296 
    s10_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
297 
    s10_we_o    :   out STD_LOGIC;
298 
    s10_cyc_o   :   out STD_LOGIC;
299 
    s10_stb_o   :   out STD_LOGIC;
300 
    s10_ack_i   :   in  STD_LOGIC;
301 
    s10_err_i   :   in  STD_LOGIC;
302 
    s10_rty_i   :   in  STD_LOGIC;
303 
    s10_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
304 
    s10_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0);
305 
    --
306 
    -- Slave 11 Interface
307 
    s11_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
308 
    s11_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
309 
    s11_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
310 
    s11_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
311 
    s11_we_o    :   out STD_LOGIC;
312 
    s11_cyc_o   :   out STD_LOGIC;
313 
    s11_stb_o   :   out STD_LOGIC;
314 
    s11_ack_i   :   in  STD_LOGIC;
315 
    s11_err_i   :   in  STD_LOGIC;
316 
    s11_rty_i   :   in  STD_LOGIC;
317 
    s11_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
318 
    s11_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0);
319 
    --
320 
    -- Slave 12 Interface
321 
    s12_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
322 
    s12_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
323 
    s12_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
324 
    s12_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
325 
    s12_we_o    :   out STD_LOGIC;
326 
    s12_cyc_o   :   out STD_LOGIC;
327 
    s12_stb_o   :   out STD_LOGIC;
328 
    s12_ack_i   :   in  STD_LOGIC;
329 
    s12_err_i   :   in  STD_LOGIC;
330 
    s12_rty_i   :   in  STD_LOGIC;
331 
    s12_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
332 
    s12_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0);
333 
    --
334 
    -- Slave 13 Interface
335 
    s13_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
336 
    s13_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
337 
    s13_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
338 
    s13_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
339 
    s13_we_o    :   out STD_LOGIC;
340 
    s13_cyc_o   :   out STD_LOGIC;
341 
    s13_stb_o   :   out STD_LOGIC;
342 
    s13_ack_i   :   in  STD_LOGIC;
343 
    s13_err_i   :   in  STD_LOGIC;
344 
    s13_rty_i   :   in  STD_LOGIC;
345 
    s13_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
346 
    s13_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0);
347 
    --
348 
    -- Slave 14 Interface
349 
    s14_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
350 
    s14_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
351 
    s14_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
352 
    s14_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
353 
    s14_we_o    :   out STD_LOGIC;
354 
    s14_cyc_o   :   out STD_LOGIC;
355 
    s14_stb_o   :   out STD_LOGIC;
356 
    s14_ack_i   :   in  STD_LOGIC;
357 
    s14_err_i   :   in  STD_LOGIC;
358 
    s14_rty_i   :   in  STD_LOGIC;
359 
    s14_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
360 
    s14_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0);
361 
    --
362 
    -- Slave 15 Interface
363 
    s15_data_i  :   in  STD_LOGIC_VECTOR(dw-1 downto 0);
364 
    s15_data_o  :   out STD_LOGIC_VECTOR(dw-1 downto 0);
365 
    s15_addr_o  :   out STD_LOGIC_VECTOR(aw-1 downto 0);
366 
    s15_sel_o   :   out STD_LOGIC_VECTOR(dw/8-1 downto 0);
367 
    s15_we_o    :   out STD_LOGIC;
368 
    s15_cyc_o   :   out STD_LOGIC;
369 
    s15_stb_o   :   out STD_LOGIC;
370 
    s15_ack_i   :   in  STD_LOGIC;
371 
    s15_err_i   :   in  STD_LOGIC;
372 
    s15_rty_i   :   in  STD_LOGIC;
373 
    s15_cti_o   :   out STD_LOGIC_VECTOR(2 downto 0);
374 
    s15_bte_o   :   out STD_LOGIC_VECTOR(1 downto 0)
375 
);
376 
end component wb_conmax_top;
377 
-- Define WB_CROSS constants:
378 
constant    p_WB_CROSS_MASTER_Q :   integer:=8;
379 
constant    p_WB_CROSS_SLAVE_Q  :   integer:=16;
380 
 
381 
constant    p_WB_CROSS_ADDR_W   :   integer:=32;
382 
constant    p_WB_CROSS_DATA_W   :   integer:=64;
383 
 
384 
constant    p_TEST_DATA_32BIT   :   std_logic_vector( 31 downto 0):= x"12345678";
385 
constant    p_TEST_DATA_64BIT   :   std_logic_vector( 63 downto 0):= x"0123456789ABCDEF";
386 
-- Define WB_CROSS types (helps in cross route):
387 
--  1) MASTER
388 
type wb_master_port_addr    is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic_vector( p_WB_CROSS_ADDR_W-1 downto 0 );
389 
type wb_master_port_data    is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic_vector( p_WB_CROSS_DATA_W-1 downto 0 );
390 
type wb_master_port_sel     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic_vector( (p_WB_CROSS_DATA_W/8)-1 downto 0 );
391 
type wb_master_port_we      is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
392 
type wb_master_port_cyc     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
393 
type wb_master_port_stb     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
394 
type wb_master_port_ack     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
395 
type wb_master_port_err     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
396 
type wb_master_port_rty     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic;
397 
type wb_master_port_cti     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic_vector( 2 downto 0);
398 
type wb_master_port_bte     is array( p_WB_CROSS_MASTER_Q-1 downto 0 )  of std_logic_vector( 1 downto 0);
399 
--  2) SLAVE
400 
type wb_slave_port_addr     is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic_vector( p_WB_CROSS_ADDR_W-1 downto 0 );
401 
type wb_slave_port_data     is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic_vector( p_WB_CROSS_DATA_W-1 downto 0 );
402 
type wb_slave_port_sel      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic_vector( (p_WB_CROSS_DATA_W/8)-1 downto 0 );
403 
type wb_slave_port_we       is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
404 
type wb_slave_port_cyc      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
405 
type wb_slave_port_stb      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
406 
type wb_slave_port_ack      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
407 
type wb_slave_port_err      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
408 
type wb_slave_port_rty      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic;
409 
type wb_slave_port_cti      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic_vector( 2 downto 0);
410 
type wb_slave_port_bte      is array( p_WB_CROSS_SLAVE_Q-1 downto 0 )   of std_logic_vector( 1 downto 0);
411 
end package wb_conmax_top_pkg;

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