URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] [wishbone/] [testbecnh/] [dev_test_check/] [SciTE.session] - Blame information for rev 2

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# SciTE session file
 
buffer.1.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\testbecnh\dev_test_check\sim\tb.v
buffer.1.position=434
buffer.1.current=1
 
buffer.2.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\testbecnh\dev_test_check\sim\ds_dma_test_check_burst_master_if.v
buffer.2.position=448
 
buffer.3.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\block_test_check\block_check_wb_burst_slave.v
buffer.3.position=1
 
buffer.4.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\block_test_check\block_test_check_wb.vhd
buffer.4.position=62

Line No.	Rev	Author	Line
1	2	dsmv	`# SciTE session file`
2
3			`buffer.1.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\testbecnh\dev_test_check\sim\tb.v`
4			`buffer.1.position=434`
5			`buffer.1.current=1`
6
7			`buffer.2.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\testbecnh\dev_test_check\sim\ds_dma_test_check_burst_master_if.v`
8			`buffer.2.position=448`
9
10			`buffer.3.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\block_test_check\block_check_wb_burst_slave.v`
11			`buffer.3.position=1`
12
13			`buffer.4.path=D:\TMP\08\SVN\sp605_lx45t_wishbone\src\wishbone\block_test_check\block_test_check_wb.vhd`
14			`buffer.4.position=62`

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Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] [wishbone/] [testbecnh/] [dev_test_check/] [SciTE.session] - Blame information for rev 2