1 |
2 |
dsmv |
onerror {resume}
|
2 |
|
|
quietly WaveActivateNextPane {} 0
|
3 |
|
|
add wave -noupdate /tb/DUT/clk_i
|
4 |
|
|
add wave -noupdate /tb/DUT/rst_i
|
5 |
|
|
add wave -noupdate -group CM_WBM#0 -radix hexadecimal /tb/DUT/m0_addr_i
|
6 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_cyc_i
|
7 |
|
|
add wave -noupdate -group CM_WBM#0 -radix hexadecimal /tb/DUT/m0_data_i
|
8 |
|
|
add wave -noupdate -group CM_WBM#0 -radix hexadecimal /tb/DUT/m0_data_o
|
9 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_err_o
|
10 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_rty_o
|
11 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_sel_i
|
12 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_stb_i
|
13 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_we_i
|
14 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_ack_o
|
15 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_cti_i
|
16 |
|
|
add wave -noupdate -group CM_WBM#0 /tb/DUT/m0_bte_i
|
17 |
|
|
add wave -noupdate -group CM_WBM#1 -radix hexadecimal /tb/DUT/m1_addr_i
|
18 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_cyc_i
|
19 |
|
|
add wave -noupdate -group CM_WBM#1 -radix hexadecimal /tb/DUT/m1_data_i
|
20 |
|
|
add wave -noupdate -group CM_WBM#1 -radix hexadecimal /tb/DUT/m1_data_o
|
21 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_err_o
|
22 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_rty_o
|
23 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_sel_i
|
24 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_stb_i
|
25 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_we_i
|
26 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_ack_o
|
27 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_cti_i
|
28 |
|
|
add wave -noupdate -group CM_WBM#1 /tb/DUT/m1_bte_i
|
29 |
|
|
add wave -noupdate -group CM_WBM#2 -radix hexadecimal /tb/DUT/m2_addr_i
|
30 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_cyc_i
|
31 |
|
|
add wave -noupdate -group CM_WBM#2 -radix hexadecimal /tb/DUT/m2_data_i
|
32 |
|
|
add wave -noupdate -group CM_WBM#2 -radix hexadecimal /tb/DUT/m2_data_o
|
33 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_err_o
|
34 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_rty_o
|
35 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_sel_i
|
36 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_stb_i
|
37 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_we_i
|
38 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_ack_o
|
39 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_cti_i
|
40 |
|
|
add wave -noupdate -group CM_WBM#2 /tb/DUT/m2_bte_i
|
41 |
|
|
add wave -noupdate -group CM_WBM#3 -radix hexadecimal /tb/DUT/m3_addr_i
|
42 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_cyc_i
|
43 |
|
|
add wave -noupdate -group CM_WBM#3 -radix hexadecimal /tb/DUT/m3_data_i
|
44 |
|
|
add wave -noupdate -group CM_WBM#3 -radix hexadecimal /tb/DUT/m3_data_o
|
45 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_err_o
|
46 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_rty_o
|
47 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_sel_i
|
48 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_stb_i
|
49 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_we_i
|
50 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_ack_o
|
51 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_cti_i
|
52 |
|
|
add wave -noupdate -group CM_WBM#3 /tb/DUT/m3_bte_i
|
53 |
|
|
add wave -noupdate -group CM_WBM#4 -radix hexadecimal /tb/DUT/m4_addr_i
|
54 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_cyc_i
|
55 |
|
|
add wave -noupdate -group CM_WBM#4 -radix hexadecimal /tb/DUT/m4_data_i
|
56 |
|
|
add wave -noupdate -group CM_WBM#4 -radix hexadecimal /tb/DUT/m4_data_o
|
57 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_err_o
|
58 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_rty_o
|
59 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_sel_i
|
60 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_stb_i
|
61 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_we_i
|
62 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_ack_o
|
63 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_cti_i
|
64 |
|
|
add wave -noupdate -group CM_WBM#4 /tb/DUT/m4_bte_i
|
65 |
|
|
add wave -noupdate -group CM_WBM#5 -radix hexadecimal /tb/DUT/m5_addr_i
|
66 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_cyc_i
|
67 |
|
|
add wave -noupdate -group CM_WBM#5 -radix hexadecimal /tb/DUT/m5_data_i
|
68 |
|
|
add wave -noupdate -group CM_WBM#5 -radix hexadecimal /tb/DUT/m5_data_o
|
69 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_err_o
|
70 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_rty_o
|
71 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_sel_i
|
72 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_stb_i
|
73 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_we_i
|
74 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_ack_o
|
75 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_cti_i
|
76 |
|
|
add wave -noupdate -group CM_WBM#5 /tb/DUT/m5_bte_i
|
77 |
|
|
add wave -noupdate -expand -group CM_WBM#6 -radix hexadecimal /tb/DUT/m6_addr_i
|
78 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_cyc_i
|
79 |
|
|
add wave -noupdate -expand -group CM_WBM#6 -radix hexadecimal /tb/DUT/m6_data_i
|
80 |
|
|
add wave -noupdate -expand -group CM_WBM#6 -radix hexadecimal /tb/DUT/m6_data_o
|
81 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_err_o
|
82 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_rty_o
|
83 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_sel_i
|
84 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_stb_i
|
85 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_we_i
|
86 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_ack_o
|
87 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_cti_i
|
88 |
|
|
add wave -noupdate -expand -group CM_WBM#6 /tb/DUT/m6_bte_i
|
89 |
|
|
add wave -noupdate -group CM_WBM#7 -radix hexadecimal /tb/DUT/m7_addr_i
|
90 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_cyc_i
|
91 |
|
|
add wave -noupdate -group CM_WBM#7 -radix hexadecimal /tb/DUT/m7_data_i
|
92 |
|
|
add wave -noupdate -group CM_WBM#7 -radix hexadecimal /tb/DUT/m7_data_o
|
93 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_err_o
|
94 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_rty_o
|
95 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_sel_i
|
96 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_stb_i
|
97 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_we_i
|
98 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_ack_o
|
99 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_cti_i
|
100 |
|
|
add wave -noupdate -group CM_WBM#7 /tb/DUT/m7_bte_i
|
101 |
|
|
add wave -noupdate -divider {New Divider}
|
102 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_ack_i
|
103 |
|
|
add wave -noupdate -expand -group CM_WBS#0 -radix hexadecimal /tb/DUT/s0_addr_o
|
104 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_cyc_o
|
105 |
|
|
add wave -noupdate -expand -group CM_WBS#0 -radix hexadecimal /tb/DUT/s0_data_i
|
106 |
|
|
add wave -noupdate -expand -group CM_WBS#0 -radix hexadecimal /tb/DUT/s0_data_o
|
107 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_err_i
|
108 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_rty_i
|
109 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_sel_o
|
110 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_stb_o
|
111 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_we_o
|
112 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_cti_o
|
113 |
|
|
add wave -noupdate -expand -group CM_WBS#0 /tb/DUT/s0_bte_o
|
114 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_ack_i
|
115 |
|
|
add wave -noupdate -expand -group CM_WBS#1 -radix hexadecimal /tb/DUT/s1_addr_o
|
116 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_cyc_o
|
117 |
|
|
add wave -noupdate -expand -group CM_WBS#1 -radix hexadecimal /tb/DUT/s1_data_i
|
118 |
|
|
add wave -noupdate -expand -group CM_WBS#1 -radix hexadecimal /tb/DUT/s1_data_o
|
119 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_err_i
|
120 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_rty_i
|
121 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_sel_o
|
122 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_stb_o
|
123 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_we_o
|
124 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_cti_o
|
125 |
|
|
add wave -noupdate -expand -group CM_WBS#1 /tb/DUT/s1_bte_o
|
126 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_ack_i
|
127 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_addr_o
|
128 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_cyc_o
|
129 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_data_i
|
130 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_data_o
|
131 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_err_i
|
132 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_rty_i
|
133 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_sel_o
|
134 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_stb_o
|
135 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_we_o
|
136 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_cti_o
|
137 |
|
|
add wave -noupdate -group CM_WBS#2 /tb/DUT/s2_bte_o
|
138 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_ack_i
|
139 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_addr_o
|
140 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_cyc_o
|
141 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_data_i
|
142 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_data_o
|
143 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_err_i
|
144 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_rty_i
|
145 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_sel_o
|
146 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_stb_o
|
147 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_we_o
|
148 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_cti_o
|
149 |
|
|
add wave -noupdate -group CM_WBS#3 /tb/DUT/s3_bte_o
|
150 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_ack_i
|
151 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_addr_o
|
152 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_cyc_o
|
153 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_data_i
|
154 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_data_o
|
155 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_err_i
|
156 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_rty_i
|
157 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_sel_o
|
158 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_stb_o
|
159 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_we_o
|
160 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_cti_o
|
161 |
|
|
add wave -noupdate -group CM_WBS#4 /tb/DUT/s4_bte_o
|
162 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_ack_i
|
163 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_addr_o
|
164 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_cyc_o
|
165 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_data_i
|
166 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_data_o
|
167 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_err_i
|
168 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_rty_i
|
169 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_sel_o
|
170 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_stb_o
|
171 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_we_o
|
172 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_cti_o
|
173 |
|
|
add wave -noupdate -group CM_WBS#5 /tb/DUT/s5_bte_o
|
174 |
|
|
add wave -noupdate -divider {New Divider}
|
175 |
|
|
add wave -noupdate -group WBS_RAM_0 -radix hexadecimal -childformat {{{/tb/slave_ram_gen[0]/ram_slave/adr_i[31]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[30]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[29]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[28]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[27]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[26]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[25]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[24]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[23]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[22]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[21]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[20]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[19]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[18]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[17]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[16]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[15]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[14]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[13]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[12]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[11]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[10]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[9]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[8]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[7]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[6]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[5]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[4]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[3]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[2]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[1]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/adr_i[0]} -radix hexadecimal}} -subitemconfig {{/tb/slave_ram_gen[0]/ram_slave/adr_i[31]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[30]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[29]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[28]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[27]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[26]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[25]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[24]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[23]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[22]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[21]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[20]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[19]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[18]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[17]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[16]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[15]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[14]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[13]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[12]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[11]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[10]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[9]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[8]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[7]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[6]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[5]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[4]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[3]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[2]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[1]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/adr_i[0]} {-height 15 -radix hexadecimal}} {/tb/slave_ram_gen[0]/ram_slave/adr_i}
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176 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/clk}
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177 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/ack_o}
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178 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/cyc_i}
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179 |
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add wave -noupdate -group WBS_RAM_0 -radix hexadecimal -childformat {{{/tb/slave_ram_gen[0]/ram_slave/dat_i[63]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[62]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[61]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[60]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[59]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[58]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[57]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[56]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[55]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[54]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[53]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[52]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[51]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[50]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[49]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[48]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[47]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[46]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[45]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[44]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[43]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[42]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[41]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[40]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[39]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[38]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[37]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[36]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[35]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[34]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[33]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[32]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[31]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[30]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[29]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[28]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[27]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[26]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[25]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[24]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[23]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[22]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[21]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[20]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[19]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[18]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[17]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[16]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[15]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[14]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[13]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[12]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[11]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[10]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[9]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[8]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[7]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[6]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[5]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[4]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[3]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[2]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[1]} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/dat_i[0]} -radix hexadecimal}} -subitemconfig {{/tb/slave_ram_gen[0]/ram_slave/dat_i[63]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[62]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[61]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[60]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[59]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[58]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[57]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[56]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[55]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[54]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[53]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[52]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[51]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[50]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[49]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[48]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[47]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[46]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[45]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[44]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[43]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[42]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[41]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[40]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[39]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[38]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[37]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[36]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[35]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[34]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[33]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[32]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[31]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[30]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[29]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[28]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[27]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[26]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[25]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[24]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[23]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[22]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[21]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[20]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[19]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[18]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[17]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[16]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[15]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[14]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[13]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[12]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[11]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[10]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[9]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[8]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[7]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[6]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[5]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[4]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[3]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[2]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[1]} {-height 15 -radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/dat_i[0]} {-height 15 -radix hexadecimal}} {/tb/slave_ram_gen[0]/ram_slave/dat_i}
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180 |
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add wave -noupdate -group WBS_RAM_0 -radix hexadecimal {/tb/slave_ram_gen[0]/ram_slave/dat_o}
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181 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/err_o}
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182 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/rst}
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183 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/sel_i}
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184 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/stb_i}
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185 |
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add wave -noupdate -group WBS_RAM_0 {/tb/slave_ram_gen[0]/ram_slave/we_i}
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186 |
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add wave -noupdate -group WBS_RAM_0 -radix hexadecimal {/tb/slave_ram_gen[0]/ram_slave/ram[1]}
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187 |
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add wave -noupdate -group WBS_RAM_0 -radix hexadecimal {/tb/slave_ram_gen[0]/ram_slave/ram[0]}
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188 |
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add wave -noupdate -group WBS_RAM_0 -radix hexadecimal -childformat {{{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](65)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](64)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](63)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](62)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](61)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](60)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](59)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](58)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](57)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](56)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](55)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](54)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](53)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](52)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](51)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](50)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](49)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](48)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](47)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](46)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](45)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](44)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](43)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](42)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](41)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](40)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](39)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](38)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](37)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](36)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](35)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](34)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](33)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](32)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](31)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](30)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](29)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](28)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](27)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](26)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](25)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](24)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](23)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](22)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](21)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](20)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](19)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](18)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](17)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](16)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](15)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](14)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](13)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](12)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](11)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](10)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](9)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](8)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](7)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](6)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](5)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](4)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](3)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](2)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](1)} -radix hexadecimal} {{/tb/slave_ram_gen[0]/ram_slave/ram[65:0](0)} -radix hexadecimal}} -subitemconfig {{/tb/slave_ram_gen[0]/ram_slave/ram[65]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[64]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[63]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[62]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[61]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[60]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[59]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[58]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[57]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[56]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[55]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[54]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[53]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[52]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[51]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[50]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[49]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[48]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[47]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[46]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[45]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[44]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[43]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[42]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[41]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[40]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[39]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[38]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[37]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[36]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[35]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[34]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[33]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[32]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[31]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[30]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[29]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[28]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[27]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[26]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[25]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[24]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[23]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[22]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[21]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[20]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[19]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[18]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[17]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[16]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[15]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[14]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[13]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[12]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[11]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[10]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[9]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[8]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[7]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[6]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[5]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[4]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[3]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[2]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[1]} {-radix hexadecimal} {/tb/slave_ram_gen[0]/ram_slave/ram[0]} {-radix hexadecimal}} {/tb/slave_ram_gen[0]/ram_slave/ram[65:0]}
|
189 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/ack_o}
|
190 |
|
|
add wave -noupdate -group WBS_RAM_1 -radix hexadecimal {/tb/slave_ram_gen[1]/ram_slave/adr_i}
|
191 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/cyc_i}
|
192 |
|
|
add wave -noupdate -group WBS_RAM_1 -radix hexadecimal {/tb/slave_ram_gen[1]/ram_slave/dat_i}
|
193 |
|
|
add wave -noupdate -group WBS_RAM_1 -radix hexadecimal {/tb/slave_ram_gen[1]/ram_slave/dat_o}
|
194 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/err_o}
|
195 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/sel_i}
|
196 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/stb_i}
|
197 |
|
|
add wave -noupdate -group WBS_RAM_1 {/tb/slave_ram_gen[1]/ram_slave/we_i}
|
198 |
|
|
add wave -noupdate -group WBS_RAM_1 -radix hexadecimal {/tb/slave_ram_gen[1]/ram_slave/ram[1]}
|
199 |
|
|
add wave -noupdate -group WBS_RAM_1 -radix hexadecimal {/tb/slave_ram_gen[1]/ram_slave/ram[0]}
|
200 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/ack_o}
|
201 |
|
|
add wave -noupdate -group WBS_RAM_2 -radix hexadecimal {/tb/slave_ram_gen[2]/ram_slave/adr_i}
|
202 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/cyc_i}
|
203 |
|
|
add wave -noupdate -group WBS_RAM_2 -radix hexadecimal {/tb/slave_ram_gen[2]/ram_slave/dat_i}
|
204 |
|
|
add wave -noupdate -group WBS_RAM_2 -radix hexadecimal {/tb/slave_ram_gen[2]/ram_slave/dat_o}
|
205 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/err_o}
|
206 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/sel_i}
|
207 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/stb_i}
|
208 |
|
|
add wave -noupdate -group WBS_RAM_2 {/tb/slave_ram_gen[2]/ram_slave/we_i}
|
209 |
|
|
add wave -noupdate -group WBS_RAM_2 -radix hexadecimal {/tb/slave_ram_gen[2]/ram_slave/ram[1]}
|
210 |
|
|
add wave -noupdate -group WBS_RAM_2 -radix hexadecimal {/tb/slave_ram_gen[2]/ram_slave/ram[0]}
|
211 |
|
|
add wave -noupdate -divider {New Divider}
|
212 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/ack_i}
|
213 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/adr_o}
|
214 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/cb_event}
|
215 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/cyc_o}
|
216 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/dat_i}
|
217 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/dat_o}
|
218 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/err_i}
|
219 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/rty_i}
|
220 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/sel_o}
|
221 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/stb_o}
|
222 |
|
|
add wave -noupdate -group WBM_IF#7 {/tb/m_if[7]/cb/we_o}
|
223 |
|
|
add wave -noupdate {/tb/wb_s_adr_o[0]}
|
224 |
|
|
add wave -noupdate {/tb/wb_s_adr_o[1]}
|
225 |
|
|
add wave -noupdate -divider {New Divider}
|
226 |
|
|
add wave -noupdate /tb/DUT/m0/slv_sel
|
227 |
|
|
add wave -noupdate -radix hexadecimal -childformat {{{/tb/DUT/m0/wb_addr_i[31]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[30]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[29]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[28]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[27]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[26]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[25]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[24]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[23]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[22]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[21]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[20]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[19]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[18]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[17]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[16]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[15]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[14]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[13]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[12]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[11]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[10]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[9]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[8]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[7]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[6]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[5]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[4]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[3]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[2]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[1]} -radix hexadecimal} {{/tb/DUT/m0/wb_addr_i[0]} -radix hexadecimal}} -subitemconfig {{/tb/DUT/m0/wb_addr_i[31]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[30]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[29]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[28]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[27]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[26]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[25]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[24]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[23]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[22]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[21]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[20]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[19]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[18]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[17]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[16]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[15]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[14]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[13]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[12]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[11]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[10]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[9]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[8]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[7]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[6]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[5]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[4]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[3]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[2]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[1]} {-height 15 -radix hexadecimal} {/tb/DUT/m0/wb_addr_i[0]} {-height 15 -radix hexadecimal}} /tb/DUT/m0/wb_addr_i
|
228 |
|
|
add wave -noupdate -radix unsigned /tb/DUT/s1/mast_sel
|
229 |
|
|
add wave -noupdate /tb/DUT/s1/m0_bte_i
|
230 |
|
|
add wave -noupdate /tb/DUT/s1/m0_cti_i
|
231 |
|
|
add wave -noupdate /tb/DUT/s1/m1_bte_i
|
232 |
|
|
add wave -noupdate /tb/DUT/s1/m1_cti_i
|
233 |
|
|
add wave -noupdate /tb/DUT/s1/m2_bte_i
|
234 |
|
|
add wave -noupdate /tb/DUT/s1/m2_cti_i
|
235 |
|
|
add wave -noupdate /tb/DUT/s1/m3_bte_i
|
236 |
|
|
add wave -noupdate /tb/DUT/s1/m3_cti_i
|
237 |
|
|
add wave -noupdate /tb/DUT/s1/m4_bte_i
|
238 |
|
|
add wave -noupdate /tb/DUT/s1/m4_cti_i
|
239 |
|
|
add wave -noupdate /tb/DUT/s1/m5_bte_i
|
240 |
|
|
add wave -noupdate /tb/DUT/s1/m5_cti_i
|
241 |
|
|
add wave -noupdate /tb/DUT/s1/m6_bte_i
|
242 |
|
|
add wave -noupdate /tb/DUT/s1/m6_cti_i
|
243 |
|
|
add wave -noupdate /tb/DUT/s1/m7_bte_i
|
244 |
|
|
add wave -noupdate /tb/DUT/s1/m7_cti_i
|
245 |
|
|
add wave -noupdate -divider {New Divider}
|
246 |
|
|
add wave -noupdate /tb/DUT/m6/wb_bte_i
|
247 |
|
|
add wave -noupdate /tb/DUT/m6/wb_cti_i
|
248 |
|
|
add wave -noupdate /tb/DUT/m6/s0_bte_o
|
249 |
|
|
add wave -noupdate /tb/DUT/m6/s0_cti_o
|
250 |
|
|
add wave -noupdate /tb/DUT/m6/s1_bte_o
|
251 |
|
|
add wave -noupdate /tb/DUT/m6/s1_cti_o
|
252 |
|
|
add wave -noupdate /tb/DUT/m6/slv_sel
|
253 |
|
|
add wave -noupdate /tb/DUT/m6s1_bte
|
254 |
|
|
add wave -noupdate /tb/DUT/m6s1_cti
|
255 |
|
|
TreeUpdate [SetDefaultTree]
|
256 |
|
|
WaveRestoreCursors {{Cursor 1} {3668516 ps} 0}
|
257 |
|
|
configure wave -namecolwidth 281
|
258 |
|
|
configure wave -valuecolwidth 123
|
259 |
|
|
configure wave -justifyvalue left
|
260 |
|
|
configure wave -signalnamewidth 0
|
261 |
|
|
configure wave -snapdistance 10
|
262 |
|
|
configure wave -datasetprefix 0
|
263 |
|
|
configure wave -rowmargin 4
|
264 |
|
|
configure wave -childrowmargin 2
|
265 |
|
|
configure wave -gridoffset 0
|
266 |
|
|
configure wave -gridperiod 1
|
267 |
|
|
configure wave -griddelta 40
|
268 |
|
|
configure wave -timeline 0
|
269 |
|
|
configure wave -timelineunits ps
|
270 |
|
|
update
|
271 |
|
|
WaveRestoreZoom {3656193 ps} {3695303 ps}
|