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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] [wishbone/] [testbecnh/] [dev_wb_cross/] [sim/] [zz_do/] [setup_sim.do] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dsmv 
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quit -sim
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echo Cre WORK lib
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if {[file exists "work"]} { vdel -all}
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vlib work
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echo Compile SRC:
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_top.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_slave_if.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_master_if.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_msel.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_arb.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_pri_enc.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_pri_dec.v
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vlog -quiet ../../../../../src/wishbone/cross/wb_conmax_rf.v
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vlog -sv -quiet tb.v
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vsim -t ps -novopt work.tb
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log -r /*
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do wave.do
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run -all

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