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[/] [pcie_ds_dma/] [trunk/] [projects/] [ac701_a200t_core/] [src/] [testbench/] [ahdl/] [log_example/] [console_id_1_test_read_4kB.log] - Blame information for rev 51

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1 51 dsmv 
asim -noglitch -noglitchmsg +notimingchecks +no_tchk_msg -relax glbl -ieee_nowarn -O5 -L secureip -g test_id=1 +access +r +m+test_read_4kB stend_ac701_core stend_ac701_core
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# ELBREAD: Elaboration process.
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# ELBREAD: You do not have a valid license to run simulation with SLP.
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# Contact Aldec for ordering information - sales@aldec.com.
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# ELBREAD: Elaboration time 4.5 [s].
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# asim: Stack memory: 128MB
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# asim: Retval memory: 128MB
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# KERNEL: Main thread initiated.
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# KERNEL: Kernel process initialization phase.
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# KERNEL: Time resolution set to 1ps.
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# ELAB2: Elaboration final pass...
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# ELAB2: Create instances ...
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# ELBREAD: Warning: Too few port connections. Region: protected hierarchy
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# EXECUTION:: NOTE   : returned a simple delay of 1
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# EXECUTION:: NOTE   : returned a simple delay of 1
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# EXECUTION:: NOTE   : returned a simple delay of 1
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# ELAB2: Create instances complete.
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# SLP: Started
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# SLP: Elaboration phase ...
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# SLP: Elaboration phase ... skipped, nothing to simulate in SLP mode : 0.0 [s]
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# SLP: Finished : 0.0 [s]
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# ELAB2: Elaboration final pass complete - time: 14.8 [s].
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# KERNEL: Kernel process initialization done.
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# Allocation: Simulator allocated 418007 kB (elbread=101867 elab2=281690 kernel=34450 sdf=0)
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#  20:42, 12 сентября 2015 г.
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#  Simulation has been initialized
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#  Selected Top-Level: stend_ac701_core (stend_ac701_core) glbl
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run {300 us}
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# EXECUTION:: NOTE   : Warning in %m at time %t: When using an asynchronous configuration for the FIFO Generator, the behavioral model is not cycle-accurate. You may wish to choose the structural simulation model instead of the behavioral model. This will ensure accurate behavior and latencies during simulation. You can enable this from CORE Generator by selecting Project -> Project Options -> Generation tab -> Structural Simulation. See the FIFO Generator User Guide for more information.
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# EXECUTION:: Time: 0 ps,  Iteration: 0,  Instance: /stend_ac701_core/amb/dio_in/x_fifo/ctrl_fifo/U0,  Process: line__3206.
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# EXECUTION:: NOTE   : Warning in %m at time %t: When using an asynchronous configuration for the FIFO Generator, the behavioral model is not cycle-accurate. You may wish to choose the structural simulation model instead of the behavioral model. This will ensure accurate behavior and latencies during simulation. You can enable this from CORE Generator by selecting Project -> Project Options -> Generation tab -> Structural Simulation. See the FIFO Generator User Guide for more information.
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# EXECUTION:: Time: 0 ps,  Iteration: 0,  Instance: /stend_ac701_core/amb/dio_out/x_fifo/ctrl_fifo/U0,  Process: line__3206.
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# EXECUTION:: WARNING: OPMODE Input Warning : The OPMODE 0UU00U0 with CARRYINSEL  00 to DSP48 instance is invalid.
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# EXECUTION:: Time: 109393 ps,  Iteration: 15,  Instance: /stend_ac701_core/amb/amb/gen_syn/pcie/gen_m10/core/fifo/dsc/gen_dsp48/dsp,  Process: prcs_opmode_drc.
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# EXECUTION:: WARNING: OPMODE Input Warning : The OPMODE 0UU00UU with CARRYINSEL  00 to DSP48 instance is invalid.
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# EXECUTION:: Time: 109393 ps,  Iteration: 15,  Instance: /stend_ac701_core/amb/amb/gen_syn/pcie/gen_m10/core/fifo/cmd/dma_adr/gen_dsp48/dsp1,  Process: prcs_opmode_drc.
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# EXECUTION:: WARNING: OPMODE Input Warning : The OPMODE 0UU00UU with CARRYINSEL  00 to DSP48 instance is invalid.
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# EXECUTION:: Time: 109393 ps,  Iteration: 15,  Instance: /stend_ac701_core/amb/amb/gen_syn/pcie/gen_m10/core/fifo/cmd/dma_adr/gen_dsp48/dsp0,  Process: prcs_opmode_drc.
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# KERNEL: [ 1000 ns ] : Init start
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# KERNEL: [ 15923.246 ns ] : Transaction Reset is De-asserted
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# KERNEL: [ 145411.246 ns ] : Transaction Link is Up
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# KERNEL: [ 145411.246 ns ] : PCI EXPRESS BAR MEMORY/IO MAPPING PROCESS BEGUN..
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# KERNEL:             BAR 0 = 0x10000000 RANGE = 0xFFE00000 MEM32 MAPPED
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# KERNEL:             BAR 1 = 0x20000000 RANGE = 0xFFE00000 MEM32 MAPPED
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# KERNEL:             BAR 2 = 0x00000000 RANGE = 0x00000000 DISABLED
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# KERNEL:             BAR 3 = 0x00000000 RANGE = 0x00000000 DISABLED
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# KERNEL:             BAR 4 = 0x00000000 RANGE = 0x00000000 DISABLED
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# KERNEL:             BAR 5 = 0x00000000 RANGE = 0x00000000 DISABLED
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# KERNEL:             BAR 6 = 0x00000000 RANGE = 0x00000000 DISABLED
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# KERNEL: [ 145411.246 ns ] : Setting Core Configuration Space...
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# KERNEL: [ 193459.146 ns ] : PROC_PARSE_FRAME on Transmit
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# KERNEL: [ 195107.146 ns ] : PROC_PARSE_FRAME on Transmit
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# KERNEL: [ 195987.146 ns ] : PROC_PARSE_FRAME on Receive
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# KERNEL: [ 209171.146 ns ] : PROC_PARSE_FRAME on Receive
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# KERNEL: [ 227443.146 ns ] : BUS Master Enable
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# KERNEL: [ 227443.146 ns ] : Reading Config space
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# KERNEL:   Addr: [0x001]
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# KERNEL:   Cfg Addr [0x001] -> Data [0x00100000]
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# KERNEL: [ 227603.146 ns ] : Writing Config space
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# KERNEL:   Addr: [0x001] -> Data [0x00000007]
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# KERNEL: [ 227763.146 ns ] : Reading Config space
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# KERNEL:   Addr: [0x001]
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# KERNEL:   Cfg Addr [0x001] -> Data [0x00100007]
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# KERNEL: [ 232891.146 ns ] : Init complete
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# KERNEL: [ 252947.146 ns ] : PROC_PARSE_FRAME on Transmit
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# KERNEL:
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# KERNEL: TEST finished successfully
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# KERNEL:
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# EXECUTION:: WARNING: Init END OF TEST
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# EXECUTION:: Time: 298110146 ps,  Iteration: 0,  Instance: /stend_ac701_core,  Process: pr_main.
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# EXECUTION:: FAILURE: End of TEST; Ending simulation (not a Failure)
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# EXECUTION:: Time: 298110146 ps,  Iteration: 0,  Instance: /stend_ac701_core,  Process: pr_main.
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# KERNEL: stopped at delta: 0 at time 298110146 ps.
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endsim
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#  Simulation has been stopped
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transcript to src/testbench/log/console_id_2_test_adm_read_8kb.log

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