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dsmv |
#
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#
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quit -sim
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#
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#
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echo Cre WORK lib (and del OLD, if exists)
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if {[file exists "work"]} { vdel -all}
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vlib work
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#
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#
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echo Compile SRC:
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# provide typedef for shadow-ram
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vcom -quiet ../../../src/pcie_src/components/rtl/host_pkg.vhd
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# shadow-ram
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vcom -quiet ../../../src/pcie_src/components/rtl/ctrl_ram16_v1.vhd
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# WB_CROSS
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_arb.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_master_if.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_msel.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_pri_dec.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_pri_enc.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_rf.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_slave_if.v
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vlog -quiet ../../../src/wishbone/cross/wb_conmax_top.v
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vcom -quiet ../../../src/wishbone/cross/wb_conmax_top_pkg.vhd
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# CORE64_M6
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_type_pkg.vhd
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vcom -quiet ../../../src/pcie_src/components/coregen/ctrl_fifo64x37st.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_rx_engine_m4.vhd
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vcom -quiet ../../../src/pcie_src/components/coregen/ctrl_fifo64x34fw.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_tx_engine_m4.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_reg_access.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_pb_disp.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_interrupt.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_dma_adr.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_dma_ext_cmd.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_ext_descriptor.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_ram_cmd_pb.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_ram_cmd.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_ext_ram.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/ctrl_main.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_fifo_ext/block_pe_fifo_ext.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/pcie_bram_s6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/pcie_brams_s6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/pcie_bram_top_s6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/gtpa1_dual_wrapper_tile.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/gtpa1_dual_wrapper.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_s6/cl_s6pcie_m2.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/top/pcie_core64_m6.vhd
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# PE_MAIN
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vcom -quiet ../../../src/pcie_src/components/block_main/block_pe_main.vhd
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# PB<->WB bridge Logic
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vcom -quiet ../../../src/pcie_src/components/coregen/ctrl_fifo512x64st_v0.vhd
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vlog -quiet ../../../src/pcie_src/components/rtl/core64_pb_wishbone_ctrl.v
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# PB_WB
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/pcie_ctrl/core64_type_pkg.vhd
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vcom -quiet ../../../src/pcie_src/components/rtl/core64_pb_wishbone.vhd
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# CORE64_M6+PE_MAIN+PB_WB_BRIDGE wrappper
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vcom -quiet ../../../src/pcie_src/components/pcie_core/pcie_core64_wishbone.vhd
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# TEST_CHECK
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vcom -quiet ../../../src/wishbone/block_test_check/cl_test_check.vhd
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vlog -quiet ../../../src/wishbone/block_test_check/block_check_wb_burst_slave.v
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vcom -quiet ../../../src/wishbone/block_test_check/block_check_wb_config_slave.vhd
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vcom -quiet ../../../src/wishbone/block_test_check/block_check_wb_pkg.vhd
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vcom -quiet ../../../src/wishbone/block_test_check/block_test_check_wb.vhd
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# TEST_GEN
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vcom -quiet ../../../src/wishbone/coregen/ctrl_fifo1024x64_st_v1.vhd
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vcom -quiet ../../../src/wishbone/block_test_generate/cl_test_generate.vhd
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vlog -quiet ../../../src/wishbone/block_test_generate/block_generate_wb_burst_slave.v
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vcom -quiet ../../../src/wishbone/block_test_generate/block_generate_wb_config_slave.vhd
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vcom -quiet ../../../src/wishbone/block_test_generate/block_generate_wb_pkg.vhd
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vcom -quiet ../../../src/wishbone/block_test_generate/block_test_generate_wb.vhd
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# WB complete SOPC
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vcom -quiet ../../../src/top/sp605_lx45t_wishbone_sopc_wb.vhd
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# Design TOP
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vcom -quiet ../../../src/top/sp605_lx45t_wishbone.vhd
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#
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#
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echo Compile TEST ENV:
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vcom -quiet ../../../src/pcie_src/pcie_sim/sim/cmd_sim_pkg.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/sim/block_pkg.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/sim/trd_pcie_pkg.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/sim/root_memory_pkg.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/test_interface.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pci_exp_usrapp_tx_m2.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pci_exp_usrapp_rx_m2.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_reset_delay_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_clocking_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_pipe_misc_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_pipe_lane_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_pipe_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/gtx_drp_chanalign_fix_3752_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/gtx_rx_valid_filter_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/gtx_tx_sync_rate_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/gtx_wrapper_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_gtx_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_bram_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_brams_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_bram_top_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_core64_m1/source_virtex6/pcie_upconfig_fix_3451_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pcie_2_0_v6_rp.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pcie_2_0_rport_v6.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pci_exp_usrapp_cfg.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/pci_exp_usrapp_pl.vhd
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vcom -quiet ../../../src/pcie_src/pcie_sim/dsport/xilinx_pcie_rport_m2.vhd
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vcom -quiet ../../../src/testbench/wb_block_pkg.vhd
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vcom -quiet ../../../src/testbench/test_pkg.vhd
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vcom -quiet ../../../src/testbench/stend_sp605_wishbone.vhd
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#vlog -quiet glbl.v
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#
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#
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echo Start SIM:
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vsim -t ps -novopt work.stend_sp605_wishbone
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#vsim -t ps work.stend_sp605_wishbone
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#
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#
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#log -r /*
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#
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#
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#do wave.do
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#
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# skip warnings like: Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
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quietly set StdArithNoWarnings 1
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quietly set NumericStdNoWarnings 1
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#
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#
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run -all
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