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[/] [pcie_ds_dma/] [trunk/] [projects/] [sp605_lx45t_wishbone/] [src/] [top/] [sp605_lx45t_wishbone.vhd] - Blame information for rev 2

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1 2 dsmv
-------------------------------------------------------------------------------
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--
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-- Title       : sp605_lx45t_wishbone
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-- Author      : Dmitry Smekhov
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-- Company     : Instrumental Systems
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-- E-mail      : dsmv@insys.ru
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--
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-- Version     : 1.0
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--
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-------------------------------------------------------------------------------
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--
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-- Description :        Проверка ядра PCI Express на модуле SP605
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--
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-------------------------------------------------------------------------------
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--
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-- Version 1.1 (15.10.2011) : Kuzmi4
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--      Update TOP stuct + WB_SOPC
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package sp605_lx45t_wishbone_pkg is
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component sp605_lx45t_wishbone is
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generic
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(
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    is_simulation       : integer:=0    -- 0 - синтез, 1 - моделирование ADM
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);
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port
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(
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    ---- PCI-Express ----
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    pci_exp_txp         : out std_logic_vector(0 downto 0);
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    pci_exp_txn         : out std_logic_vector(0 downto 0);
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    pci_exp_rxp         : in std_logic_vector(0 downto 0);
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    pci_exp_rxn         : in std_logic_vector(0 downto 0);
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    sys_clk_p           : in std_logic;
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    sys_clk_n           : in std_logic;
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    sys_reset_n         : in std_logic;
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    ---- Светодиоды ----
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    gpio_led0           : out std_logic;
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    gpio_led1           : out std_logic;
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    gpio_led2           : out std_logic;
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    gpio_led3           : out std_logic
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);
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end component sp605_lx45t_wishbone;
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end package sp605_lx45t_wishbone_pkg;
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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--use ieee.std_logic_arith.all;
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--use ieee.std_logic_unsigned.all;
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library unisim;
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use unisim.vcomponents.all;
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library work;
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use work.sp605_lx45t_wishbone_sopc_wb_pkg.all;
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entity sp605_lx45t_wishbone is
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generic
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(
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    is_simulation       : integer:=0    -- 0 - синтез, 1 - моделирование ADM
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);
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port
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(
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    ---- PCI-Express ----
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    pci_exp_txp         : out std_logic_vector(0 downto 0);
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    pci_exp_txn         : out std_logic_vector(0 downto 0);
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    pci_exp_rxp         : in std_logic_vector(0 downto 0);
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    pci_exp_rxn         : in std_logic_vector(0 downto 0);
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    sys_clk_p           : in std_logic;
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    sys_clk_n           : in std_logic;
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    sys_reset_n         : in std_logic;
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    ---- Светодиоды ----
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    gpio_led0           : out std_logic;
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    gpio_led1           : out std_logic;
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    gpio_led2           : out std_logic;
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    gpio_led3           : out std_logic
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);
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end sp605_lx45t_wishbone;
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architecture rtl of sp605_lx45t_wishbone is
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-------------------------------------------------------------------------------
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-- 
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-- PCIE SYS_CON stuff:
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signal  s_clk_125MHz    : std_logic;
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signal  s_sys_rst_n     : std_logic;
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-------------------------------------------------------------------------------
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--
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-- OUTRPUT LED stuff:
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signal  sv_led_h        : std_logic_vector(3 downto 0);
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signal  sv_led_h_p      : std_logic_vector(3 downto 0);
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-------------------------------------------------------------------------------
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begin
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-------------------------------------------------------------------------------
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--
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-- Module In/Out deal:
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--
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--
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sv_led_h_p <= not sv_led_h;
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-- 
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xled0 :  obuf_s_16 port map( gpio_led0, sv_led_h_p(0) );
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xled1 :  obuf_s_16 port map( gpio_led1, sv_led_h_p(1) );
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xled2 :  obuf_s_16 port map( gpio_led2, sv_led_h_p(2) );
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xled3 :  obuf_s_16 port map( gpio_led3, sv_led_h_p(3) );
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-- 
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refclk_ibuf : ibufds    port map (O => s_clk_125MHz, I => sys_clk_p, IB => sys_clk_n );
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xmperst     : ibuf      port map (O => s_sys_rst_n,  I => sys_reset_n                );
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-------------------------------------------------------------------------------
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--
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-- Instantiate Wishbone SysteM (with all stuff inside)
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--
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WB_SOPC :   sp605_lx45t_wishbone_sopc_wb
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generic map
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(
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    is_simulation   => is_simulation    --! 0 - синтез, 1 - моделирование 
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)
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port map
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(
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    -- 
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    -- PCIE x1 bus:
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    --  data
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    ov_pci_exp_txp  => pci_exp_txp,
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    ov_pci_exp_txn  => pci_exp_txn,
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    iv_pci_exp_rxp  => pci_exp_rxp,
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    iv_pci_exp_rxn  => pci_exp_rxn,
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    --  sys_con
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    i_sys_clk       => s_clk_125MHz,
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    i_sys_reset_n   => s_sys_rst_n,
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    --
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    -- GPIO_LED outputs:
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    ov_gpio_led     => sv_led_h
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);
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-------------------------------------------------------------------------------
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end rtl;

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