URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [driver/] [pexdrv/] [exam/] [pex_test.cpp] - Blame information for rev 2

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#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <time.h>
#include <errno.h>
#include <limits.h>
#include <stdarg.h>
#include <stdint.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <fcntl.h>
 
#include "pexioctl.h"
#include "ambpexregs.h"
 
#define INSYS_VENDOR_ID         0x4953
#define AMBPEX8_DEVID           0x5503
#define ADP201X1AMB_DEVID       0x5504
#define ADP201X1DSP_DEVID       0x5505
#define AMBPEX5_DEVID           0x5507
 
//-----------------------------------------------------------------------------
 
void board_info(const struct board_info *bi);
void pld_info( uint32_t *base );
int board_init(uint32_t *base);
void ToPause(int ms);
 
//-----------------------------------------------------------------------------
uint32_t *bar0 = NULL;
uint32_t *bar1 = NULL;
//-----------------------------------------------------------------------------
 
int main(int argc, char *argv[])
{
    int error = 0;
    struct board_info bi;
    struct memory_descriptor md;
    struct memory_block *mb = NULL;
    int fd = -1;
    int N = 2;
 
    if(argc == 1) {
        fprintf(stderr, "usage: %s <device name>\n", argv[0]);
        goto do_out;
    }
 
    fprintf(stderr, "Start testing device %s\n", argv[1]);
 
    fd = open(argv[1], S_IROTH | S_IWOTH );
    if(fd < 0) {
        fprintf(stderr, "%s\n", strerror(errno));
        goto do_out;
    }
 
    error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);
    if(error < 0) {
        fprintf(stderr, "%s\n", strerror(errno));
        goto do_close;
    }
 
    board_info(&bi);
 
    mb = (struct memory_block*)malloc(N*sizeof(struct memory_block));
    if(!mb) {
        fprintf(stderr, "%s\n", strerror(errno));
        goto do_close;
    }
 
    memset(mb, 0, N*sizeof(struct memory_block));
 
    for(int i=0; i<N; i++) {
        mb[i].size = 0x100000;
    }
 
    md.blocks = mb;
    md.total_blocks = N;
 
    error = ioctl(fd, IOCTL_PEX_MEM_ALLOC, &md);
    if(error < 0) {
        fprintf(stderr, "%s\n", strerror(errno));
        goto do_free_mem;
    }
 
    for(int i=0; i<N; i++) {
        fprintf(stderr, "%d: PA = 0x%zx\n", i, mb[i].phys);
    }
 
    fprintf(stderr, "Press Enter to free memory...\n");
    getchar();
 
    error = ioctl(fd, IOCTL_PEX_MEM_FREE, &md);
    if(error < 0) {
        fprintf(stderr, "%s\n", strerror(errno));
        goto do_free_mem;
    }
 
    goto do_free_mem;
 
    bar0 = (uint32_t*)mmap(NULL, bi.Size[0], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);
    if( bar0 == MAP_FAILED ) {
        fprintf(stderr, "%s\n", strerror(errno));
        error = -EINVAL;
        goto do_close;
    }
 
    bar1 = (uint32_t*)mmap(NULL, bi.Size[1], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);
    if( bar1== MAP_FAILED ) {
        fprintf(stderr, "%s\n", strerror(errno));
        error = -EINVAL;
        goto do_unmap_bar0;
    }
 
    fprintf(stderr, "Map BAR0 0x%zx -> %p\n", bi.PhysAddress[0], bar0);
    fprintf(stderr, "Map BAR1 0x%zx -> %p\n", bi.PhysAddress[1], bar1);
 
    for(int i=0; i<16; i++) {
        fprintf(stderr, "%d: 0x%x\n", i,  bar0[i]);
    }
 
    board_init(bar0);
 
    //pld_info(bar1);
 
    error = 0;
 
    //do_unmap_bar1:
    munmap(bar1, bi.Size[1]);
 
    do_unmap_bar0:
    munmap(bar0, bi.Size[0]);
 
    do_free_mem:
    free(mb);
 
    do_close:
    close(fd);
 
    do_out:
    return error;
}
 
//-----------------------------------------------------------------------------
 
void board_info(const struct board_info *bi)
{
    if(!bi) return;
 
    fprintf(stderr, "VENDOR ID: 0x%X\n", bi->vendor_id);
    fprintf(stderr, "DEVICE ID: 0x%X\n", bi->device_id);
    fprintf(stderr, "BAR0: 0x%zX\n", bi->PhysAddress[0]);
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[0]);
    fprintf(stderr, "BAR1 0x%zX\n", bi->PhysAddress[1]);
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[1]);
    fprintf(stderr, "IRQ: 0x%zX\n", bi->InterruptVector);
}
 
//-----------------------------------------------------------------------------
 
void memory_info(const struct memory_descriptor *md)
{
    if(!md) return;
    if(!md->blocks) return;
 
    for(unsigned i=0; i<md->total_blocks; i++) {
 
        struct memory_block *b = &md->blocks[i];
        fprintf(stderr, "%d - kernel virtual: %p, kernel physical: %p \n", i, b->virt, (void*)b->phys);
    }
}
 
//-----------------------------------------------------------------------------
 
uint16_t ReadOperationWordReg(uint32_t *base, uint32_t port)
{
    return *((uint16_t*)((uint8_t*)base + port));
}
 
//-----------------------------------------------------------------------------
 
void WriteOperationWordReg(uint32_t *base, uint32_t port, uint16_t value)
{
    *((uint16_t*)((uint8_t*)base + port)) = value;
}
 
//-----------------------------------------------------------------------------
 
uint32_t ReadAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort)
{
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
    return *((uint32_t*)(pBaseAddress + RelativePort));
}
 
//-----------------------------------------------------------------------------
 
uint32_t ReadAmbMainReg(uint32_t *base, uint32_t RelativePort)
{
    return *((uint32_t*)((uint8_t*)base + RelativePort));
}
 
//-----------------------------------------------------------------------------
 
void WriteAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort, uint32_t value)
{
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
    *((uint32_t*)(pBaseAddress + RelativePort)) = value;
}
 
//-----------------------------------------------------------------------------
 
void WriteAmbMainReg(uint32_t *base, uint32_t RelativePort, uint32_t value)
{
    *((uint32_t*)((uint8_t*)base + RelativePort)) = value;
}
 
//-----------------------------------------------------------------------------
 
int WaitCmdReady(uint32_t *base, uint32_t AdmNumber, uint32_t StatusAddress)
{
    int pass_count = 0;
    uint32_t cmd_rdy;
 
    //fprintf(stderr,"%s()\n", __FUNCTION__);
 
    do {
 
        cmd_rdy = ReadAmbReg(base, AdmNumber, StatusAddress);
        cmd_rdy &= AMB_statCMDRDY; //HOST_statCMDRDY;
 
        if(pass_count < 10) {
 
            pass_count++;
            ToPause(1);
 
        } else {
            return -1;
        }
 
    } while(!cmd_rdy);
 
    return 0;
}
 
//-----------------------------------------------------------------------------
 
int WriteRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t value)
{
    int Status = 0;
    uint32_t Address = TetrNumber * TETRAD_SIZE;
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
 
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
 
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
    if(Status != 0) {
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
        return Status;
    }
 
    WriteAmbReg(base, AdmNumber, DataAddress, value);
 
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d\n", __FUNCTION__,
    //          AdmNumber, TetrNumber, RegNumber);
 
    return Status;
}
 
//-----------------------------------------------------------------------------
 
int ReadRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t *Value)
{
    int Status = 0;
    uint32_t Address = TetrNumber * TETRAD_SIZE;
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
 
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
 
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
    if(Status != 0) {
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
        return Status;
    }
 
    *Value = ReadAmbReg(base, AdmNumber, DataAddress);
 
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d, Val = %x\n", __FUNCTION__,
    //          AdmNumber, TetrNumber, RegNumber, (int)*Value);
 
    return Status;
}
 
//-----------------------------------------------------------------------------
 
uint32_t RegPeekInd(uint32_t *base, uint32_t trdNo, uint32_t rgnum)
{
    uint32_t Value = 0;
 
    ReadRegData(base, 0, trdNo, rgnum, &Value);
 
    return Value;
}
 
//-----------------------------------------------------------------------------
 
int RegPokeDir( uint32_t *base, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value )
{
    uint32_t Address;
 
    Address = TetrNumber * TETRAD_SIZE;
    RegNumber = RegNumber & 0x3;
 
    Address += RegNumber * REG_SIZE;
 
    WriteAmbReg(base, 0, Address, Value);
 
    return 0;
}
 
//-----------------------------------------------------------------------------
 
void ToPause(int ms)
{
    struct timeval tv = {0, 0};
    tv.tv_usec = 1000*ms;
 
    select(0,NULL,NULL,NULL,&tv);
}
 
//-----------------------------------------------------------------------------
 
int board_init(uint32_t *base)
{
    u16 temp = 0;
    u16 blockId = 0;
    u16 blockVer = 0;
    u16 deviceID = 0;
    u16 deviceRev = 0;
    int i = 0;
 
    blockId = ReadOperationWordReg(base, PEMAINadr_BLOCK_ID);
    blockVer = ReadOperationWordReg(base, PEMAINadr_BLOCK_VER);
 
    fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);
 
    deviceID = ReadOperationWordReg(base, PEMAINadr_DEVICE_ID);
    deviceRev = ReadOperationWordReg(base, PEMAINadr_DEVICE_REV);
 
    fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
 
    if((AMBPEX8_DEVID != deviceID) &&
       (ADP201X1AMB_DEVID != deviceID) &&
       (AMBPEX5_DEVID != deviceID))
        return -ENODEV;
 
    temp = ReadOperationWordReg(base, PEMAINadr_PLD_VER);
    int m_BlockCnt = ReadOperationWordReg(base, PEMAINadr_BLOCK_CNT);
 
    fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);
    fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);
 
    // определим какие каналы ПДП присутствуют и их характеристики:
    // направление передачи данных, размер FIFO, максимальный размер блока ПДП
 
    FIFO_ID FifoId;
    int m_DmaFifoSize[4] = {0};
    int m_MaxDmaSize[4] = {0};
    //int m_FifoAddr[4] = {0};
    //int m_BlockFifoId[4] = {0};
    int m_DmaDir[4] = {0};
    int m_DmaChanMask = 0;
 
    for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)
    {
        uint32_t FifoAddr = 0;
        u16 block_id = 0;
        FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;
        temp = ReadOperationWordReg(base, PEFIFOadr_BLOCK_ID + FifoAddr);
        block_id = (temp & 0x0FFF);
        if(block_id == PE_FIFO_ID)
        {
            u64 one = 0;
            u64 maxdmasize = 0;
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
            //m_FifoAddr[iChan] = FifoAddr;
            //m_BlockFifoId[iChan] = block_id;
            m_DmaChanMask |= (1 << iChan);
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
            temp = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr);
 
            one = 1;
            maxdmasize = one << temp;
            // если макс. размер ПДП может быть больше или равен 4 Гбайт, то снижаем его до 1 Гбайта
            if(temp >= 32)
                m_MaxDmaSize[iChan] = 0x40000000;
            else
                m_MaxDmaSize[iChan] = (uint32_t)maxdmasize;
 
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d,\n", __FUNCTION__,
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan]);
            fprintf(stderr,"%s(): Max DMA size (hard) = %d MBytes,  Max DMA size (soft) = %d MBytes.\n", __FUNCTION__,
                    (uint32_t)(maxdmasize / 1024 / 1024), m_MaxDmaSize[iChan] / 1024 / 1024);
        }
        if(block_id == PE_EXT_FIFO_ID)
        {
            uint32_t resource_id = 0;
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
            //m_FifoAddr[iChan] = FifoAddr;
            //m_BlockFifoId[iChan] = block_id;
            m_DmaChanMask |= (1 << iChan);
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
            m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт
            resource_id = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr); // RESOURCE
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);
        }
    }
 
    // подготовим к работе ПЛИС ADM
    fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);
    WriteOperationWordReg(base,PEMAINadr_BRD_MODE, 0);
    ToPause(100);       // pause ~ 100 msec
    for(i = 0; i < 10; i++)
    {
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 1);
        ToPause(100);   // pause ~ 100 msec
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 3);
        ToPause(100);   // pause ~ 100 msec
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 7);
        ToPause(100);   // pause ~ 100 msec
        temp = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS) & 0x01;
        if(temp)
            break;
    }
    WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0x0F);
    ToPause(100);       // pause ~ 100 msec
 
    if(temp)
    {
        uint32_t idx = 0;
        BRD_STATUS brd_status;
        fprintf(stderr,"%s(): ADM PLD is captured.\n", __FUNCTION__);
        brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
        brd_status.ByBits.InFlags &= 0x80; // 1 - ADM PLD in test mode
        if(brd_status.ByBits.InFlags)
        {
            BRD_MODE brd_mode;
            fprintf(stderr,"%s(): ADM PLD in test mode.\n", __FUNCTION__);
 
            // проверка линий передачи флагов
            brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
            for(idx = 0; idx < 4; idx++)
            {
                brd_mode.ByBits.OutFlags = idx;
                WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
                ToPause(10);
                brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
                brd_status.ByBits.InFlags &= 0x03;
                if(brd_mode.ByBits.OutFlags != brd_status.ByBits.InFlags)
                {
                    temp = 0;
                    fprintf(stderr,"%s(): FLG_IN (%d) NOT equ FLG_OUT (%d).\n", __FUNCTION__,
                            brd_status.ByBits.InFlags, brd_mode.ByBits.OutFlags);
                    break;
                }
            }
            if(temp)
                fprintf(stderr,"%s(): FLG_IN equ FLG_OUT.\n", __FUNCTION__);
        }
        else
            temp = 0;
    }
 
    if(!temp)
    {
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0);
        ToPause(100);   // pause ~ 100 msec
    }
 
 
    // состояние ПЛИС ADM: 0 - не готова
    fprintf(stderr,"%s(): ADM PLD[%d] status = 0x%X.\n", __FUNCTION__, i, temp);
 
    {
        BRD_MODE brd_mode;
        brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
        brd_mode.ByBits.OutFlags = 0;
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
        fprintf(stderr,"%s(): BRD_MODE = 0x%X.\n", __FUNCTION__, brd_mode.AsWhole);
    }
 
    WriteOperationWordReg(base, PEMAINadr_IRQ_MASK, 0x4000);
 
    //WriteAmbMainReg(base, 0x0, 0x1);
    //WriteAmbMainReg(base, 0x0, 0x1);
 
    return 0;
}
 
//-----------------------------------------------------------------------------
 
void pld_info( uint32_t *base )
{
        uint32_t d = 0;
        uint32_t d1 = 0;
        uint32_t d2 = 0;
        uint32_t d3 = 0;
        uint32_t d4 = 0;
        uint32_t d5 = 0;
        int ii = 0;
 
        if(!base) return;
 
        fprintf(stderr,"Прошивка ПЛИС ADM\n" );
 
        RegPokeDir( base, 0, 1, 1 );
 
        d=RegPeekInd( base, 0, 0x108 );
        if( d==0x4953 ) {
            fprintf(stderr, "  SIG= 0x%.4X - Ok \n", d );
        } else {
            fprintf(stderr, "  SIG= 0x%.4X - Ошибка, ожидается 0x4953    \n", d );
            return;
        }
 
        d=RegPeekInd( base,  0, 0x109 );  fprintf(stderr, "   Версия интерфейса ADM:  %d.%d\n", d>>8, d&0xFF );
        d=RegPeekInd( base,  0, 0x110 ); d1=RegPeekInd( base,  0, 0x111 );
        fprintf(stderr,  "   Базовый модуль: 0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
 
        d=RegPeekInd( base,  0, 0x112 ); d1=RegPeekInd( base,  0, 0x113 );
        fprintf(stderr,  "   Субмодуль:      0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
 
        d=RegPeekInd( base,  0, 0x10B );  fprintf(stderr,  "   Модификация прошивки ПЛИС:  %d \n", d );
        d=RegPeekInd( base,  0, 0x10A );  fprintf(stderr,  "   Версия прошивки ПЛИС:       %d.%d\n", d>>8, d&0xFF );
        d=RegPeekInd( base,  0, 0x114 );  fprintf(stderr,  "   Номер сборки прошивки ПЛИС: 0x%.4X\n", d );
 
        fprintf(stderr,  "\nИнформация о тетрадах:\n\n" );
        for( ii=0; ii<8; ii++ ) {
 
            const char *str;
 
            d=RegPeekInd( base,  ii, 0x100 );
            d1=RegPeekInd( base,  ii, 0x101 );
            d2=RegPeekInd( base,  ii, 0x102 );
            d3=RegPeekInd( base,  ii, 0x103 );
            d4=RegPeekInd( base,  ii, 0x104 );
            d5=RegPeekInd( base,  ii, 0x105 );
 
            switch( d ) {
            case 1: str="TRD_MAIN      "; break;
            case 2: str="TRD_BASE_DAC  "; break;
            case 3: str="TRD_PIO_STD   "; break;
            case 0:    str=" -            "; break;
            case 0x47: str="SBSRAM_IN     "; break;
            case 0x48: str="SBSRAM_OUT    "; break;
            case 0x12: str="DIO64_OUT     "; break;
            case 0x13: str="DIO64_IN      "; break;
            case 0x14: str="ADM212x200M   "; break;
            case 0x5D: str="ADM212x500M   "; break;
            case 0x41: str="DDS9956       "; break;
            case 0x4F: str="TEST_CTRL     "; break;
            case 0x3F: str="ADM214x200M   "; break;
            case 0x40: str="ADM216x100    "; break;
            case 0x2F: str="ADM28x1G      "; break;
            case 0x2D: str="TRD128_OUT    "; break;
            case 0x4C: str="TRD128_IN     "; break;
            case 0x30: str="ADMDDC5016    "; break;
            case 0x2E: str="ADMFOTR2G     "; break;
            case 0x49: str="ADMFOTR3G     "; break;
            case 0x67: str="DDS9912       "; break;
            case 0x70: str="AMBPEX5_SDRAM "; break;
            case 0x71: str="TRD_MSG       "; break;
            case 0x72: str="TRD_TS201     "; break;
            case 0x73: str="TRD_STREAM_IN "; break;
            case 0x74: str="TRD_STREAM_OUT"; break;
 
 
            default: str="UNKNOW        "; break;
            }
            fprintf(stderr,  " %d  0x%.4X %s ", ii, d, str );
            if( d>0 ) {
                fprintf(stderr,  " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );
                if( d3 & 0x10 ) {
                    fprintf(stderr,  "FIFO IN   %dx%d\n", d4, d5 );
                } else if( d3 & 0x20 ) {
                    fprintf(stderr,  "FIFO OUT  %dx%d\n", d4, d5 );
                } else {
                    fprintf(stderr,  "\n" );
                }
            } else {
                fprintf(stderr,  "\n" );
            }
 
        }
}
 
//-----------------------------------------------------------------------------

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[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [driver/] [pexdrv/] [exam/] [pex_test.cpp] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	dsmv
2			`#include <stdio.h>`
3			`#include <unistd.h>`
4			`#include <stdlib.h>`
5			`#include <string.h>`
6			`#include <ctype.h>`
7			`#include <time.h>`
8			`#include <errno.h>`
9			`#include <limits.h>`
10			`#include <stdarg.h>`
11			`#include <stdint.h>`
12			`#include <sys/types.h>`
13			`#include <sys/stat.h>`
14			`#include <sys/ioctl.h>`
15			`#include <sys/mman.h>`
16			`#include <fcntl.h>`
17
18			`#include "pexioctl.h"`
19			`#include "ambpexregs.h"`
20
21			`#define INSYS_VENDOR_ID 0x4953`
22			`#define AMBPEX8_DEVID 0x5503`
23			`#define ADP201X1AMB_DEVID 0x5504`
24			`#define ADP201X1DSP_DEVID 0x5505`
25			`#define AMBPEX5_DEVID 0x5507`
26
27			`//-----------------------------------------------------------------------------`
28
29			`void board_info(const struct board_info *bi);`
30			`void pld_info( uint32_t *base );`
31			`int board_init(uint32_t *base);`
32			`void ToPause(int ms);`
33
34			`//-----------------------------------------------------------------------------`
35			`uint32_t *bar0 = NULL;`
36			`uint32_t *bar1 = NULL;`
37			`//-----------------------------------------------------------------------------`
38
39			`int main(int argc, char *argv[])`
40			`{`
41			`int error = 0;`
42			`struct board_info bi;`
43			`struct memory_descriptor md;`
44			`struct memory_block *mb = NULL;`
45			`int fd = -1;`
46			`int N = 2;`
47
48			`if(argc == 1) {`
49			`fprintf(stderr, "usage: %s <device name>\n", argv[0]);`
50			`goto do_out;`
51			`}`
52
53			`fprintf(stderr, "Start testing device %s\n", argv[1]);`
54
55			`fd = open(argv[1], S_IROTH \| S_IWOTH );`
56			`if(fd < 0) {`
57			`fprintf(stderr, "%s\n", strerror(errno));`
58			`goto do_out;`
59			`}`
60
61			`error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);`
62			`if(error < 0) {`
63			`fprintf(stderr, "%s\n", strerror(errno));`
64			`goto do_close;`
65			`}`
66
67			`board_info(&bi);`
68
69			`mb = (struct memory_block)malloc(Nsizeof(struct memory_block));`
70			`if(!mb) {`
71			`fprintf(stderr, "%s\n", strerror(errno));`
72			`goto do_close;`
73			`}`
74
75			`memset(mb, 0, N*sizeof(struct memory_block));`
76
77			`for(int i=0; i<N; i++) {`
78			`mb[i].size = 0x100000;`
79			`}`
80
81			`md.blocks = mb;`
82			`md.total_blocks = N;`
83
84			`error = ioctl(fd, IOCTL_PEX_MEM_ALLOC, &md);`
85			`if(error < 0) {`
86			`fprintf(stderr, "%s\n", strerror(errno));`
87			`goto do_free_mem;`
88			`}`
89
90			`for(int i=0; i<N; i++) {`
91			`fprintf(stderr, "%d: PA = 0x%zx\n", i, mb[i].phys);`
92			`}`
93
94			`fprintf(stderr, "Press Enter to free memory...\n");`
95			`getchar();`
96
97			`error = ioctl(fd, IOCTL_PEX_MEM_FREE, &md);`
98			`if(error < 0) {`
99			`fprintf(stderr, "%s\n", strerror(errno));`
100			`goto do_free_mem;`
101			`}`
102
103			`goto do_free_mem;`
104
105			`bar0 = (uint32_t*)mmap(NULL, bi.Size[0], PROT_READ\|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);`
106			`if( bar0 == MAP_FAILED ) {`
107			`fprintf(stderr, "%s\n", strerror(errno));`
108			`error = -EINVAL;`
109			`goto do_close;`
110			`}`
111
112			`bar1 = (uint32_t*)mmap(NULL, bi.Size[1], PROT_READ\|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);`
113			`if( bar1== MAP_FAILED ) {`
114			`fprintf(stderr, "%s\n", strerror(errno));`
115			`error = -EINVAL;`
116			`goto do_unmap_bar0;`
117			`}`
118
119			`fprintf(stderr, "Map BAR0 0x%zx -> %p\n", bi.PhysAddress[0], bar0);`
120			`fprintf(stderr, "Map BAR1 0x%zx -> %p\n", bi.PhysAddress[1], bar1);`
121
122			`for(int i=0; i<16; i++) {`
123			`fprintf(stderr, "%d: 0x%x\n", i, bar0[i]);`
124			`}`
125
126			`board_init(bar0);`
127
128			`//pld_info(bar1);`
129
130			`error = 0;`
131
132			`//do_unmap_bar1:`
133			`munmap(bar1, bi.Size[1]);`
134
135			`do_unmap_bar0:`
136			`munmap(bar0, bi.Size[0]);`
137
138			`do_free_mem:`
139			`free(mb);`
140
141			`do_close:`
142			`close(fd);`
143
144			`do_out:`
145			`return error;`
146			`}`
147
148			`//-----------------------------------------------------------------------------`
149
150			`void board_info(const struct board_info *bi)`
151			`{`
152			`if(!bi) return;`
153
154			`fprintf(stderr, "VENDOR ID: 0x%X\n", bi->vendor_id);`
155			`fprintf(stderr, "DEVICE ID: 0x%X\n", bi->device_id);`
156			`fprintf(stderr, "BAR0: 0x%zX\n", bi->PhysAddress[0]);`
157			`fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[0]);`
158			`fprintf(stderr, "BAR1 0x%zX\n", bi->PhysAddress[1]);`
159			`fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[1]);`
160			`fprintf(stderr, "IRQ: 0x%zX\n", bi->InterruptVector);`
161			`}`
162
163			`//-----------------------------------------------------------------------------`
164
165			`void memory_info(const struct memory_descriptor *md)`
166			`{`
167			`if(!md) return;`
168			`if(!md->blocks) return;`
169
170			`for(unsigned i=0; i<md->total_blocks; i++) {`
171
172			`struct memory_block *b = &md->blocks[i];`
173			`fprintf(stderr, "%d - kernel virtual: %p, kernel physical: %p \n", i, b->virt, (void*)b->phys);`
174			`}`
175			`}`
176
177			`//-----------------------------------------------------------------------------`
178
179			`uint16_t ReadOperationWordReg(uint32_t *base, uint32_t port)`
180			`{`
181			`return ((uint16_t)((uint8_t*)base + port));`
182			`}`
183
184			`//-----------------------------------------------------------------------------`
185
186			`void WriteOperationWordReg(uint32_t *base, uint32_t port, uint16_t value)`
187			`{`
188			`((uint16_t)((uint8_t*)base + port)) = value;`
189			`}`
190
191			`//-----------------------------------------------------------------------------`
192
193			`uint32_t ReadAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort)`
194			`{`
195			`uint8_t* pBaseAddress = (uint8_t)base + AdmNumber ADM_SIZE;`
196			`return ((uint32_t)(pBaseAddress + RelativePort));`
197			`}`
198
199			`//-----------------------------------------------------------------------------`
200
201			`uint32_t ReadAmbMainReg(uint32_t *base, uint32_t RelativePort)`
202			`{`
203			`return ((uint32_t)((uint8_t*)base + RelativePort));`
204			`}`
205
206			`//-----------------------------------------------------------------------------`
207
208			`void WriteAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort, uint32_t value)`
209			`{`
210			`uint8_t* pBaseAddress = (uint8_t)base + AdmNumber ADM_SIZE;`
211			`((uint32_t)(pBaseAddress + RelativePort)) = value;`
212			`}`
213
214			`//-----------------------------------------------------------------------------`
215
216			`void WriteAmbMainReg(uint32_t *base, uint32_t RelativePort, uint32_t value)`
217			`{`
218			`((uint32_t)((uint8_t*)base + RelativePort)) = value;`
219			`}`
220
221			`//-----------------------------------------------------------------------------`
222
223			`int WaitCmdReady(uint32_t *base, uint32_t AdmNumber, uint32_t StatusAddress)`
224			`{`
225			`int pass_count = 0;`
226			`uint32_t cmd_rdy;`
227
228			`//fprintf(stderr,"%s()\n", __FUNCTION__);`
229
230			`do {`
231
232			`cmd_rdy = ReadAmbReg(base, AdmNumber, StatusAddress);`
233			`cmd_rdy &= AMB_statCMDRDY; //HOST_statCMDRDY;`
234
235			`if(pass_count < 10) {`
236
237			`pass_count++;`
238			`ToPause(1);`
239
240			`} else {`
241			`return -1;`
242			`}`
243
244			`} while(!cmd_rdy);`
245
246			`return 0;`
247			`}`
248
249			`//-----------------------------------------------------------------------------`
250
251			`int WriteRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t value)`
252			`{`
253			`int Status = 0;`
254			`uint32_t Address = TetrNumber * TETRAD_SIZE;`
255			`uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;`
256			`uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;`
257			`uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;`
258
259			`WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);`
260
261			`Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY`
262			`if(Status != 0) {`
263			`fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);`
264			`return Status;`
265			`}`
266
267			`WriteAmbReg(base, AdmNumber, DataAddress, value);`
268
269			`//fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d\n", __FUNCTION__,`
270			`// AdmNumber, TetrNumber, RegNumber);`
271
272			`return Status;`
273			`}`
274
275			`//-----------------------------------------------------------------------------`
276
277			`int ReadRegData(uint32_t base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value)`
278			`{`
279			`int Status = 0;`
280			`uint32_t Address = TetrNumber * TETRAD_SIZE;`
281			`uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;`
282			`uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;`
283			`uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;`
284
285			`WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);`
286
287			`Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY`
288			`if(Status != 0) {`
289			`fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);`
290			`return Status;`
291			`}`
292
293			`*Value = ReadAmbReg(base, AdmNumber, DataAddress);`
294
295			`//fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d, Val = %x\n", __FUNCTION__,`
296			`// AdmNumber, TetrNumber, RegNumber, (int)*Value);`
297
298			`return Status;`
299			`}`
300
301			`//-----------------------------------------------------------------------------`
302
303			`uint32_t RegPeekInd(uint32_t *base, uint32_t trdNo, uint32_t rgnum)`
304			`{`
305			`uint32_t Value = 0;`
306
307			`ReadRegData(base, 0, trdNo, rgnum, &Value);`
308
309			`return Value;`
310			`}`
311
312			`//-----------------------------------------------------------------------------`
313
314			`int RegPokeDir( uint32_t *base, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value )`
315			`{`
316			`uint32_t Address;`
317
318			`Address = TetrNumber * TETRAD_SIZE;`
319			`RegNumber = RegNumber & 0x3;`
320
321			`Address += RegNumber * REG_SIZE;`
322
323			`WriteAmbReg(base, 0, Address, Value);`
324
325			`return 0;`
326			`}`
327
328			`//-----------------------------------------------------------------------------`
329
330			`void ToPause(int ms)`
331			`{`
332			`struct timeval tv = {0, 0};`
333			`tv.tv_usec = 1000*ms;`
334
335			`select(0,NULL,NULL,NULL,&tv);`
336			`}`
337
338			`//-----------------------------------------------------------------------------`
339
340			`int board_init(uint32_t *base)`
341			`{`
342			`u16 temp = 0;`
343			`u16 blockId = 0;`
344			`u16 blockVer = 0;`
345			`u16 deviceID = 0;`
346			`u16 deviceRev = 0;`
347			`int i = 0;`
348
349			`blockId = ReadOperationWordReg(base, PEMAINadr_BLOCK_ID);`
350			`blockVer = ReadOperationWordReg(base, PEMAINadr_BLOCK_VER);`
351
352			`fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);`
353
354			`deviceID = ReadOperationWordReg(base, PEMAINadr_DEVICE_ID);`
355			`deviceRev = ReadOperationWordReg(base, PEMAINadr_DEVICE_REV);`
356
357			`fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);`
358
359			`if((AMBPEX8_DEVID != deviceID) &&`
360			`(ADP201X1AMB_DEVID != deviceID) &&`
361			`(AMBPEX5_DEVID != deviceID))`
362			`return -ENODEV;`
363
364			`temp = ReadOperationWordReg(base, PEMAINadr_PLD_VER);`
365			`int m_BlockCnt = ReadOperationWordReg(base, PEMAINadr_BLOCK_CNT);`
366
367			`fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);`
368			`fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);`
369
370			`// определим какие каналы ПДП присутствуют и их характеристики:`
371			`// направление передачи данных, размер FIFO, максимальный размер блока ПДП`
372
373			`FIFO_ID FifoId;`
374			`int m_DmaFifoSize[4] = {0};`
375			`int m_MaxDmaSize[4] = {0};`
376			`//int m_FifoAddr[4] = {0};`
377			`//int m_BlockFifoId[4] = {0};`
378			`int m_DmaDir[4] = {0};`
379			`int m_DmaChanMask = 0;`
380
381			`for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)`
382			`{`
383			`uint32_t FifoAddr = 0;`
384			`u16 block_id = 0;`
385			`FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;`
386			`temp = ReadOperationWordReg(base, PEFIFOadr_BLOCK_ID + FifoAddr);`
387			`block_id = (temp & 0x0FFF);`
388			`if(block_id == PE_FIFO_ID)`
389			`{`
390			`u64 one = 0;`
391			`u64 maxdmasize = 0;`
392			`u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);`
393			`//m_FifoAddr[iChan] = FifoAddr;`
394			`//m_BlockFifoId[iChan] = block_id;`
395			`m_DmaChanMask \|= (1 << iChan);`
396			`FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);`
397			`m_DmaFifoSize[iChan] = FifoId.ByBits.Size;`
398			`m_DmaDir[iChan] = FifoId.ByBits.Dir;`
399			`temp = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr);`
400
401			`one = 1;`
402			`maxdmasize = one << temp;`
403			`// если макс. размер ПДП может быть больше или равен 4 Гбайт, то снижаем его до 1 Гбайта`
404			`if(temp >= 32)`
405			`m_MaxDmaSize[iChan] = 0x40000000;`
406			`else`
407			`m_MaxDmaSize[iChan] = (uint32_t)maxdmasize;`
408
409			`fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d,\n", __FUNCTION__,`
410			`iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan]);`
411			`fprintf(stderr,"%s(): Max DMA size (hard) = %d MBytes, Max DMA size (soft) = %d MBytes.\n", __FUNCTION__,`
412			`(uint32_t)(maxdmasize / 1024 / 1024), m_MaxDmaSize[iChan] / 1024 / 1024);`
413			`}`
414			`if(block_id == PE_EXT_FIFO_ID)`
415			`{`
416			`uint32_t resource_id = 0;`
417			`u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);`
418			`//m_FifoAddr[iChan] = FifoAddr;`
419			`//m_BlockFifoId[iChan] = block_id;`
420			`m_DmaChanMask \|= (1 << iChan);`
421			`FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);`
422			`m_DmaFifoSize[iChan] = FifoId.ByBits.Size;`
423			`m_DmaDir[iChan] = FifoId.ByBits.Dir;`
424			`m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт`
425			`resource_id = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr); // RESOURCE`
426			`fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,`
427			`iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);`
428			`}`
429			`}`
430
431			`// подготовим к работе ПЛИС ADM`
432			`fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);`
433			`WriteOperationWordReg(base,PEMAINadr_BRD_MODE, 0);`
434			`ToPause(100); // pause ~ 100 msec`
435			`for(i = 0; i < 10; i++)`
436			`{`
437			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 1);`
438			`ToPause(100); // pause ~ 100 msec`
439			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 3);`
440			`ToPause(100); // pause ~ 100 msec`
441			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 7);`
442			`ToPause(100); // pause ~ 100 msec`
443			`temp = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS) & 0x01;`
444			`if(temp)`
445			`break;`
446			`}`
447			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0x0F);`
448			`ToPause(100); // pause ~ 100 msec`
449
450			`if(temp)`
451			`{`
452			`uint32_t idx = 0;`
453			`BRD_STATUS brd_status;`
454			`fprintf(stderr,"%s(): ADM PLD is captured.\n", __FUNCTION__);`
455			`brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);`
456			`brd_status.ByBits.InFlags &= 0x80; // 1 - ADM PLD in test mode`
457			`if(brd_status.ByBits.InFlags)`
458			`{`
459			`BRD_MODE brd_mode;`
460			`fprintf(stderr,"%s(): ADM PLD in test mode.\n", __FUNCTION__);`
461
462			`// проверка линий передачи флагов`
463			`brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);`
464			`for(idx = 0; idx < 4; idx++)`
465			`{`
466			`brd_mode.ByBits.OutFlags = idx;`
467			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);`
468			`ToPause(10);`
469			`brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);`
470			`brd_status.ByBits.InFlags &= 0x03;`
471			`if(brd_mode.ByBits.OutFlags != brd_status.ByBits.InFlags)`
472			`{`
473			`temp = 0;`
474			`fprintf(stderr,"%s(): FLG_IN (%d) NOT equ FLG_OUT (%d).\n", __FUNCTION__,`
475			`brd_status.ByBits.InFlags, brd_mode.ByBits.OutFlags);`
476			`break;`
477			`}`
478			`}`
479			`if(temp)`
480			`fprintf(stderr,"%s(): FLG_IN equ FLG_OUT.\n", __FUNCTION__);`
481			`}`
482			`else`
483			`temp = 0;`
484			`}`
485
486			`if(!temp)`
487			`{`
488			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0);`
489			`ToPause(100); // pause ~ 100 msec`
490			`}`
491
492
493			`// состояние ПЛИС ADM: 0 - не готова`
494			`fprintf(stderr,"%s(): ADM PLD[%d] status = 0x%X.\n", __FUNCTION__, i, temp);`
495
496			`{`
497			`BRD_MODE brd_mode;`
498			`brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);`
499			`brd_mode.ByBits.OutFlags = 0;`
500			`WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);`
501			`fprintf(stderr,"%s(): BRD_MODE = 0x%X.\n", __FUNCTION__, brd_mode.AsWhole);`
502			`}`
503
504			`WriteOperationWordReg(base, PEMAINadr_IRQ_MASK, 0x4000);`
505
506			`//WriteAmbMainReg(base, 0x0, 0x1);`
507			`//WriteAmbMainReg(base, 0x0, 0x1);`
508
509			`return 0;`
510			`}`
511
512			`//-----------------------------------------------------------------------------`
513
514			`void pld_info( uint32_t *base )`
515			`{`
516			`uint32_t d = 0;`
517			`uint32_t d1 = 0;`
518			`uint32_t d2 = 0;`
519			`uint32_t d3 = 0;`
520			`uint32_t d4 = 0;`
521			`uint32_t d5 = 0;`
522			`int ii = 0;`
523
524			`if(!base) return;`
525
526			`fprintf(stderr,"Прошивка ПЛИС ADM\n" );`
527
528			`RegPokeDir( base, 0, 1, 1 );`
529
530			`d=RegPeekInd( base, 0, 0x108 );`
531			`if( d==0x4953 ) {`
532			`fprintf(stderr, " SIG= 0x%.4X - Ok \n", d );`
533			`} else {`
534			`fprintf(stderr, " SIG= 0x%.4X - Ошибка, ожидается 0x4953 \n", d );`
535			`return;`
536			`}`
537
538			`d=RegPeekInd( base, 0, 0x109 ); fprintf(stderr, " Версия интерфейса ADM: %d.%d\n", d>>8, d&0xFF );`
539			`d=RegPeekInd( base, 0, 0x110 ); d1=RegPeekInd( base, 0, 0x111 );`
540			`fprintf(stderr, " Базовый модуль: 0x%.4X v%d.%d\n", d, d1>>8, d1&0xFF );`
541
542			`d=RegPeekInd( base, 0, 0x112 ); d1=RegPeekInd( base, 0, 0x113 );`
543			`fprintf(stderr, " Субмодуль: 0x%.4X v%d.%d\n", d, d1>>8, d1&0xFF );`
544
545			`d=RegPeekInd( base, 0, 0x10B ); fprintf(stderr, " Модификация прошивки ПЛИС: %d \n", d );`
546			`d=RegPeekInd( base, 0, 0x10A ); fprintf(stderr, " Версия прошивки ПЛИС: %d.%d\n", d>>8, d&0xFF );`
547			`d=RegPeekInd( base, 0, 0x114 ); fprintf(stderr, " Номер сборки прошивки ПЛИС: 0x%.4X\n", d );`
548
549			`fprintf(stderr, "\nИнформация о тетрадах:\n\n" );`
550			`for( ii=0; ii<8; ii++ ) {`
551
552			`const char *str;`
553
554			`d=RegPeekInd( base, ii, 0x100 );`
555			`d1=RegPeekInd( base, ii, 0x101 );`
556			`d2=RegPeekInd( base, ii, 0x102 );`
557			`d3=RegPeekInd( base, ii, 0x103 );`
558			`d4=RegPeekInd( base, ii, 0x104 );`
559			`d5=RegPeekInd( base, ii, 0x105 );`
560
561			`switch( d ) {`
562			`case 1: str="TRD_MAIN "; break;`
563			`case 2: str="TRD_BASE_DAC "; break;`
564			`case 3: str="TRD_PIO_STD "; break;`
565			`case 0: str=" - "; break;`
566			`case 0x47: str="SBSRAM_IN "; break;`
567			`case 0x48: str="SBSRAM_OUT "; break;`
568			`case 0x12: str="DIO64_OUT "; break;`
569			`case 0x13: str="DIO64_IN "; break;`
570			`case 0x14: str="ADM212x200M "; break;`
571			`case 0x5D: str="ADM212x500M "; break;`
572			`case 0x41: str="DDS9956 "; break;`
573			`case 0x4F: str="TEST_CTRL "; break;`
574			`case 0x3F: str="ADM214x200M "; break;`
575			`case 0x40: str="ADM216x100 "; break;`
576			`case 0x2F: str="ADM28x1G "; break;`
577			`case 0x2D: str="TRD128_OUT "; break;`
578			`case 0x4C: str="TRD128_IN "; break;`
579			`case 0x30: str="ADMDDC5016 "; break;`
580			`case 0x2E: str="ADMFOTR2G "; break;`
581			`case 0x49: str="ADMFOTR3G "; break;`
582			`case 0x67: str="DDS9912 "; break;`
583			`case 0x70: str="AMBPEX5_SDRAM "; break;`
584			`case 0x71: str="TRD_MSG "; break;`
585			`case 0x72: str="TRD_TS201 "; break;`
586			`case 0x73: str="TRD_STREAM_IN "; break;`
587			`case 0x74: str="TRD_STREAM_OUT"; break;`
588
589
590			`default: str="UNKNOW "; break;`
591			`}`
592			`fprintf(stderr, " %d 0x%.4X %s ", ii, d, str );`
593			`if( d>0 ) {`
594			`fprintf(stderr, " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );`
595			`if( d3 & 0x10 ) {`
596			`fprintf(stderr, "FIFO IN %dx%d\n", d4, d5 );`
597			`} else if( d3 & 0x20 ) {`
598			`fprintf(stderr, "FIFO OUT %dx%d\n", d4, d5 );`
599			`} else {`
600			`fprintf(stderr, "\n" );`
601			`}`
602			`} else {`
603			`fprintf(stderr, "\n" );`
604			`}`
605
606			`}`
607			`}`
608
609			`//-----------------------------------------------------------------------------`