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dsmv |
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#ifndef _HARDWARE_H_
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#define _HARDWARE_H_
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//-----------------------------------------------------------------------------
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#define INSYS_VENDOR_ID 0x4953
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#define AMBPEX8_DEVID 0x5503
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#define ADP201X1AMB_DEVID 0x5504
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#define ADP201X1DSP_DEVID 0x5505
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#define AMBPEX5_DEVID 0x5507
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#define AMBPEXARM_DEVID 0x5702
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#define AMBFMC106P_DEVID 0x550A
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v.karak |
#define AMBFMC114V_DEVID 0x550C
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#define AMBKU_SSCOS_DEVID 0x5703
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dsmv |
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//-----------------------------------------------------------------------------
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#define MAX_PEXDEVICE_SUPPORT 4
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//-----------------------------------------------------------------------------
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struct pex_device;
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//-----------------------------------------------------------------------------
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int set_device_name(struct pex_device *brd, u16 dev_id, int index);
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int InitializeBoard(struct pex_device *brd);
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u32 ReadOperationReg(struct pex_device *brd, u32 RelativePort);
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void WriteOperationReg(struct pex_device *brd, u32 RelativePort, u32 Value);
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u16 ReadOperationWordReg(struct pex_device *brd, u32 RelativePort);
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void WriteOperationWordReg(struct pex_device *brd, u32 RelativePort, u16 Value);
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u32 ReadAmbReg(struct pex_device *brd, u32 AdmNumber, u32 RelativePort);
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u32 ReadAmbMainReg(struct pex_device *brd, u32 RelativePort);
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void WriteAmbReg(struct pex_device *brd, u32 AdmNumber, u32 RelativePort, u32 Value);
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void WriteAmbMainReg(struct pex_device *brd, u32 RelativePort, u32 Value);
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void ReadBufAmbReg(struct pex_device *brd, u32 AdmNumber, u32 RelativePort, u32* VirtualAddress, u32 DwordsCount);
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void WriteBufAmbReg(struct pex_device *brd, u32 AdmNumber, u32 RelativePort, u32* VirtualAddress, u32 DwordsCount);
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void WriteBufAmbMainReg(struct pex_device *brd, u32 RelativePort, u32* VirtualAddress, u32 DwordsCount);
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void TimeoutTimerCallback(unsigned long arg );
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void SetRelativeTimer ( struct timer_list *timer, int timeout, void *data );
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void CancelTimer ( struct timer_list *timer );
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int WaitCmdReady(struct pex_device *brd, u32 AdmNumber, u32 StatusAddress);
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int WriteRegData(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber, u32 RegNumber, u32 Value);
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void ToPause(int time_out);
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void ToTimeOut(int mctime_out);
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int ReadRegData(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber, u32 RegNumber, u32 *Value);
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int SetDmaMode(struct pex_device *brd, u32 NumberOfChannel, u32 AdmNumber, u32 TetrNumber);
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int SetDrqFlag(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber, u32 DrqFlag);
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int DmaEnable(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber);
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int DmaDisable(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber);
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int ResetFifo(struct pex_device *brd, u32 NumberOfChannel);
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int Done(struct pex_device *brd, u32 NumberOfChannel);
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int HwStartDmaTransfer(struct pex_device *brd, u32 NumberOfChannel);
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int HwCompleteDmaTransfer(struct pex_device *brd, u32 NumberOfChannel);
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//-----------------------------------------------------------------------------
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int lock_pages( void *va, u32 size );
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int unlock_pages( void *va, u32 size );
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//-----------------------------------------------------------------------------
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#endif //_HARDWARE_H_
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