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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [driver/] [pexdrv/] [pexproc.c] - Blame information for rev 34

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Line No. Rev Author Line
1 2 dsmv
 
2
#include <linux/kernel.h>
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#define __NO_VERSION__
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/pagemap.h>
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#include <linux/interrupt.h>
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#include <linux/proc_fs.h>
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#include <asm/io.h>
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#include "pexmodule.h"
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#include "pexproc.h"
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#include "ambpexregs.h"
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#include "hardware.h"
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//--------------------------------------------------------------------
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void pex_register_proc( char *name, void *fptr, void *data )
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{
22 6 v.karak
    create_proc_read_entry( name, 0, NULL, fptr, data );
23 2 dsmv
}
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//--------------------------------------------------------------------
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void pex_remove_proc( char *name )
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{
29 6 v.karak
    remove_proc_entry( name, NULL );
30 2 dsmv
}
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32
//--------------------------------------------------------------------
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34 6 v.karak
int pex_show_capabilities( char *buf, struct pex_device *brd )
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{
36 33 v.karak
    int i = 0;
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    int res = 0;
38 6 v.karak
    char *p = buf;
39 33 v.karak
    u8 cap = 0;
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    u32 cap_id = 0;
41 6 v.karak
 
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    p += sprintf(p,"\n" );
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    res = pci_read_config_byte(brd->m_pci, 0x34, &cap);
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    if(res < 0) {
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        p += sprintf(p, "  Error read capabilities pointer\n");
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        goto err_exit;
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    }
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50 33 v.karak
    p += sprintf(p, "  Capability pointer: 0x%x\n", cap);
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    while(1) {
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        res = pci_read_config_dword(brd->m_pci, cap, &cap_id);
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        if(res < 0) {
56 6 v.karak
            p += sprintf(p, "  Error read capabilities id\n");
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            goto err_exit;
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        }
59 33 v.karak
 
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        p += sprintf(p, "  Capability ID: 0x%x\n", cap_id);
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        if((cap_id & 0xff) == 0x10) {
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            break;
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        }
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        cap = ((cap_id >> 8) & 0xff);
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        if(!cap)
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            break;
69 6 v.karak
    }
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71 33 v.karak
    if((cap_id & 0xff) != 0x10) {
72 6 v.karak
        p += sprintf(p, "  Can't find PCI Express capabilities\n");
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        goto err_exit;
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    }
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76 33 v.karak
    p += sprintf(p,"\n" );
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    p += sprintf(p, "  PCI Express Capability Register Set\n");
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    p += sprintf(p,"\n" );
79
 
80 6 v.karak
    for(i=0; i<9; i++) {
81 33 v.karak
        u32 reg = 0;
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        int j = cap + 4*i;
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        res = pci_read_config_dword(brd->m_pci, j, &reg);
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        if(res < 0) {
85 6 v.karak
            p += sprintf(p, "  Error read capabilities sructure: offset %x\n", j);
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            goto err_exit;
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        }
88 33 v.karak
        p += sprintf(p, "  0x%x:  0x%X\n", j, reg);
89 6 v.karak
    }
90
 
91 33 v.karak
err_exit:
92 6 v.karak
 
93
    return (p-buf);
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}
95
 
96
//--------------------------------------------------------------------
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98 2 dsmv
int pex_proc_info(  char *buf,
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                    char **start,
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                    off_t off,
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                    int count,
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                    int *eof,
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                    void *data )
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{
105 6 v.karak
    int iBlock = 0;
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    char *p = buf;
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    struct pex_device *brd = (struct pex_device*)data;
108 2 dsmv
 
109 6 v.karak
    if(!brd) {
110
        p += sprintf(p,"  Invalid device pointer\n" );
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        *eof = 1;
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        return p - buf;
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    }
114 2 dsmv
 
115 6 v.karak
    p += pex_show_capabilities(p, brd);
116 2 dsmv
 
117 6 v.karak
    p += sprintf(p,"\n" );
118
    p += sprintf(p,"  Device information\n" );
119 2 dsmv
 
120 6 v.karak
    p += sprintf(p, "  m_TotalIRQ = %d\n", atomic_read(&brd->m_TotalIRQ));
121 2 dsmv
 
122
 
123
 
124 6 v.karak
    for(iBlock = 0; iBlock < brd->m_BlockCnt; iBlock++)
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    {
126
        u32 FifoAddr = 0;
127
        u16 val = 0;
128 2 dsmv
 
129 6 v.karak
        FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;
130
        val = ReadOperationWordReg(brd, PEFIFOadr_BLOCK_ID + FifoAddr);
131 2 dsmv
 
132 6 v.karak
        if((val & 0x0FFF) != PE_EXT_FIFO_ID)
133
            continue;
134 2 dsmv
 
135 6 v.karak
        p += sprintf(p,"\n" );
136
        p += sprintf(p,"  PE_EXT_FIFO %d\n", iBlock+1 );
137
        p += sprintf(p,"\n" );
138
 
139
        p += sprintf(p,"  BLOCK_ID = %x\n", (val & 0x0FFF) );
140
        val = ReadOperationWordReg(brd, PEFIFOadr_BLOCK_VER + FifoAddr);
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        p += sprintf(p,"  BLOCK_VER = %x\n", (val & 0xFFFF) );
142
        val = ReadOperationWordReg(brd, PEFIFOadr_FIFO_ID + FifoAddr);
143
        p += sprintf(p,"  FIFO_ID = %x\n", (val & 0xFFFF) );
144
        val = ReadOperationWordReg(brd, PEFIFOadr_FIFO_NUM + FifoAddr);
145
        p += sprintf(p,"  FIFO_NUMBER = %x\n", (val & 0xFFFF) );
146
        val = ReadOperationWordReg(brd, PEFIFOadr_DMA_SIZE + FifoAddr);
147
        p += sprintf(p,"  RESOURCE = %x\n", (val & 0xFFFF) );
148
        val = ReadOperationWordReg(brd, PEFIFOadr_FIFO_CTRL + FifoAddr);
149
        p += sprintf(p,"  DMA_MODE = %x\n", (val & 0xFFFF) );
150
        val = ReadOperationWordReg(brd, PEFIFOadr_DMA_CTRL + FifoAddr);
151
        p += sprintf(p,"  DMA_CTRL = %x\n", (val & 0xFFFF) );
152
        val = ReadOperationWordReg(brd, PEFIFOadr_FIFO_STATUS + FifoAddr);
153
        p += sprintf(p,"  FIFO_STATUS = %x\n", (val & 0xFFFF) );
154
        val = ReadOperationWordReg(brd, PEFIFOadr_FLAG_CLR + FifoAddr);
155
        p += sprintf(p,"  FLAG_CLR = %x\n", (val & 0xFFFF) );
156
        val = ReadOperationWordReg(brd, PEFIFOadr_PCI_ADDRL + FifoAddr);
157
        p += sprintf(p,"  PCI_ADRL = %x\n", (val & 0xFFFF) );
158
        val = ReadOperationWordReg(brd, PEFIFOadr_PCI_ADDRH + FifoAddr);
159
        p += sprintf(p,"  PCI_ADRH = %x\n", (val & 0xFFFF) );
160
        val = ReadOperationWordReg(brd, PEFIFOadr_LOCAL_ADR + FifoAddr);
161
        p += sprintf(p,"  LOCAL_ADR = %x\n", (val & 0xFFFF) );
162
    }
163
 
164
    *eof = 1;
165
 
166
    return p - buf;
167 2 dsmv
}
168
 
169
//--------------------------------------------------------------------

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