1 |
2 |
dsmv |
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#include <stdio.h>
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3 |
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#include <unistd.h>
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4 |
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#include <stdlib.h>
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5 |
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#include <string.h>
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6 |
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#include <ctype.h>
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7 |
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#include <time.h>
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8 |
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#include <errno.h>
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9 |
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#include <limits.h>
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10 |
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#include <stdarg.h>
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11 |
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#include <stdint.h>
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12 |
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#include <sys/types.h>
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13 |
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#include <sys/stat.h>
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14 |
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#include <sys/ioctl.h>
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15 |
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#include <sys/mman.h>
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16 |
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#include <fcntl.h>
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17 |
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18 |
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#include "pexioctl.h"
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19 |
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#include "ambpexregs.h"
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20 |
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21 |
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#define INSYS_VENDOR_ID 0x4953
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22 |
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#define AMBPEX8_DEVID 0x5503
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23 |
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#define ADP201X1AMB_DEVID 0x5504
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24 |
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#define ADP201X1DSP_DEVID 0x5505
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25 |
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#define AMBPEX5_DEVID 0x5507
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26 |
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27 |
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//-----------------------------------------------------------------------------
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28 |
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29 |
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void board_info(const struct board_info *bi);
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30 |
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void pld_info( uint32_t *base );
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31 |
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int board_init(uint32_t *base);
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32 |
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void ToPause(int ms);
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33 |
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34 |
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//-----------------------------------------------------------------------------
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35 |
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uint32_t *bar0 = NULL;
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36 |
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uint32_t *bar1 = NULL;
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37 |
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//-----------------------------------------------------------------------------
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38 |
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39 |
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int main(int argc, char *argv[])
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40 |
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{
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41 |
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int error = 0;
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42 |
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struct board_info bi;
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43 |
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int fd = -1;
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44 |
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45 |
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if(argc == 1) {
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46 |
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fprintf(stderr, "usage: %s <device name>\n", argv[0]);
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47 |
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goto do_out;
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48 |
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}
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49 |
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50 |
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fprintf(stderr, "Start testing device %s\n", argv[1]);
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51 |
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52 |
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fd = open(argv[1], S_IROTH | S_IWOTH );
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53 |
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if(fd < 0) {
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54 |
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fprintf(stderr, "%s\n", strerror(errno));
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55 |
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goto do_out;
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56 |
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}
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57 |
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58 |
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error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);
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59 |
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if(error < 0) {
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60 |
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fprintf(stderr, "%s\n", strerror(errno));
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61 |
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goto do_close;
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62 |
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}
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63 |
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64 |
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board_info(&bi);
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65 |
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66 |
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bar0 = (uint32_t*)mmap(NULL, bi.Size[0], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);
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67 |
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if( bar0 == MAP_FAILED ) {
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68 |
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fprintf(stderr, "%s\n", strerror(errno));
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69 |
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error = -EINVAL;
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70 |
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goto do_close;
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71 |
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}
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72 |
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73 |
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bar1 = (uint32_t*)mmap(NULL, bi.Size[1], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);
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74 |
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if( bar1== MAP_FAILED ) {
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75 |
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fprintf(stderr, "%s\n", strerror(errno));
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76 |
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error = -EINVAL;
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77 |
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goto do_unmap_bar0;
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78 |
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}
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79 |
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80 |
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fprintf(stderr, "Map BAR0 0x%zx -> %p\n", bi.PhysAddress[0], bar0);
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81 |
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fprintf(stderr, "Map BAR1 0x%zx -> %p\n", bi.PhysAddress[1], bar1);
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82 |
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83 |
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for(int i=0; i<16; i++) {
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84 |
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fprintf(stderr, "%d: 0x%x\n", i, bar0[i]);
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85 |
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}
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86 |
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87 |
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board_init(bar0);
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88 |
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89 |
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pld_info(bar1);
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90 |
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91 |
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error = 0;
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92 |
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93 |
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//do_unmap_bar1:
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94 |
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munmap(bar1, bi.Size[1]);
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95 |
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96 |
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do_unmap_bar0:
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97 |
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munmap(bar0, bi.Size[0]);
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98 |
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99 |
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do_close:
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100 |
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close(fd);
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101 |
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102 |
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do_out:
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103 |
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return error;
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104 |
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}
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105 |
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106 |
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//-----------------------------------------------------------------------------
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107 |
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108 |
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void board_info(const struct board_info *bi)
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109 |
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{
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110 |
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if(!bi) return;
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111 |
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112 |
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fprintf(stderr, "VENDOR ID: 0x%X\n", bi->vendor_id);
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113 |
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fprintf(stderr, "DEVICE ID: 0x%X\n", bi->device_id);
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114 |
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fprintf(stderr, "BAR0: 0x%zX\n", bi->PhysAddress[0]);
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115 |
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fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[0]);
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116 |
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fprintf(stderr, "BAR1 0x%zX\n", bi->PhysAddress[1]);
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117 |
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fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[1]);
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118 |
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fprintf(stderr, "IRQ: 0x%zX\n", bi->InterruptVector);
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119 |
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}
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120 |
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121 |
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//-----------------------------------------------------------------------------
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122 |
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123 |
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uint16_t ReadOperationWordReg(uint32_t *base, uint32_t port)
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124 |
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{
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125 |
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return *((uint16_t*)((uint8_t*)base + port));
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126 |
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}
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127 |
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128 |
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//-----------------------------------------------------------------------------
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129 |
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130 |
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void WriteOperationWordReg(uint32_t *base, uint32_t port, uint16_t value)
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131 |
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{
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132 |
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*((uint16_t*)((uint8_t*)base + port)) = value;
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133 |
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}
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134 |
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135 |
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//-----------------------------------------------------------------------------
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136 |
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137 |
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uint32_t ReadAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort)
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138 |
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{
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139 |
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uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
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140 |
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return *((uint32_t*)(pBaseAddress + RelativePort));
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141 |
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}
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142 |
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143 |
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//-----------------------------------------------------------------------------
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144 |
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145 |
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uint32_t ReadAmbMainReg(uint32_t *base, uint32_t RelativePort)
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146 |
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{
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147 |
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return *((uint32_t*)((uint8_t*)base + RelativePort));
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148 |
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}
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149 |
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150 |
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//-----------------------------------------------------------------------------
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151 |
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152 |
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void WriteAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort, uint32_t value)
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153 |
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{
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154 |
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uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
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155 |
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*((uint32_t*)(pBaseAddress + RelativePort)) = value;
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156 |
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}
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157 |
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158 |
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//-----------------------------------------------------------------------------
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159 |
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160 |
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void WriteAmbMainReg(uint32_t *base, uint32_t RelativePort, uint32_t value)
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161 |
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{
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162 |
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*((uint32_t*)((uint8_t*)base + RelativePort)) = value;
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163 |
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}
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164 |
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165 |
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//-----------------------------------------------------------------------------
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166 |
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167 |
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int WaitCmdReady(uint32_t *base, uint32_t AdmNumber, uint32_t StatusAddress)
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168 |
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{
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169 |
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int pass_count = 0;
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170 |
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uint32_t cmd_rdy;
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171 |
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172 |
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//fprintf(stderr,"%s()\n", __FUNCTION__);
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173 |
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174 |
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do {
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175 |
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176 |
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cmd_rdy = ReadAmbReg(base, AdmNumber, StatusAddress);
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177 |
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cmd_rdy &= AMB_statCMDRDY; //HOST_statCMDRDY;
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178 |
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179 |
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if(pass_count < 10) {
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180 |
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181 |
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pass_count++;
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182 |
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ToPause(1);
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183 |
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184 |
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} else {
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185 |
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return -1;
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186 |
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}
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187 |
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188 |
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} while(!cmd_rdy);
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189 |
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190 |
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return 0;
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191 |
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}
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192 |
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193 |
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//-----------------------------------------------------------------------------
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194 |
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195 |
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int WriteRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t value)
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196 |
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{
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197 |
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int Status = 0;
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198 |
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uint32_t Address = TetrNumber * TETRAD_SIZE;
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199 |
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uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
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200 |
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uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
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201 |
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uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
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202 |
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203 |
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WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
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204 |
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205 |
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Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
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206 |
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if(Status != 0) {
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207 |
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fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
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208 |
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return Status;
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209 |
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}
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210 |
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211 |
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WriteAmbReg(base, AdmNumber, DataAddress, value);
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212 |
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213 |
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//fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d\n", __FUNCTION__,
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214 |
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// AdmNumber, TetrNumber, RegNumber);
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215 |
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216 |
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return Status;
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217 |
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}
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218 |
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219 |
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//-----------------------------------------------------------------------------
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220 |
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221 |
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int ReadRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t *Value)
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222 |
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{
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223 |
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int Status = 0;
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224 |
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uint32_t Address = TetrNumber * TETRAD_SIZE;
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225 |
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uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
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226 |
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uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
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227 |
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uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
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228 |
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229 |
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WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
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230 |
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231 |
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Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
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232 |
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if(Status != 0) {
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233 |
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fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
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234 |
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return Status;
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235 |
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}
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236 |
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237 |
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*Value = ReadAmbReg(base, AdmNumber, DataAddress);
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238 |
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239 |
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//fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d, Val = %x\n", __FUNCTION__,
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240 |
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// AdmNumber, TetrNumber, RegNumber, (int)*Value);
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241 |
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242 |
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return Status;
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243 |
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}
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244 |
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245 |
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//-----------------------------------------------------------------------------
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246 |
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247 |
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uint32_t RegPeekInd(uint32_t *base, uint32_t trdNo, uint32_t rgnum)
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248 |
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{
|
249 |
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uint32_t Value = 0;
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250 |
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251 |
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ReadRegData(base, 0, trdNo, rgnum, &Value);
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252 |
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253 |
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return Value;
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254 |
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}
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255 |
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256 |
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//-----------------------------------------------------------------------------
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257 |
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258 |
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int RegPokeDir( uint32_t *base, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value )
|
259 |
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{
|
260 |
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uint32_t Address;
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261 |
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262 |
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Address = TetrNumber * TETRAD_SIZE;
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263 |
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RegNumber = RegNumber & 0x3;
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264 |
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265 |
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Address += RegNumber * REG_SIZE;
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266 |
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267 |
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WriteAmbReg(base, 0, Address, Value);
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268 |
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269 |
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return 0;
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270 |
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}
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271 |
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272 |
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//-----------------------------------------------------------------------------
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273 |
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274 |
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void ToPause(int ms)
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275 |
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{
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276 |
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struct timeval tv = {0, 0};
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277 |
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tv.tv_usec = 1000*ms;
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278 |
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279 |
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select(0,NULL,NULL,NULL,&tv);
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280 |
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}
|
281 |
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282 |
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//-----------------------------------------------------------------------------
|
283 |
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|
284 |
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int board_init(uint32_t *base)
|
285 |
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{
|
286 |
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u16 temp = 0;
|
287 |
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u16 blockId = 0;
|
288 |
|
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u16 blockVer = 0;
|
289 |
|
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u16 deviceID = 0;
|
290 |
|
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u16 deviceRev = 0;
|
291 |
|
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int i = 0;
|
292 |
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|
293 |
|
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blockId = ReadOperationWordReg(base, PEMAINadr_BLOCK_ID);
|
294 |
|
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blockVer = ReadOperationWordReg(base, PEMAINadr_BLOCK_VER);
|
295 |
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296 |
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fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);
|
297 |
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298 |
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deviceID = ReadOperationWordReg(base, PEMAINadr_DEVICE_ID);
|
299 |
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deviceRev = ReadOperationWordReg(base, PEMAINadr_DEVICE_REV);
|
300 |
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|
301 |
|
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fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
|
302 |
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|
303 |
|
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if((AMBPEX8_DEVID != deviceID) &&
|
304 |
|
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(ADP201X1AMB_DEVID != deviceID) &&
|
305 |
|
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(AMBPEX5_DEVID != deviceID))
|
306 |
|
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return -ENODEV;
|
307 |
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|
308 |
|
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temp = ReadOperationWordReg(base, PEMAINadr_PLD_VER);
|
309 |
|
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int m_BlockCnt = ReadOperationWordReg(base, PEMAINadr_BLOCK_CNT);
|
310 |
|
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|
311 |
|
|
fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);
|
312 |
|
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fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);
|
313 |
|
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|
314 |
|
|
// определим какие каналы ПДП присутствуют и их характеристики:
|
315 |
|
|
// направление передачи данных, размер FIFO, максимальный размер блока ПДП
|
316 |
|
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|
317 |
|
|
FIFO_ID FifoId;
|
318 |
|
|
int m_DmaFifoSize[4] = {0};
|
319 |
|
|
int m_MaxDmaSize[4] = {0};
|
320 |
|
|
//int m_FifoAddr[4] = {0};
|
321 |
|
|
//int m_BlockFifoId[4] = {0};
|
322 |
|
|
int m_DmaDir[4] = {0};
|
323 |
|
|
int m_DmaChanMask = 0;
|
324 |
|
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|
325 |
|
|
for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)
|
326 |
|
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{
|
327 |
|
|
uint32_t FifoAddr = 0;
|
328 |
|
|
u16 block_id = 0;
|
329 |
|
|
FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;
|
330 |
|
|
temp = ReadOperationWordReg(base, PEFIFOadr_BLOCK_ID + FifoAddr);
|
331 |
|
|
block_id = (temp & 0x0FFF);
|
332 |
|
|
if(block_id == PE_FIFO_ID)
|
333 |
|
|
{
|
334 |
|
|
u64 one = 0;
|
335 |
|
|
u64 maxdmasize = 0;
|
336 |
|
|
u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
|
337 |
|
|
//m_FifoAddr[iChan] = FifoAddr;
|
338 |
|
|
//m_BlockFifoId[iChan] = block_id;
|
339 |
|
|
m_DmaChanMask |= (1 << iChan);
|
340 |
|
|
FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
|
341 |
|
|
m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
|
342 |
|
|
m_DmaDir[iChan] = FifoId.ByBits.Dir;
|
343 |
|
|
temp = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr);
|
344 |
|
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|
345 |
|
|
one = 1;
|
346 |
|
|
maxdmasize = one << temp;
|
347 |
|
|
// если макс. размер ПДП может быть больше или равен 4 Гбайт, то снижаем его до 1 Гбайта
|
348 |
|
|
if(temp >= 32)
|
349 |
|
|
m_MaxDmaSize[iChan] = 0x40000000;
|
350 |
|
|
else
|
351 |
|
|
m_MaxDmaSize[iChan] = (uint32_t)maxdmasize;
|
352 |
|
|
|
353 |
|
|
fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d,\n", __FUNCTION__,
|
354 |
|
|
iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan]);
|
355 |
|
|
fprintf(stderr,"%s(): Max DMA size (hard) = %d MBytes, Max DMA size (soft) = %d MBytes.\n", __FUNCTION__,
|
356 |
|
|
(uint32_t)(maxdmasize / 1024 / 1024), m_MaxDmaSize[iChan] / 1024 / 1024);
|
357 |
|
|
}
|
358 |
|
|
if(block_id == PE_EXT_FIFO_ID)
|
359 |
|
|
{
|
360 |
|
|
uint32_t resource_id = 0;
|
361 |
|
|
u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
|
362 |
|
|
//m_FifoAddr[iChan] = FifoAddr;
|
363 |
|
|
//m_BlockFifoId[iChan] = block_id;
|
364 |
|
|
m_DmaChanMask |= (1 << iChan);
|
365 |
|
|
FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
|
366 |
|
|
m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
|
367 |
|
|
m_DmaDir[iChan] = FifoId.ByBits.Dir;
|
368 |
|
|
m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт
|
369 |
|
|
resource_id = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr); // RESOURCE
|
370 |
|
|
fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,
|
371 |
|
|
iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);
|
372 |
|
|
}
|
373 |
|
|
}
|
374 |
|
|
|
375 |
|
|
// подготовим к работе ПЛИС ADM
|
376 |
|
|
fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);
|
377 |
|
|
WriteOperationWordReg(base,PEMAINadr_BRD_MODE, 0);
|
378 |
|
|
ToPause(100); // pause ~ 100 msec
|
379 |
|
|
for(i = 0; i < 10; i++)
|
380 |
|
|
{
|
381 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 1);
|
382 |
|
|
ToPause(100); // pause ~ 100 msec
|
383 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 3);
|
384 |
|
|
ToPause(100); // pause ~ 100 msec
|
385 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 7);
|
386 |
|
|
ToPause(100); // pause ~ 100 msec
|
387 |
|
|
temp = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS) & 0x01;
|
388 |
|
|
if(temp)
|
389 |
|
|
break;
|
390 |
|
|
}
|
391 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0x0F);
|
392 |
|
|
ToPause(100); // pause ~ 100 msec
|
393 |
|
|
|
394 |
|
|
if(temp)
|
395 |
|
|
{
|
396 |
|
|
uint32_t idx = 0;
|
397 |
|
|
BRD_STATUS brd_status;
|
398 |
|
|
fprintf(stderr,"%s(): ADM PLD is captured.\n", __FUNCTION__);
|
399 |
|
|
brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
|
400 |
|
|
brd_status.ByBits.InFlags &= 0x80; // 1 - ADM PLD in test mode
|
401 |
|
|
if(brd_status.ByBits.InFlags)
|
402 |
|
|
{
|
403 |
|
|
BRD_MODE brd_mode;
|
404 |
|
|
fprintf(stderr,"%s(): ADM PLD in test mode.\n", __FUNCTION__);
|
405 |
|
|
|
406 |
|
|
// проверка линий передачи флагов
|
407 |
|
|
brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
|
408 |
|
|
for(idx = 0; idx < 4; idx++)
|
409 |
|
|
{
|
410 |
|
|
brd_mode.ByBits.OutFlags = idx;
|
411 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
|
412 |
|
|
ToPause(10);
|
413 |
|
|
brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
|
414 |
|
|
brd_status.ByBits.InFlags &= 0x03;
|
415 |
|
|
if(brd_mode.ByBits.OutFlags != brd_status.ByBits.InFlags)
|
416 |
|
|
{
|
417 |
|
|
temp = 0;
|
418 |
|
|
fprintf(stderr,"%s(): FLG_IN (%d) NOT equ FLG_OUT (%d).\n", __FUNCTION__,
|
419 |
|
|
brd_status.ByBits.InFlags, brd_mode.ByBits.OutFlags);
|
420 |
|
|
break;
|
421 |
|
|
}
|
422 |
|
|
}
|
423 |
|
|
if(temp)
|
424 |
|
|
fprintf(stderr,"%s(): FLG_IN equ FLG_OUT.\n", __FUNCTION__);
|
425 |
|
|
}
|
426 |
|
|
else
|
427 |
|
|
temp = 0;
|
428 |
|
|
}
|
429 |
|
|
|
430 |
|
|
if(!temp)
|
431 |
|
|
{
|
432 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0);
|
433 |
|
|
ToPause(100); // pause ~ 100 msec
|
434 |
|
|
}
|
435 |
|
|
|
436 |
|
|
|
437 |
|
|
// состояние ПЛИС ADM: 0 - не готова
|
438 |
|
|
fprintf(stderr,"%s(): ADM PLD[%d] status = 0x%X.\n", __FUNCTION__, i, temp);
|
439 |
|
|
|
440 |
|
|
{
|
441 |
|
|
BRD_MODE brd_mode;
|
442 |
|
|
brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
|
443 |
|
|
brd_mode.ByBits.OutFlags = 0;
|
444 |
|
|
WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
|
445 |
|
|
fprintf(stderr,"%s(): BRD_MODE = 0x%X.\n", __FUNCTION__, brd_mode.AsWhole);
|
446 |
|
|
}
|
447 |
|
|
|
448 |
|
|
WriteOperationWordReg(base, PEMAINadr_IRQ_MASK, 0x4000);
|
449 |
|
|
|
450 |
|
|
//WriteAmbMainReg(base, 0x0, 0x1);
|
451 |
|
|
//WriteAmbMainReg(base, 0x0, 0x1);
|
452 |
|
|
|
453 |
|
|
return 0;
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
//-----------------------------------------------------------------------------
|
457 |
|
|
|
458 |
|
|
void pld_info( uint32_t *base )
|
459 |
|
|
{
|
460 |
|
|
uint32_t d = 0;
|
461 |
|
|
uint32_t d1 = 0;
|
462 |
|
|
uint32_t d2 = 0;
|
463 |
|
|
uint32_t d3 = 0;
|
464 |
|
|
uint32_t d4 = 0;
|
465 |
|
|
uint32_t d5 = 0;
|
466 |
|
|
int ii = 0;
|
467 |
|
|
|
468 |
|
|
if(!base) return;
|
469 |
|
|
|
470 |
|
|
fprintf(stderr,"Прошивка ПЛИС ADM\n" );
|
471 |
|
|
|
472 |
|
|
RegPokeDir( base, 0, 1, 1 );
|
473 |
|
|
|
474 |
|
|
d=RegPeekInd( base, 0, 0x108 );
|
475 |
|
|
if( d==0x4953 ) {
|
476 |
|
|
fprintf(stderr, " SIG= 0x%.4X - Ok \n", d );
|
477 |
|
|
} else {
|
478 |
|
|
fprintf(stderr, " SIG= 0x%.4X - Ошибка, ожидается 0x4953 \n", d );
|
479 |
|
|
return;
|
480 |
|
|
}
|
481 |
|
|
|
482 |
|
|
d=RegPeekInd( base, 0, 0x109 ); fprintf(stderr, " Версия интерфейса ADM: %d.%d\n", d>>8, d&0xFF );
|
483 |
|
|
d=RegPeekInd( base, 0, 0x110 ); d1=RegPeekInd( base, 0, 0x111 );
|
484 |
|
|
fprintf(stderr, " Базовый модуль: 0x%.4X v%d.%d\n", d, d1>>8, d1&0xFF );
|
485 |
|
|
|
486 |
|
|
d=RegPeekInd( base, 0, 0x112 ); d1=RegPeekInd( base, 0, 0x113 );
|
487 |
|
|
fprintf(stderr, " Субмодуль: 0x%.4X v%d.%d\n", d, d1>>8, d1&0xFF );
|
488 |
|
|
|
489 |
|
|
d=RegPeekInd( base, 0, 0x10B ); fprintf(stderr, " Модификация прошивки ПЛИС: %d \n", d );
|
490 |
|
|
d=RegPeekInd( base, 0, 0x10A ); fprintf(stderr, " Версия прошивки ПЛИС: %d.%d\n", d>>8, d&0xFF );
|
491 |
|
|
d=RegPeekInd( base, 0, 0x114 ); fprintf(stderr, " Номер сборки прошивки ПЛИС: 0x%.4X\n", d );
|
492 |
|
|
|
493 |
|
|
fprintf(stderr, "\nИнформация о тетрадах:\n\n" );
|
494 |
|
|
for( ii=0; ii<8; ii++ ) {
|
495 |
|
|
|
496 |
|
|
const char *str;
|
497 |
|
|
|
498 |
|
|
d=RegPeekInd( base, ii, 0x100 );
|
499 |
|
|
d1=RegPeekInd( base, ii, 0x101 );
|
500 |
|
|
d2=RegPeekInd( base, ii, 0x102 );
|
501 |
|
|
d3=RegPeekInd( base, ii, 0x103 );
|
502 |
|
|
d4=RegPeekInd( base, ii, 0x104 );
|
503 |
|
|
d5=RegPeekInd( base, ii, 0x105 );
|
504 |
|
|
|
505 |
|
|
switch( d ) {
|
506 |
|
|
case 1: str="TRD_MAIN "; break;
|
507 |
|
|
case 2: str="TRD_BASE_DAC "; break;
|
508 |
|
|
case 3: str="TRD_PIO_STD "; break;
|
509 |
|
|
case 0: str=" - "; break;
|
510 |
|
|
case 0x47: str="SBSRAM_IN "; break;
|
511 |
|
|
case 0x48: str="SBSRAM_OUT "; break;
|
512 |
|
|
case 0x12: str="DIO64_OUT "; break;
|
513 |
|
|
case 0x13: str="DIO64_IN "; break;
|
514 |
|
|
case 0x14: str="ADM212x200M "; break;
|
515 |
|
|
case 0x5D: str="ADM212x500M "; break;
|
516 |
|
|
case 0x41: str="DDS9956 "; break;
|
517 |
|
|
case 0x4F: str="TEST_CTRL "; break;
|
518 |
|
|
case 0x3F: str="ADM214x200M "; break;
|
519 |
|
|
case 0x40: str="ADM216x100 "; break;
|
520 |
|
|
case 0x2F: str="ADM28x1G "; break;
|
521 |
|
|
case 0x2D: str="TRD128_OUT "; break;
|
522 |
|
|
case 0x4C: str="TRD128_IN "; break;
|
523 |
|
|
case 0x30: str="ADMDDC5016 "; break;
|
524 |
|
|
case 0x2E: str="ADMFOTR2G "; break;
|
525 |
|
|
case 0x49: str="ADMFOTR3G "; break;
|
526 |
|
|
case 0x67: str="DDS9912 "; break;
|
527 |
|
|
case 0x70: str="AMBPEX5_SDRAM "; break;
|
528 |
|
|
case 0x71: str="TRD_MSG "; break;
|
529 |
|
|
case 0x72: str="TRD_TS201 "; break;
|
530 |
|
|
case 0x73: str="TRD_STREAM_IN "; break;
|
531 |
|
|
case 0x74: str="TRD_STREAM_OUT"; break;
|
532 |
|
|
|
533 |
|
|
|
534 |
|
|
default: str="UNKNOW "; break;
|
535 |
|
|
}
|
536 |
|
|
fprintf(stderr, " %d 0x%.4X %s ", ii, d, str );
|
537 |
|
|
if( d>0 ) {
|
538 |
|
|
fprintf(stderr, " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );
|
539 |
|
|
if( d3 & 0x10 ) {
|
540 |
|
|
fprintf(stderr, "FIFO IN %dx%d\n", d4, d5 );
|
541 |
|
|
} else if( d3 & 0x20 ) {
|
542 |
|
|
fprintf(stderr, "FIFO OUT %dx%d\n", d4, d5 );
|
543 |
|
|
} else {
|
544 |
|
|
fprintf(stderr, "\n" );
|
545 |
|
|
}
|
546 |
|
|
} else {
|
547 |
|
|
fprintf(stderr, "\n" );
|
548 |
|
|
}
|
549 |
|
|
|
550 |
|
|
}
|
551 |
|
|
}
|
552 |
|
|
|
553 |
|
|
//-----------------------------------------------------------------------------
|