OpenCores
URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [exam/] [pex_test.cpp] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dsmv
 
2
#include <stdio.h>
3
#include <unistd.h>
4
#include <stdlib.h>
5
#include <string.h>
6
#include <ctype.h>
7
#include <time.h>
8
#include <errno.h>
9
#include <limits.h>
10
#include <stdarg.h>
11
#include <stdint.h>
12
#include <sys/types.h>
13
#include <sys/stat.h>
14
#include <sys/ioctl.h>
15
#include <sys/mman.h>
16
#include <fcntl.h>
17
 
18
#include "pexioctl.h"
19
#include "ambpexregs.h"
20
 
21
#define INSYS_VENDOR_ID         0x4953
22
#define AMBPEX8_DEVID           0x5503
23
#define ADP201X1AMB_DEVID       0x5504
24
#define ADP201X1DSP_DEVID       0x5505
25
#define AMBPEX5_DEVID           0x5507
26
 
27
//-----------------------------------------------------------------------------
28
 
29
void board_info(const struct board_info *bi);
30
void pld_info( uint32_t *base );
31
int board_init(uint32_t *base);
32
void ToPause(int ms);
33
 
34
//-----------------------------------------------------------------------------
35
uint32_t *bar0 = NULL;
36
uint32_t *bar1 = NULL;
37
//-----------------------------------------------------------------------------
38
 
39
int main(int argc, char *argv[])
40
{
41
    int error = 0;
42
    struct board_info bi;
43
    int fd = -1;
44
 
45
    if(argc == 1) {
46
        fprintf(stderr, "usage: %s <device name>\n", argv[0]);
47
        goto do_out;
48
    }
49
 
50
    fprintf(stderr, "Start testing device %s\n", argv[1]);
51
 
52
    fd = open(argv[1], S_IROTH | S_IWOTH );
53
    if(fd < 0) {
54
        fprintf(stderr, "%s\n", strerror(errno));
55
        goto do_out;
56
    }
57
 
58
    error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);
59
    if(error < 0) {
60
        fprintf(stderr, "%s\n", strerror(errno));
61
        goto do_close;
62
    }
63
 
64
    board_info(&bi);
65
 
66
    bar0 = (uint32_t*)mmap(NULL, bi.Size[0], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);
67
    if( bar0 == MAP_FAILED ) {
68
        fprintf(stderr, "%s\n", strerror(errno));
69
        error = -EINVAL;
70
        goto do_close;
71
    }
72
 
73
    bar1 = (uint32_t*)mmap(NULL, bi.Size[1], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);
74
    if( bar1== MAP_FAILED ) {
75
        fprintf(stderr, "%s\n", strerror(errno));
76
        error = -EINVAL;
77
        goto do_unmap_bar0;
78
    }
79
 
80
    fprintf(stderr, "Map BAR0 0x%zx -> %p\n", bi.PhysAddress[0], bar0);
81
    fprintf(stderr, "Map BAR1 0x%zx -> %p\n", bi.PhysAddress[1], bar1);
82
 
83
    for(int i=0; i<16; i++) {
84
        fprintf(stderr, "%d: 0x%x\n", i,  bar0[i]);
85
    }
86
 
87
    board_init(bar0);
88
 
89
    pld_info(bar1);
90
 
91
    error = 0;
92
 
93
    //do_unmap_bar1:
94
    munmap(bar1, bi.Size[1]);
95
 
96
    do_unmap_bar0:
97
    munmap(bar0, bi.Size[0]);
98
 
99
    do_close:
100
    close(fd);
101
 
102
    do_out:
103
    return error;
104
}
105
 
106
//-----------------------------------------------------------------------------
107
 
108
void board_info(const struct board_info *bi)
109
{
110
    if(!bi) return;
111
 
112
    fprintf(stderr, "VENDOR ID: 0x%X\n", bi->vendor_id);
113
    fprintf(stderr, "DEVICE ID: 0x%X\n", bi->device_id);
114
    fprintf(stderr, "BAR0: 0x%zX\n", bi->PhysAddress[0]);
115
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[0]);
116
    fprintf(stderr, "BAR1 0x%zX\n", bi->PhysAddress[1]);
117
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[1]);
118
    fprintf(stderr, "IRQ: 0x%zX\n", bi->InterruptVector);
119
}
120
 
121
//-----------------------------------------------------------------------------
122
 
123
uint16_t ReadOperationWordReg(uint32_t *base, uint32_t port)
124
{
125
    return *((uint16_t*)((uint8_t*)base + port));
126
}
127
 
128
//-----------------------------------------------------------------------------
129
 
130
void WriteOperationWordReg(uint32_t *base, uint32_t port, uint16_t value)
131
{
132
    *((uint16_t*)((uint8_t*)base + port)) = value;
133
}
134
 
135
//-----------------------------------------------------------------------------
136
 
137
uint32_t ReadAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort)
138
{
139
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
140
    return *((uint32_t*)(pBaseAddress + RelativePort));
141
}
142
 
143
//-----------------------------------------------------------------------------
144
 
145
uint32_t ReadAmbMainReg(uint32_t *base, uint32_t RelativePort)
146
{
147
    return *((uint32_t*)((uint8_t*)base + RelativePort));
148
}
149
 
150
//-----------------------------------------------------------------------------
151
 
152
void WriteAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort, uint32_t value)
153
{
154
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
155
    *((uint32_t*)(pBaseAddress + RelativePort)) = value;
156
}
157
 
158
//-----------------------------------------------------------------------------
159
 
160
void WriteAmbMainReg(uint32_t *base, uint32_t RelativePort, uint32_t value)
161
{
162
    *((uint32_t*)((uint8_t*)base + RelativePort)) = value;
163
}
164
 
165
//-----------------------------------------------------------------------------
166
 
167
int WaitCmdReady(uint32_t *base, uint32_t AdmNumber, uint32_t StatusAddress)
168
{
169
    int pass_count = 0;
170
    uint32_t cmd_rdy;
171
 
172
    //fprintf(stderr,"%s()\n", __FUNCTION__);
173
 
174
    do {
175
 
176
        cmd_rdy = ReadAmbReg(base, AdmNumber, StatusAddress);
177
        cmd_rdy &= AMB_statCMDRDY; //HOST_statCMDRDY;
178
 
179
        if(pass_count < 10) {
180
 
181
            pass_count++;
182
            ToPause(1);
183
 
184
        } else {
185
            return -1;
186
        }
187
 
188
    } while(!cmd_rdy);
189
 
190
    return 0;
191
}
192
 
193
//-----------------------------------------------------------------------------
194
 
195
int WriteRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t value)
196
{
197
    int Status = 0;
198
    uint32_t Address = TetrNumber * TETRAD_SIZE;
199
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
200
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
201
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
202
 
203
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
204
 
205
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
206
    if(Status != 0) {
207
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
208
        return Status;
209
    }
210
 
211
    WriteAmbReg(base, AdmNumber, DataAddress, value);
212
 
213
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d\n", __FUNCTION__,
214
    //          AdmNumber, TetrNumber, RegNumber);
215
 
216
    return Status;
217
}
218
 
219
//-----------------------------------------------------------------------------
220
 
221
int ReadRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t *Value)
222
{
223
    int Status = 0;
224
    uint32_t Address = TetrNumber * TETRAD_SIZE;
225
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
226
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
227
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
228
 
229
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
230
 
231
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
232
    if(Status != 0) {
233
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
234
        return Status;
235
    }
236
 
237
    *Value = ReadAmbReg(base, AdmNumber, DataAddress);
238
 
239
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d, Val = %x\n", __FUNCTION__,
240
    //          AdmNumber, TetrNumber, RegNumber, (int)*Value);
241
 
242
    return Status;
243
}
244
 
245
//-----------------------------------------------------------------------------
246
 
247
uint32_t RegPeekInd(uint32_t *base, uint32_t trdNo, uint32_t rgnum)
248
{
249
    uint32_t Value = 0;
250
 
251
    ReadRegData(base, 0, trdNo, rgnum, &Value);
252
 
253
    return Value;
254
}
255
 
256
//-----------------------------------------------------------------------------
257
 
258
int RegPokeDir( uint32_t *base, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value )
259
{
260
    uint32_t Address;
261
 
262
    Address = TetrNumber * TETRAD_SIZE;
263
    RegNumber = RegNumber & 0x3;
264
 
265
    Address += RegNumber * REG_SIZE;
266
 
267
    WriteAmbReg(base, 0, Address, Value);
268
 
269
    return 0;
270
}
271
 
272
//-----------------------------------------------------------------------------
273
 
274
void ToPause(int ms)
275
{
276
    struct timeval tv = {0, 0};
277
    tv.tv_usec = 1000*ms;
278
 
279
    select(0,NULL,NULL,NULL,&tv);
280
}
281
 
282
//-----------------------------------------------------------------------------
283
 
284
int board_init(uint32_t *base)
285
{
286
    u16 temp = 0;
287
    u16 blockId = 0;
288
    u16 blockVer = 0;
289
    u16 deviceID = 0;
290
    u16 deviceRev = 0;
291
    int i = 0;
292
 
293
    blockId = ReadOperationWordReg(base, PEMAINadr_BLOCK_ID);
294
    blockVer = ReadOperationWordReg(base, PEMAINadr_BLOCK_VER);
295
 
296
    fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);
297
 
298
    deviceID = ReadOperationWordReg(base, PEMAINadr_DEVICE_ID);
299
    deviceRev = ReadOperationWordReg(base, PEMAINadr_DEVICE_REV);
300
 
301
    fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
302
 
303
    if((AMBPEX8_DEVID != deviceID) &&
304
       (ADP201X1AMB_DEVID != deviceID) &&
305
       (AMBPEX5_DEVID != deviceID))
306
        return -ENODEV;
307
 
308
    temp = ReadOperationWordReg(base, PEMAINadr_PLD_VER);
309
    int m_BlockCnt = ReadOperationWordReg(base, PEMAINadr_BLOCK_CNT);
310
 
311
    fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);
312
    fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);
313
 
314
    // определим какие каналы ПДП присутствуют и их характеристики:
315
    // направление передачи данных, размер FIFO, максимальный размер блока ПДП
316
 
317
    FIFO_ID FifoId;
318
    int m_DmaFifoSize[4] = {0};
319
    int m_MaxDmaSize[4] = {0};
320
    //int m_FifoAddr[4] = {0};
321
    //int m_BlockFifoId[4] = {0};
322
    int m_DmaDir[4] = {0};
323
    int m_DmaChanMask = 0;
324
 
325
    for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)
326
    {
327
        uint32_t FifoAddr = 0;
328
        u16 block_id = 0;
329
        FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;
330
        temp = ReadOperationWordReg(base, PEFIFOadr_BLOCK_ID + FifoAddr);
331
        block_id = (temp & 0x0FFF);
332
        if(block_id == PE_FIFO_ID)
333
        {
334
            u64 one = 0;
335
            u64 maxdmasize = 0;
336
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
337
            //m_FifoAddr[iChan] = FifoAddr;
338
            //m_BlockFifoId[iChan] = block_id;
339
            m_DmaChanMask |= (1 << iChan);
340
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
341
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
342
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
343
            temp = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr);
344
 
345
            one = 1;
346
            maxdmasize = one << temp;
347
            // если макс. размер ПДП может быть больше или равен 4 Гбайт, то снижаем его до 1 Гбайта
348
            if(temp >= 32)
349
                m_MaxDmaSize[iChan] = 0x40000000;
350
            else
351
                m_MaxDmaSize[iChan] = (uint32_t)maxdmasize;
352
 
353
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d,\n", __FUNCTION__,
354
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan]);
355
            fprintf(stderr,"%s(): Max DMA size (hard) = %d MBytes,  Max DMA size (soft) = %d MBytes.\n", __FUNCTION__,
356
                    (uint32_t)(maxdmasize / 1024 / 1024), m_MaxDmaSize[iChan] / 1024 / 1024);
357
        }
358
        if(block_id == PE_EXT_FIFO_ID)
359
        {
360
            uint32_t resource_id = 0;
361
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
362
            //m_FifoAddr[iChan] = FifoAddr;
363
            //m_BlockFifoId[iChan] = block_id;
364
            m_DmaChanMask |= (1 << iChan);
365
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
366
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
367
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
368
            m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт
369
            resource_id = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr); // RESOURCE
370
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,
371
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);
372
        }
373
    }
374
 
375
    // подготовим к работе ПЛИС ADM
376
    fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);
377
    WriteOperationWordReg(base,PEMAINadr_BRD_MODE, 0);
378
    ToPause(100);       // pause ~ 100 msec
379
    for(i = 0; i < 10; i++)
380
    {
381
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 1);
382
        ToPause(100);   // pause ~ 100 msec
383
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 3);
384
        ToPause(100);   // pause ~ 100 msec
385
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 7);
386
        ToPause(100);   // pause ~ 100 msec
387
        temp = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS) & 0x01;
388
        if(temp)
389
            break;
390
    }
391
    WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0x0F);
392
    ToPause(100);       // pause ~ 100 msec
393
 
394
    if(temp)
395
    {
396
        uint32_t idx = 0;
397
        BRD_STATUS brd_status;
398
        fprintf(stderr,"%s(): ADM PLD is captured.\n", __FUNCTION__);
399
        brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
400
        brd_status.ByBits.InFlags &= 0x80; // 1 - ADM PLD in test mode
401
        if(brd_status.ByBits.InFlags)
402
        {
403
            BRD_MODE brd_mode;
404
            fprintf(stderr,"%s(): ADM PLD in test mode.\n", __FUNCTION__);
405
 
406
            // проверка линий передачи флагов
407
            brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
408
            for(idx = 0; idx < 4; idx++)
409
            {
410
                brd_mode.ByBits.OutFlags = idx;
411
                WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
412
                ToPause(10);
413
                brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
414
                brd_status.ByBits.InFlags &= 0x03;
415
                if(brd_mode.ByBits.OutFlags != brd_status.ByBits.InFlags)
416
                {
417
                    temp = 0;
418
                    fprintf(stderr,"%s(): FLG_IN (%d) NOT equ FLG_OUT (%d).\n", __FUNCTION__,
419
                            brd_status.ByBits.InFlags, brd_mode.ByBits.OutFlags);
420
                    break;
421
                }
422
            }
423
            if(temp)
424
                fprintf(stderr,"%s(): FLG_IN equ FLG_OUT.\n", __FUNCTION__);
425
        }
426
        else
427
            temp = 0;
428
    }
429
 
430
    if(!temp)
431
    {
432
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0);
433
        ToPause(100);   // pause ~ 100 msec
434
    }
435
 
436
 
437
    // состояние ПЛИС ADM: 0 - не готова
438
    fprintf(stderr,"%s(): ADM PLD[%d] status = 0x%X.\n", __FUNCTION__, i, temp);
439
 
440
    {
441
        BRD_MODE brd_mode;
442
        brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
443
        brd_mode.ByBits.OutFlags = 0;
444
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
445
        fprintf(stderr,"%s(): BRD_MODE = 0x%X.\n", __FUNCTION__, brd_mode.AsWhole);
446
    }
447
 
448
    WriteOperationWordReg(base, PEMAINadr_IRQ_MASK, 0x4000);
449
 
450
    //WriteAmbMainReg(base, 0x0, 0x1);
451
    //WriteAmbMainReg(base, 0x0, 0x1);
452
 
453
    return 0;
454
}
455
 
456
//-----------------------------------------------------------------------------
457
 
458
void pld_info( uint32_t *base )
459
{
460
        uint32_t d = 0;
461
        uint32_t d1 = 0;
462
        uint32_t d2 = 0;
463
        uint32_t d3 = 0;
464
        uint32_t d4 = 0;
465
        uint32_t d5 = 0;
466
        int ii = 0;
467
 
468
        if(!base) return;
469
 
470
        fprintf(stderr,"Прошивка ПЛИС ADM\n" );
471
 
472
        RegPokeDir( base, 0, 1, 1 );
473
 
474
        d=RegPeekInd( base, 0, 0x108 );
475
        if( d==0x4953 ) {
476
            fprintf(stderr, "  SIG= 0x%.4X - Ok \n", d );
477
        } else {
478
            fprintf(stderr, "  SIG= 0x%.4X - Ошибка, ожидается 0x4953    \n", d );
479
            return;
480
        }
481
 
482
        d=RegPeekInd( base,  0, 0x109 );  fprintf(stderr, "   Версия интерфейса ADM:  %d.%d\n", d>>8, d&0xFF );
483
        d=RegPeekInd( base,  0, 0x110 ); d1=RegPeekInd( base,  0, 0x111 );
484
        fprintf(stderr,  "   Базовый модуль: 0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
485
 
486
        d=RegPeekInd( base,  0, 0x112 ); d1=RegPeekInd( base,  0, 0x113 );
487
        fprintf(stderr,  "   Субмодуль:      0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
488
 
489
        d=RegPeekInd( base,  0, 0x10B );  fprintf(stderr,  "   Модификация прошивки ПЛИС:  %d \n", d );
490
        d=RegPeekInd( base,  0, 0x10A );  fprintf(stderr,  "   Версия прошивки ПЛИС:       %d.%d\n", d>>8, d&0xFF );
491
        d=RegPeekInd( base,  0, 0x114 );  fprintf(stderr,  "   Номер сборки прошивки ПЛИС: 0x%.4X\n", d );
492
 
493
        fprintf(stderr,  "\nИнформация о тетрадах:\n\n" );
494
        for( ii=0; ii<8; ii++ ) {
495
 
496
            const char *str;
497
 
498
            d=RegPeekInd( base,  ii, 0x100 );
499
            d1=RegPeekInd( base,  ii, 0x101 );
500
            d2=RegPeekInd( base,  ii, 0x102 );
501
            d3=RegPeekInd( base,  ii, 0x103 );
502
            d4=RegPeekInd( base,  ii, 0x104 );
503
            d5=RegPeekInd( base,  ii, 0x105 );
504
 
505
            switch( d ) {
506
            case 1: str="TRD_MAIN      "; break;
507
            case 2: str="TRD_BASE_DAC  "; break;
508
            case 3: str="TRD_PIO_STD   "; break;
509
            case 0:    str=" -            "; break;
510
            case 0x47: str="SBSRAM_IN     "; break;
511
            case 0x48: str="SBSRAM_OUT    "; break;
512
            case 0x12: str="DIO64_OUT     "; break;
513
            case 0x13: str="DIO64_IN      "; break;
514
            case 0x14: str="ADM212x200M   "; break;
515
            case 0x5D: str="ADM212x500M   "; break;
516
            case 0x41: str="DDS9956       "; break;
517
            case 0x4F: str="TEST_CTRL     "; break;
518
            case 0x3F: str="ADM214x200M   "; break;
519
            case 0x40: str="ADM216x100    "; break;
520
            case 0x2F: str="ADM28x1G      "; break;
521
            case 0x2D: str="TRD128_OUT    "; break;
522
            case 0x4C: str="TRD128_IN     "; break;
523
            case 0x30: str="ADMDDC5016    "; break;
524
            case 0x2E: str="ADMFOTR2G     "; break;
525
            case 0x49: str="ADMFOTR3G     "; break;
526
            case 0x67: str="DDS9912       "; break;
527
            case 0x70: str="AMBPEX5_SDRAM "; break;
528
            case 0x71: str="TRD_MSG       "; break;
529
            case 0x72: str="TRD_TS201     "; break;
530
            case 0x73: str="TRD_STREAM_IN "; break;
531
            case 0x74: str="TRD_STREAM_OUT"; break;
532
 
533
 
534
            default: str="UNKNOW        "; break;
535
            }
536
            fprintf(stderr,  " %d  0x%.4X %s ", ii, d, str );
537
            if( d>0 ) {
538
                fprintf(stderr,  " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );
539
                if( d3 & 0x10 ) {
540
                    fprintf(stderr,  "FIFO IN   %dx%d\n", d4, d5 );
541
                } else if( d3 & 0x20 ) {
542
                    fprintf(stderr,  "FIFO OUT  %dx%d\n", d4, d5 );
543
                } else {
544
                    fprintf(stderr,  "\n" );
545
                }
546
            } else {
547
                fprintf(stderr,  "\n" );
548
            }
549
 
550
        }
551
}
552
 
553
//-----------------------------------------------------------------------------

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