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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [exam/] [pex_test.cpp] - Blame information for rev 56

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Line No. Rev Author Line
1 2 dsmv
 
2
#include <stdio.h>
3
#include <unistd.h>
4
#include <stdlib.h>
5
#include <string.h>
6
#include <ctype.h>
7
#include <time.h>
8
#include <errno.h>
9
#include <limits.h>
10
#include <stdarg.h>
11
#include <stdint.h>
12
#include <sys/types.h>
13
#include <sys/stat.h>
14
#include <sys/ioctl.h>
15
#include <sys/mman.h>
16
#include <fcntl.h>
17
 
18 6 v.karak
#include "utypes_linux.h"
19
#include "brd_info.h"
20 2 dsmv
#include "pexioctl.h"
21
#include "ambpexregs.h"
22
 
23
#define INSYS_VENDOR_ID         0x4953
24
#define AMBPEX8_DEVID           0x5503
25
#define ADP201X1AMB_DEVID       0x5504
26
#define ADP201X1DSP_DEVID       0x5505
27
#define AMBPEX5_DEVID           0x5507
28
 
29
//-----------------------------------------------------------------------------
30
 
31
void board_info(const struct board_info *bi);
32
void pld_info( uint32_t *base );
33
int board_init(uint32_t *base);
34
void ToPause(int ms);
35
 
36
//-----------------------------------------------------------------------------
37
uint32_t *bar0 = NULL;
38
uint32_t *bar1 = NULL;
39
//-----------------------------------------------------------------------------
40
 
41
int main(int argc, char *argv[])
42
{
43
    int error = 0;
44
    struct board_info bi;
45
    int fd = -1;
46
 
47
    if(argc == 1) {
48
        fprintf(stderr, "usage: %s <device name>\n", argv[0]);
49
        goto do_out;
50
    }
51
 
52
    fprintf(stderr, "Start testing device %s\n", argv[1]);
53
 
54
    fd = open(argv[1], S_IROTH | S_IWOTH );
55
    if(fd < 0) {
56
        fprintf(stderr, "%s\n", strerror(errno));
57
        goto do_out;
58
    }
59
 
60
    error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);
61
    if(error < 0) {
62
        fprintf(stderr, "%s\n", strerror(errno));
63
        goto do_close;
64
    }
65
 
66
    board_info(&bi);
67
 
68
    bar0 = (uint32_t*)mmap(NULL, bi.Size[0], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);
69
    if( bar0 == MAP_FAILED ) {
70
        fprintf(stderr, "%s\n", strerror(errno));
71
        error = -EINVAL;
72
        goto do_close;
73
    }
74
 
75
    bar1 = (uint32_t*)mmap(NULL, bi.Size[1], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);
76
    if( bar1== MAP_FAILED ) {
77
        fprintf(stderr, "%s\n", strerror(errno));
78
        error = -EINVAL;
79
        goto do_unmap_bar0;
80
    }
81
 
82
    fprintf(stderr, "Map BAR0 0x%zx -> %p\n", bi.PhysAddress[0], bar0);
83
    fprintf(stderr, "Map BAR1 0x%zx -> %p\n", bi.PhysAddress[1], bar1);
84
 
85
    for(int i=0; i<16; i++) {
86
        fprintf(stderr, "%d: 0x%x\n", i,  bar0[i]);
87
    }
88
 
89
    board_init(bar0);
90
 
91
    pld_info(bar1);
92
 
93
    error = 0;
94
 
95
    //do_unmap_bar1:
96
    munmap(bar1, bi.Size[1]);
97
 
98
    do_unmap_bar0:
99
    munmap(bar0, bi.Size[0]);
100
 
101
    do_close:
102
    close(fd);
103
 
104
    do_out:
105
    return error;
106
}
107
 
108
//-----------------------------------------------------------------------------
109
 
110
void board_info(const struct board_info *bi)
111
{
112
    if(!bi) return;
113
 
114
    fprintf(stderr, "VENDOR ID: 0x%X\n", bi->vendor_id);
115
    fprintf(stderr, "DEVICE ID: 0x%X\n", bi->device_id);
116
    fprintf(stderr, "BAR0: 0x%zX\n", bi->PhysAddress[0]);
117
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[0]);
118
    fprintf(stderr, "BAR1 0x%zX\n", bi->PhysAddress[1]);
119
    fprintf(stderr, "SIZE: 0x%zX\n", bi->Size[1]);
120
    fprintf(stderr, "IRQ: 0x%zX\n", bi->InterruptVector);
121
}
122
 
123
//-----------------------------------------------------------------------------
124
 
125
uint16_t ReadOperationWordReg(uint32_t *base, uint32_t port)
126
{
127
    return *((uint16_t*)((uint8_t*)base + port));
128
}
129
 
130
//-----------------------------------------------------------------------------
131
 
132
void WriteOperationWordReg(uint32_t *base, uint32_t port, uint16_t value)
133
{
134
    *((uint16_t*)((uint8_t*)base + port)) = value;
135
}
136
 
137
//-----------------------------------------------------------------------------
138
 
139
uint32_t ReadAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort)
140
{
141
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
142
    return *((uint32_t*)(pBaseAddress + RelativePort));
143
}
144
 
145
//-----------------------------------------------------------------------------
146
 
147
uint32_t ReadAmbMainReg(uint32_t *base, uint32_t RelativePort)
148
{
149
    return *((uint32_t*)((uint8_t*)base + RelativePort));
150
}
151
 
152
//-----------------------------------------------------------------------------
153
 
154
void WriteAmbReg(uint32_t *base, uint32_t AdmNumber, uint32_t RelativePort, uint32_t value)
155
{
156
    uint8_t* pBaseAddress = (uint8_t*)base + AdmNumber * ADM_SIZE;
157
    *((uint32_t*)(pBaseAddress + RelativePort)) = value;
158
}
159
 
160
//-----------------------------------------------------------------------------
161
 
162
void WriteAmbMainReg(uint32_t *base, uint32_t RelativePort, uint32_t value)
163
{
164
    *((uint32_t*)((uint8_t*)base + RelativePort)) = value;
165
}
166
 
167
//-----------------------------------------------------------------------------
168
 
169
int WaitCmdReady(uint32_t *base, uint32_t AdmNumber, uint32_t StatusAddress)
170
{
171
    int pass_count = 0;
172
    uint32_t cmd_rdy;
173
 
174
    //fprintf(stderr,"%s()\n", __FUNCTION__);
175
 
176
    do {
177
 
178
        cmd_rdy = ReadAmbReg(base, AdmNumber, StatusAddress);
179
        cmd_rdy &= AMB_statCMDRDY; //HOST_statCMDRDY;
180
 
181
        if(pass_count < 10) {
182
 
183
            pass_count++;
184
            ToPause(1);
185
 
186
        } else {
187
            return -1;
188
        }
189
 
190
    } while(!cmd_rdy);
191
 
192
    return 0;
193
}
194
 
195
//-----------------------------------------------------------------------------
196
 
197
int WriteRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t value)
198
{
199
    int Status = 0;
200
    uint32_t Address = TetrNumber * TETRAD_SIZE;
201
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
202
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
203
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
204
 
205
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
206
 
207
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
208
    if(Status != 0) {
209
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
210
        return Status;
211
    }
212
 
213
    WriteAmbReg(base, AdmNumber, DataAddress, value);
214
 
215
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d\n", __FUNCTION__,
216
    //          AdmNumber, TetrNumber, RegNumber);
217
 
218
    return Status;
219
}
220
 
221
//-----------------------------------------------------------------------------
222
 
223
int ReadRegData(uint32_t *base, uint32_t AdmNumber, uint32_t TetrNumber, uint32_t RegNumber, uint32_t *Value)
224
{
225
    int Status = 0;
226
    uint32_t Address = TetrNumber * TETRAD_SIZE;
227
    uint32_t CmdAddress = Address + TRDadr_CMD_ADR * REG_SIZE;
228
    uint32_t StatusAddress = Address + TRDadr_STATUS * REG_SIZE;
229
    uint32_t DataAddress = Address + TRDadr_CMD_DATA * REG_SIZE;
230
 
231
    WriteAmbReg(base, AdmNumber, CmdAddress, RegNumber);
232
 
233
    Status = WaitCmdReady(base, AdmNumber, StatusAddress); // wait CMD_RDY
234
    if(Status != 0) {
235
        fprintf(stderr,"%s(): ERROR wait cmd ready.\n", __FUNCTION__);
236
        return Status;
237
    }
238
 
239
    *Value = ReadAmbReg(base, AdmNumber, DataAddress);
240
 
241
    //fprintf(stderr,"%s(): Adm = %d, Tetr = %d, Reg = %d, Val = %x\n", __FUNCTION__,
242
    //          AdmNumber, TetrNumber, RegNumber, (int)*Value);
243
 
244
    return Status;
245
}
246
 
247
//-----------------------------------------------------------------------------
248
 
249
uint32_t RegPeekInd(uint32_t *base, uint32_t trdNo, uint32_t rgnum)
250
{
251
    uint32_t Value = 0;
252
 
253
    ReadRegData(base, 0, trdNo, rgnum, &Value);
254
 
255
    return Value;
256
}
257
 
258
//-----------------------------------------------------------------------------
259
 
260
int RegPokeDir( uint32_t *base, uint32_t TetrNumber, uint32_t RegNumber, uint32_t Value )
261
{
262
    uint32_t Address;
263
 
264
    Address = TetrNumber * TETRAD_SIZE;
265
    RegNumber = RegNumber & 0x3;
266
 
267
    Address += RegNumber * REG_SIZE;
268
 
269
    WriteAmbReg(base, 0, Address, Value);
270
 
271
    return 0;
272
}
273
 
274
//-----------------------------------------------------------------------------
275
 
276
void ToPause(int ms)
277
{
278
    struct timeval tv = {0, 0};
279
    tv.tv_usec = 1000*ms;
280
 
281
    select(0,NULL,NULL,NULL,&tv);
282
}
283
 
284
//-----------------------------------------------------------------------------
285
 
286
int board_init(uint32_t *base)
287
{
288
    u16 temp = 0;
289
    u16 blockId = 0;
290
    u16 blockVer = 0;
291
    u16 deviceID = 0;
292
    u16 deviceRev = 0;
293
    int i = 0;
294
 
295
    blockId = ReadOperationWordReg(base, PEMAINadr_BLOCK_ID);
296
    blockVer = ReadOperationWordReg(base, PEMAINadr_BLOCK_VER);
297
 
298
    fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);
299
 
300
    deviceID = ReadOperationWordReg(base, PEMAINadr_DEVICE_ID);
301
    deviceRev = ReadOperationWordReg(base, PEMAINadr_DEVICE_REV);
302
 
303
    fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
304
 
305
    if((AMBPEX8_DEVID != deviceID) &&
306
       (ADP201X1AMB_DEVID != deviceID) &&
307
       (AMBPEX5_DEVID != deviceID))
308
        return -ENODEV;
309
 
310
    temp = ReadOperationWordReg(base, PEMAINadr_PLD_VER);
311
    int m_BlockCnt = ReadOperationWordReg(base, PEMAINadr_BLOCK_CNT);
312
 
313
    fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);
314
    fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);
315
 
316
    // определим какие каналы ПДП присутствуют и их характеристики:
317
    // направление передачи данных, размер FIFO, максимальный размер блока ПДП
318
 
319
    FIFO_ID FifoId;
320
    int m_DmaFifoSize[4] = {0};
321
    int m_MaxDmaSize[4] = {0};
322
    //int m_FifoAddr[4] = {0};
323
    //int m_BlockFifoId[4] = {0};
324
    int m_DmaDir[4] = {0};
325
    int m_DmaChanMask = 0;
326
 
327
    for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)
328
    {
329
        uint32_t FifoAddr = 0;
330
        u16 block_id = 0;
331
        FifoAddr = (iBlock + 1) * PE_FIFO_ADDR;
332
        temp = ReadOperationWordReg(base, PEFIFOadr_BLOCK_ID + FifoAddr);
333
        block_id = (temp & 0x0FFF);
334
        if(block_id == PE_FIFO_ID)
335
        {
336
            u64 one = 0;
337
            u64 maxdmasize = 0;
338
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
339
            //m_FifoAddr[iChan] = FifoAddr;
340
            //m_BlockFifoId[iChan] = block_id;
341
            m_DmaChanMask |= (1 << iChan);
342
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
343
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
344
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
345
            temp = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr);
346
 
347
            one = 1;
348
            maxdmasize = one << temp;
349
            // если макс. размер ПДП может быть больше или равен 4 Гбайт, то снижаем его до 1 Гбайта
350
            if(temp >= 32)
351
                m_MaxDmaSize[iChan] = 0x40000000;
352
            else
353
                m_MaxDmaSize[iChan] = (uint32_t)maxdmasize;
354
 
355
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d,\n", __FUNCTION__,
356
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan]);
357
            fprintf(stderr,"%s(): Max DMA size (hard) = %d MBytes,  Max DMA size (soft) = %d MBytes.\n", __FUNCTION__,
358
                    (uint32_t)(maxdmasize / 1024 / 1024), m_MaxDmaSize[iChan] / 1024 / 1024);
359
        }
360
        if(block_id == PE_EXT_FIFO_ID)
361
        {
362
            uint32_t resource_id = 0;
363
            u16 iChan = ReadOperationWordReg(base, PEFIFOadr_FIFO_NUM + FifoAddr);
364
            //m_FifoAddr[iChan] = FifoAddr;
365
            //m_BlockFifoId[iChan] = block_id;
366
            m_DmaChanMask |= (1 << iChan);
367
            FifoId.AsWhole = ReadOperationWordReg(base, PEFIFOadr_FIFO_ID + FifoAddr);
368
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
369
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
370
            m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт
371
            resource_id = ReadOperationWordReg(base, PEFIFOadr_DMA_SIZE + FifoAddr); // RESOURCE
372
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,
373
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);
374
        }
375
    }
376
 
377
    // подготовим к работе ПЛИС ADM
378
    fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);
379
    WriteOperationWordReg(base,PEMAINadr_BRD_MODE, 0);
380
    ToPause(100);       // pause ~ 100 msec
381
    for(i = 0; i < 10; i++)
382
    {
383
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 1);
384
        ToPause(100);   // pause ~ 100 msec
385
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 3);
386
        ToPause(100);   // pause ~ 100 msec
387
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 7);
388
        ToPause(100);   // pause ~ 100 msec
389
        temp = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS) & 0x01;
390
        if(temp)
391
            break;
392
    }
393
    WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0x0F);
394
    ToPause(100);       // pause ~ 100 msec
395
 
396
    if(temp)
397
    {
398
        uint32_t idx = 0;
399
        BRD_STATUS brd_status;
400
        fprintf(stderr,"%s(): ADM PLD is captured.\n", __FUNCTION__);
401
        brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
402
        brd_status.ByBits.InFlags &= 0x80; // 1 - ADM PLD in test mode
403
        if(brd_status.ByBits.InFlags)
404
        {
405
            BRD_MODE brd_mode;
406
            fprintf(stderr,"%s(): ADM PLD in test mode.\n", __FUNCTION__);
407
 
408
            // проверка линий передачи флагов
409
            brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
410
            for(idx = 0; idx < 4; idx++)
411
            {
412
                brd_mode.ByBits.OutFlags = idx;
413
                WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
414
                ToPause(10);
415
                brd_status.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_STATUS);
416
                brd_status.ByBits.InFlags &= 0x03;
417
                if(brd_mode.ByBits.OutFlags != brd_status.ByBits.InFlags)
418
                {
419
                    temp = 0;
420
                    fprintf(stderr,"%s(): FLG_IN (%d) NOT equ FLG_OUT (%d).\n", __FUNCTION__,
421
                            brd_status.ByBits.InFlags, brd_mode.ByBits.OutFlags);
422
                    break;
423
                }
424
            }
425
            if(temp)
426
                fprintf(stderr,"%s(): FLG_IN equ FLG_OUT.\n", __FUNCTION__);
427
        }
428
        else
429
            temp = 0;
430
    }
431
 
432
    if(!temp)
433
    {
434
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, 0);
435
        ToPause(100);   // pause ~ 100 msec
436
    }
437
 
438
 
439
    // состояние ПЛИС ADM: 0 - не готова
440
    fprintf(stderr,"%s(): ADM PLD[%d] status = 0x%X.\n", __FUNCTION__, i, temp);
441
 
442
    {
443
        BRD_MODE brd_mode;
444
        brd_mode.AsWhole = ReadOperationWordReg(base, PEMAINadr_BRD_MODE);
445
        brd_mode.ByBits.OutFlags = 0;
446
        WriteOperationWordReg(base, PEMAINadr_BRD_MODE, brd_mode.AsWhole);
447
        fprintf(stderr,"%s(): BRD_MODE = 0x%X.\n", __FUNCTION__, brd_mode.AsWhole);
448
    }
449
 
450
    WriteOperationWordReg(base, PEMAINadr_IRQ_MASK, 0x4000);
451
 
452
    //WriteAmbMainReg(base, 0x0, 0x1);
453
    //WriteAmbMainReg(base, 0x0, 0x1);
454
 
455
    return 0;
456
}
457
 
458
//-----------------------------------------------------------------------------
459
 
460
void pld_info( uint32_t *base )
461
{
462
        uint32_t d = 0;
463
        uint32_t d1 = 0;
464
        uint32_t d2 = 0;
465
        uint32_t d3 = 0;
466
        uint32_t d4 = 0;
467
        uint32_t d5 = 0;
468
        int ii = 0;
469
 
470
        if(!base) return;
471
 
472
        fprintf(stderr,"Прошивка ПЛИС ADM\n" );
473
 
474
        RegPokeDir( base, 0, 1, 1 );
475
 
476
        d=RegPeekInd( base, 0, 0x108 );
477
        if( d==0x4953 ) {
478
            fprintf(stderr, "  SIG= 0x%.4X - Ok \n", d );
479
        } else {
480
            fprintf(stderr, "  SIG= 0x%.4X - Ошибка, ожидается 0x4953    \n", d );
481
            return;
482
        }
483
 
484
        d=RegPeekInd( base,  0, 0x109 );  fprintf(stderr, "   Версия интерфейса ADM:  %d.%d\n", d>>8, d&0xFF );
485
        d=RegPeekInd( base,  0, 0x110 ); d1=RegPeekInd( base,  0, 0x111 );
486
        fprintf(stderr,  "   Базовый модуль: 0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
487
 
488
        d=RegPeekInd( base,  0, 0x112 ); d1=RegPeekInd( base,  0, 0x113 );
489
        fprintf(stderr,  "   Субмодуль:      0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
490
 
491
        d=RegPeekInd( base,  0, 0x10B );  fprintf(stderr,  "   Модификация прошивки ПЛИС:  %d \n", d );
492
        d=RegPeekInd( base,  0, 0x10A );  fprintf(stderr,  "   Версия прошивки ПЛИС:       %d.%d\n", d>>8, d&0xFF );
493
        d=RegPeekInd( base,  0, 0x114 );  fprintf(stderr,  "   Номер сборки прошивки ПЛИС: 0x%.4X\n", d );
494
 
495
        fprintf(stderr,  "\nИнформация о тетрадах:\n\n" );
496
        for( ii=0; ii<8; ii++ ) {
497
 
498
            const char *str;
499
 
500
            d=RegPeekInd( base,  ii, 0x100 );
501
            d1=RegPeekInd( base,  ii, 0x101 );
502
            d2=RegPeekInd( base,  ii, 0x102 );
503
            d3=RegPeekInd( base,  ii, 0x103 );
504
            d4=RegPeekInd( base,  ii, 0x104 );
505
            d5=RegPeekInd( base,  ii, 0x105 );
506
 
507
            switch( d ) {
508
            case 1: str="TRD_MAIN      "; break;
509
            case 2: str="TRD_BASE_DAC  "; break;
510
            case 3: str="TRD_PIO_STD   "; break;
511
            case 0:    str=" -            "; break;
512
            case 0x47: str="SBSRAM_IN     "; break;
513
            case 0x48: str="SBSRAM_OUT    "; break;
514
            case 0x12: str="DIO64_OUT     "; break;
515
            case 0x13: str="DIO64_IN      "; break;
516
            case 0x14: str="ADM212x200M   "; break;
517
            case 0x5D: str="ADM212x500M   "; break;
518
            case 0x41: str="DDS9956       "; break;
519
            case 0x4F: str="TEST_CTRL     "; break;
520
            case 0x3F: str="ADM214x200M   "; break;
521
            case 0x40: str="ADM216x100    "; break;
522
            case 0x2F: str="ADM28x1G      "; break;
523
            case 0x2D: str="TRD128_OUT    "; break;
524
            case 0x4C: str="TRD128_IN     "; break;
525
            case 0x30: str="ADMDDC5016    "; break;
526
            case 0x2E: str="ADMFOTR2G     "; break;
527
            case 0x49: str="ADMFOTR3G     "; break;
528
            case 0x67: str="DDS9912       "; break;
529
            case 0x70: str="AMBPEX5_SDRAM "; break;
530
            case 0x71: str="TRD_MSG       "; break;
531
            case 0x72: str="TRD_TS201     "; break;
532
            case 0x73: str="TRD_STREAM_IN "; break;
533
            case 0x74: str="TRD_STREAM_OUT"; break;
534
 
535
 
536
            default: str="UNKNOW        "; break;
537
            }
538
            fprintf(stderr,  " %d  0x%.4X %s ", ii, d, str );
539
            if( d>0 ) {
540
                fprintf(stderr,  " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );
541
                if( d3 & 0x10 ) {
542
                    fprintf(stderr,  "FIFO IN   %dx%d\n", d4, d5 );
543
                } else if( d3 & 0x20 ) {
544
                    fprintf(stderr,  "FIFO OUT  %dx%d\n", d4, d5 );
545
                } else {
546
                    fprintf(stderr,  "\n" );
547
                }
548
            } else {
549
                fprintf(stderr,  "\n" );
550
            }
551
 
552
        }
553
}
554
 
555
//-----------------------------------------------------------------------------

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