OpenCores
URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [MyUserLogic/] [UserLogic_00/] [top_level_1_PCIe_UserLogic_00_USER_LOGIC/] [sysgen/] [synopsis] - Blame information for rev 13

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 13 barabba 
{
2 
  'attributes' => {
3 
    'HDLCodeGenStatus' => 0,
4 
    'HDL_PATH' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen',
5 
    'Impl_file' => 'ISE Defaults',
6 
    'Impl_file_sgadvanced' => '',
7 
    'Synth_file' => 'XST Defaults',
8 
    'Synth_file_sgadvanced' => '',
9 
    'TEMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
10 
    'TMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
11 
    'Temp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
12 
    'Tmp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
13 
    'base_system_period_hardware' => 5,
14 
    'base_system_period_simulink' => '5e-009',
15 
    'block_icon_display' => 'Default',
16 
    'block_type' => 'sysgen',
17 
    'block_version' => '',
18 
    'ce_clr' => 0,
19 
    'clkWrapper' => 'user_logic_cw',
20 
    'clkWrapperFile' => 'user_logic_cw.vhd',
21 
    'clock_loc' => '',
22 
    'clock_wrapper' => 'Clock Enables',
23 
    'clock_wrapper_sgadvanced' => '',
24 
    'compilation' => 'NGC Netlist',
25 
    'compilation_lut' => {
26 
      'keys' => [
27 
        'HDL Netlist',
28 
        'Bitstream',
29 
        'NGC Netlist',
30 
      ],
31 
      'values' => [
32 
        'target1',
33 
        'target2',
34 
        'target3',
35 
      ],
36 
    },
37 
    'compilation_target' => 'NGC Netlist',
38 
    'core_generation' => 1,
39 
    'core_generation_sgadvanced' => '',
40 
    'core_is_deployed' => 0,
41 
    'coregen_core_generation_tmpdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root/cg_wk/c1fefddc63a4b8747',
42 
    'coregen_part_family' => 'virtex6',
43 
    'createTestbench' => 0,
44 
    'create_interface_document' => 'off',
45 
    'dbl_ovrd' => -1,
46 
    'dbl_ovrd_sgadvanced' => '',
47 
    'dcm_info' => {
48 
    },
49 
    'dcm_input_clock_period' => 5,
50 
    'deprecated_control' => 'off',
51 
    'deprecated_control_sgadvanced' => '',
52 
    'design' => 'user_logic',
53 
    'designFile' => 'user_logic.vhd',
54 
    'design_full_path' => 'C:\\Temp\\Xilinx PCI Express\\ML605_ISE13.3\\MySysGen\\PCIe_UserLogic_00.mdl',
55 
    'device' => 'xc6vlx240t-1ff1156',
56 
    'device_speed' => -1,
57 
    'directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
58 
    'dsp_cache_root_path' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
59 
    'entityNamingInstrs' => {
60 
      'nameMap' => undef,
61 
      'namesAlreadyUsed' => {
62 
        'default_clock_driver' => 1,
63 
        'user_logic_cw' => 1,
64 
      },
65 
    },
66 
    'eval_field' => 0,
67 
    'fileAttributes' => {
68 
      'cntr_11_0_341fbb8cfa0e669e.ngc' => {
69 
        'producer' => 'coregen',
70 
      },
71 
      'icon_1_06_a_87e2f476e984e565.ngc' => {
72 
        'producer' => 'coregen',
73 
      },
74 
      'ila_1_05_a_b6735eb4b876dee5.ngc' => {
75 
        'producer' => 'coregen',
76 
      },
77 
    },
78 
    'files' => [
79 
      'cntr_11_0_341fbb8cfa0e669e.ngc',
80 
      'icon_1_06_a_87e2f476e984e565.ngc',
81 
      'ila_1_05_a_b6735eb4b876dee5.ngc',
82 
      'xlpersistentdff.ngc',
83 
      'synopsis',
84 
      'user_logic.vhd',
85 
      'xlpersistentdff.ngc',
86 
      'user_logic_cw.vhd',
87 
      'user_logic_cw.ucf',
88 
      'user_logic_cw.xcf',
89 
      'user_logic_cw.sdc',
90 
      'xst_user_logic.prj',
91 
      'xst_user_logic.scr',
92 
      'vcom.do',
93 
      'isim_user_logic.prj',
94 
      'globals',
95 
      'hdlFiles',
96 
    ],
97 
    'fxdptinstalled' => 1,
98 
    'generateUsing71FrontEnd' => 1,
99 
    'generating_island_subsystem_handle' => 2341.00048828125,
100 
    'generating_subsystem_handle' => 2341.00048828125,
101 
    'generation_directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
102 
    'has_advanced_control' => 0,
103 
    'hdlDir' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen/hdl',
104 
    'hdlKind' => 'vhdl',
105 
    'hdl_path' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen',
106 
    'impl_file' => 'ISE Defaults*',
107 
    'incr_netlist' => 'off',
108 
    'incr_netlist_sgadvanced' => '',
109 
    'infoedit' => ' System Generator',
110 
    'isdeployed' => 0,
111 
    'ise_version' => '13.3i',
112 
    'master_sysgen_token_handle' => 2342.00048828125,
113 
    'matlab' => 'C:/Programmi/MATLAB/R2010b',
114 
    'matlab_fixedpoint' => 1,
115 
    'mdlHandle' => 2083.00048828125,
116 
    'mdlPath' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen/PCIe_UserLogic_00.mdl',
117 
    'modelDiagnostics' => [
118 
      {
119 
        'count' => 351,
120 
        'isMask' => 0,
121 
        'type' => 'PCIe_UserLogic_00 Total blocks',
122 
      },
123 
      {
124 
        'count' => 4,
125 
        'isMask' => 0,
126 
        'type' => 'DiscretePulseGenerator',
127 
      },
128 
      {
129 
        'count' => 339,
130 
        'isMask' => 0,
131 
        'type' => 'S-Function',
132 
      },
133 
      {
134 
        'count' => 4,
135 
        'isMask' => 0,
136 
        'type' => 'SubSystem',
137 
      },
138 
      {
139 
        'count' => 4,
140 
        'isMask' => 0,
141 
        'type' => 'Terminator',
142 
      },
143 
      {
144 
        'count' => 1,
145 
        'isMask' => 1,
146 
        'type' => 'Xilinx ChipScope Block',
147 
      },
148 
      {
149 
        'count' => 23,
150 
        'isMask' => 1,
151 
        'type' => 'Xilinx Constant Block Block',
152 
      },
153 
      {
154 
        'count' => 1,
155 
        'isMask' => 1,
156 
        'type' => 'Xilinx Counter Block',
157 
      },
158 
      {
159 
        'count' => 44,
160 
        'isMask' => 1,
161 
        'type' => 'Xilinx Gateway In Block',
162 
      },
163 
      {
164 
        'count' => 39,
165 
        'isMask' => 1,
166 
        'type' => 'Xilinx Gateway Out Block',
167 
      },
168 
      {
169 
        'count' => 2,
170 
        'isMask' => 1,
171 
        'type' => 'Xilinx Inverter Block',
172 
      },
173 
      {
174 
        'count' => 1,
175 
        'isMask' => 1,
176 
        'type' => 'Xilinx Logical Block Block',
177 
      },
178 
      {
179 
        'count' => 89,
180 
        'isMask' => 1,
181 
        'type' => 'Xilinx Register Block',
182 
      },
183 
      {
184 
        'count' => 62,
185 
        'isMask' => 1,
186 
        'type' => 'Xilinx Shared Memory Based From Register Block',
187 
      },
188 
      {
189 
        'count' => 62,
190 
        'isMask' => 1,
191 
        'type' => 'Xilinx Shared Memory Based To Register Block',
192 
      },
193 
      {
194 
        'count' => 1,
195 
        'isMask' => 1,
196 
        'type' => 'Xilinx Subsystem Generator Block',
197 
      },
198 
      {
199 
        'count' => 2,
200 
        'isMask' => 1,
201 
        'type' => 'Xilinx System Generator Block',
202 
      },
203 
      {
204 
        'count' => 14,
205 
        'isMask' => 1,
206 
        'type' => 'Xilinx Type Converter Block',
207 
      },
208 
    ],
209 
    'model_globals_initialized' => 1,
210 
    'model_path' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen/PCIe_UserLogic_00.mdl',
211 
    'myxilinx' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE',
212 
    'netlistingWrapupScript' => 'java:com.xilinx.sysgen.netlister.DefaultWrapupNetlister',
213 
    'ngc_config' => {
214 
      'include_cf' => 1,
215 
      'include_clockwrapper' => 1,
216 
    },
217 
    'ngc_files' => [
218 
      'xlpersistentdff.ngc',
219 
    ],
220 
    'num_sim_cycles' => 2000000000,
221 
    'package' => 'ff1156',
222 
    'part' => 'xc6vlx240t',
223 
    'partFamily' => 'virtex6',
224 
    'port_data_types_enabled' => 1,
225 
    'postgeneration_fcn' => 'xlNGCPostGeneration',
226 
    'preserve_hierarchy' => 0,
227 
    'proj_type' => 'Project Navigator',
228 
    'proj_type_sgadvanced' => '',
229 
    'run_coregen' => 'off',
230 
    'run_coregen_sgadvanced' => '',
231 
    'sample_time_colors_enabled' => 1,
232 
    'sampletimecolors' => 1,
233 
    'sdcFile' => 'user_logic_cw.sdc',
234 
    'settings_fcn' => 'xlngcsettings',
235 
    'sg_blockgui_xml' => '',
236 
    'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
237 
    'sg_list_contents' => '',
238 
    'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
239 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
240 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
241 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
242 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
243 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
244 
fprintf(\'\',\'COMMENT: end icon graphics\');
245 
fprintf(\'\',\'COMMENT: begin icon text\');
246 
fprintf(\'\',\'COMMENT: end icon text\');',
247 
    'sg_version' => '',
248 
    'sggui_pos' => '-1,-1,-1,-1',
249 
    'simulation_island_subsystem_handle' => 2341.00048828125,
250 
    'simulinkName' => 'parking_lot',
251 
    'simulink_accelerator_running' => 0,
252 
    'simulink_debugger_running' => 0,
253 
    'simulink_period' => '5e-009',
254 
    'speed' => -1,
255 
    'synth_file' => 'XST Defaults*',
256 
    'synthesisTool' => 'XST',
257 
    'synthesis_language' => 'vhdl',
258 
    'synthesis_tool' => 'XST',
259 
    'synthesis_tool_sgadvanced' => '',
260 
    'sysclk_period' => 5,
261 
    'sysgen' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
262 
    'sysgenRoot' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
263 
    'sysgenTokenSettings' => {
264 
      'Impl_file' => 'ISE Defaults',
265 
      'Impl_file_sgadvanced' => '',
266 
      'Synth_file' => 'XST Defaults',
267 
      'Synth_file_sgadvanced' => '',
268 
      'base_system_period_hardware' => 5,
269 
      'base_system_period_simulink' => '5e-009',
270 
      'block_icon_display' => 'Default',
271 
      'block_type' => 'sysgen',
272 
      'block_version' => '',
273 
      'ce_clr' => 0,
274 
      'clock_loc' => '',
275 
      'clock_wrapper' => 'Clock Enables',
276 
      'clock_wrapper_sgadvanced' => '',
277 
      'compilation' => 'NGC Netlist',
278 
      'compilation_lut' => {
279 
        'keys' => [
280 
          'HDL Netlist',
281 
          'Bitstream',
282 
          'NGC Netlist',
283 
        ],
284 
        'values' => [
285 
          'target1',
286 
          'target2',
287 
          'target3',
288 
        ],
289 
      },
290 
      'core_generation' => 1,
291 
      'core_generation_sgadvanced' => '',
292 
      'coregen_part_family' => 'virtex6',
293 
      'create_interface_document' => 'off',
294 
      'dbl_ovrd' => -1,
295 
      'dbl_ovrd_sgadvanced' => '',
296 
      'dcm_input_clock_period' => 5,
297 
      'deprecated_control' => 'off',
298 
      'deprecated_control_sgadvanced' => '',
299 
      'directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
300 
      'eval_field' => 0,
301 
      'has_advanced_control' => 0,
302 
      'impl_file' => 'ISE Defaults*',
303 
      'incr_netlist' => 'off',
304 
      'incr_netlist_sgadvanced' => '',
305 
      'infoedit' => ' System Generator',
306 
      'master_sysgen_token_handle' => 2342.00048828125,
307 
      'ngc_config' => {
308 
        'include_cf' => 1,
309 
        'include_clockwrapper' => 1,
310 
      },
311 
      'package' => 'ff1156',
312 
      'part' => 'xc6vlx240t',
313 
      'postgeneration_fcn' => 'xlNGCPostGeneration',
314 
      'preserve_hierarchy' => 0,
315 
      'proj_type' => 'Project Navigator',
316 
      'proj_type_sgadvanced' => '',
317 
      'run_coregen' => 'off',
318 
      'run_coregen_sgadvanced' => '',
319 
      'settings_fcn' => 'xlngcsettings',
320 
      'sg_blockgui_xml' => '',
321 
      'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
322 
      'sg_list_contents' => '',
323 
      'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
324 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
325 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
326 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
327 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
328 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
329 
fprintf(\'\',\'COMMENT: end icon graphics\');
330 
fprintf(\'\',\'COMMENT: begin icon text\');
331 
fprintf(\'\',\'COMMENT: end icon text\');',
332 
      'sggui_pos' => '-1,-1,-1,-1',
333 
      'simulation_island_subsystem_handle' => 2341.00048828125,
334 
      'simulink_period' => '5e-009',
335 
      'speed' => -1,
336 
      'synth_file' => 'XST Defaults*',
337 
      'synthesis_language' => 'vhdl',
338 
      'synthesis_tool' => 'XST',
339 
      'synthesis_tool_sgadvanced' => '',
340 
      'sysclk_period' => 5,
341 
      'testbench' => 0,
342 
      'testbench_sgadvanced' => '',
343 
      'trim_vbits' => 1,
344 
      'trim_vbits_sgadvanced' => '',
345 
      'xilinx_device' => 'xc6vlx240t-1ff1156',
346 
      'xilinxfamily' => 'virtex6',
347 
    },
348 
    'sysgen_Root' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
349 
    'systemClockPeriod' => 5,
350 
    'tempdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
351 
    'testbench' => 0,
352 
    'testbench_sgadvanced' => '',
353 
    'tmpDir' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC/sysgen',
354 
    'trim_vbits' => 1,
355 
    'trim_vbits_sgadvanced' => '',
356 
    'ucfFile' => 'user_logic_cw.ucf',
357 
    'use_ce_syn_keep' => 1,
358 
    'use_strict_names' => 1,
359 
    'user_tips_enabled' => 0,
360 
    'usertemp' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
361 
    'using71Netlister' => 1,
362 
    'verilog_files' => [
363 
      'conv_pkg.v',
364 
      'synth_reg.v',
365 
      'synth_reg_w_init.v',
366 
      'convert_type.v',
367 
    ],
368 
    'version' => '',
369 
    'vhdl_files' => [
370 
      'conv_pkg.vhd',
371 
      'synth_reg.vhd',
372 
      'synth_reg_w_init.vhd',
373 
    ],
374 
    'vsimtime' => '11000000275.000000 ns',
375 
    'xcfFile' => 'user_logic_cw.xcf',
376 
    'xilinx' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE',
377 
    'xilinx_device' => 'xc6vlx240t-1ff1156',
378 
    'xilinx_family' => 'virtex6',
379 
    'xilinx_package' => 'ff1156',
380 
    'xilinx_part' => 'xc6vlx240t',
381 
    'xilinxdevice' => 'xc6vlx240t-1ff1156',
382 
    'xilinxfamily' => 'virtex6',
383 
    'xilinxpart' => 'xc6vlx240t',
384 
  },
385 
  'entityName' => '',
386 
  'nets' => {
387 
    '.bram_rd_dout' => {
388 
      'hdlType' => 'std_logic_vector(63 downto 0)',
389 
      'width' => 64,
390 
    },
391 
    '.clk' => {
392 
      'hdlType' => 'std_logic',
393 
      'width' => 1,
394 
    },
395 
    '.fifo_rd_count' => {
396 
      'hdlType' => 'std_logic_vector(14 downto 0)',
397 
      'width' => 15,
398 
    },
399 
    '.fifo_rd_dout' => {
400 
      'hdlType' => 'std_logic_vector(71 downto 0)',
401 
      'width' => 72,
402 
    },
403 
    '.fifo_rd_empty' => {
404 
      'hdlType' => 'std_logic',
405 
      'width' => 1,
406 
    },
407 
    '.fifo_rd_pempty' => {
408 
      'hdlType' => 'std_logic',
409 
      'width' => 1,
410 
    },
411 
    '.fifo_rd_valid' => {
412 
      'hdlType' => 'std_logic',
413 
      'width' => 1,
414 
    },
415 
    '.fifo_wr_count' => {
416 
      'hdlType' => 'std_logic_vector(14 downto 0)',
417 
      'width' => 15,
418 
    },
419 
    '.fifo_wr_full' => {
420 
      'hdlType' => 'std_logic',
421 
      'width' => 1,
422 
    },
423 
    '.fifo_wr_pfull' => {
424 
      'hdlType' => 'std_logic',
425 
      'width' => 1,
426 
    },
427 
    '.rst_i' => {
428 
      'hdlType' => 'std_logic',
429 
      'width' => 1,
430 
    },
431 
    'from_register.data_out' => {
432 
      'hdlType' => 'std_logic_vector(31 downto 0)',
433 
      'width' => 32,
434 
    },
435 
    'from_register1.data_out' => {
436 
      'hdlType' => 'std_logic_vector(31 downto 0)',
437 
      'width' => 32,
438 
    },
439 
    'from_register10.data_out' => {
440 
      'hdlType' => 'std_logic',
441 
      'width' => 1,
442 
    },
443 
    'from_register11.data_out' => {
444 
      'hdlType' => 'std_logic_vector(31 downto 0)',
445 
      'width' => 32,
446 
    },
447 
    'from_register12.data_out' => {
448 
      'hdlType' => 'std_logic',
449 
      'width' => 1,
450 
    },
451 
    'from_register13.data_out' => {
452 
      'hdlType' => 'std_logic_vector(31 downto 0)',
453 
      'width' => 32,
454 
    },
455 
    'from_register14.data_out' => {
456 
      'hdlType' => 'std_logic',
457 
      'width' => 1,
458 
    },
459 
    'from_register15.data_out' => {
460 
      'hdlType' => 'std_logic',
461 
      'width' => 1,
462 
    },
463 
    'from_register16.data_out' => {
464 
      'hdlType' => 'std_logic',
465 
      'width' => 1,
466 
    },
467 
    'from_register17.data_out' => {
468 
      'hdlType' => 'std_logic_vector(31 downto 0)',
469 
      'width' => 32,
470 
    },
471 
    'from_register18.data_out' => {
472 
      'hdlType' => 'std_logic',
473 
      'width' => 1,
474 
    },
475 
    'from_register19.data_out' => {
476 
      'hdlType' => 'std_logic_vector(31 downto 0)',
477 
      'width' => 32,
478 
    },
479 
    'from_register2.data_out' => {
480 
      'hdlType' => 'std_logic_vector(31 downto 0)',
481 
      'width' => 32,
482 
    },
483 
    'from_register20.data_out' => {
484 
      'hdlType' => 'std_logic_vector(31 downto 0)',
485 
      'width' => 32,
486 
    },
487 
    'from_register21.data_out' => {
488 
      'hdlType' => 'std_logic',
489 
      'width' => 1,
490 
    },
491 
    'from_register22.data_out' => {
492 
      'hdlType' => 'std_logic_vector(31 downto 0)',
493 
      'width' => 32,
494 
    },
495 
    'from_register23.data_out' => {
496 
      'hdlType' => 'std_logic',
497 
      'width' => 1,
498 
    },
499 
    'from_register24.data_out' => {
500 
      'hdlType' => 'std_logic_vector(31 downto 0)',
501 
      'width' => 32,
502 
    },
503 
    'from_register25.data_out' => {
504 
      'hdlType' => 'std_logic',
505 
      'width' => 1,
506 
    },
507 
    'from_register26.data_out' => {
508 
      'hdlType' => 'std_logic_vector(31 downto 0)',
509 
      'width' => 32,
510 
    },
511 
    'from_register27.data_out' => {
512 
      'hdlType' => 'std_logic',
513 
      'width' => 1,
514 
    },
515 
    'from_register28.data_out' => {
516 
      'hdlType' => 'std_logic_vector(31 downto 0)',
517 
      'width' => 32,
518 
    },
519 
    'from_register29.data_out' => {
520 
      'hdlType' => 'std_logic',
521 
      'width' => 1,
522 
    },
523 
    'from_register3.data_out' => {
524 
      'hdlType' => 'std_logic_vector(31 downto 0)',
525 
      'width' => 32,
526 
    },
527 
    'from_register30.data_out' => {
528 
      'hdlType' => 'std_logic_vector(31 downto 0)',
529 
      'width' => 32,
530 
    },
531 
    'from_register31.data_out' => {
532 
      'hdlType' => 'std_logic',
533 
      'width' => 1,
534 
    },
535 
    'from_register32.data_out' => {
536 
      'hdlType' => 'std_logic_vector(31 downto 0)',
537 
      'width' => 32,
538 
    },
539 
    'from_register33.data_out' => {
540 
      'hdlType' => 'std_logic',
541 
      'width' => 1,
542 
    },
543 
    'from_register4.data_out' => {
544 
      'hdlType' => 'std_logic',
545 
      'width' => 1,
546 
    },
547 
    'from_register5.data_out' => {
548 
      'hdlType' => 'std_logic_vector(31 downto 0)',
549 
      'width' => 32,
550 
    },
551 
    'from_register6.data_out' => {
552 
      'hdlType' => 'std_logic',
553 
      'width' => 1,
554 
    },
555 
    'from_register7.data_out' => {
556 
      'hdlType' => 'std_logic_vector(31 downto 0)',
557 
      'width' => 32,
558 
    },
559 
    'from_register8.data_out' => {
560 
      'hdlType' => 'std_logic',
561 
      'width' => 1,
562 
    },
563 
    'from_register9.data_out' => {
564 
      'hdlType' => 'std_logic_vector(31 downto 0)',
565 
      'width' => 32,
566 
    },
567 
    'sysgen_dut.bram_rd_addr' => {
568 
      'hdlType' => 'std_logic_vector(11 downto 0)',
569 
      'width' => 12,
570 
    },
571 
    'sysgen_dut.bram_wr_addr' => {
572 
      'hdlType' => 'std_logic_vector(11 downto 0)',
573 
      'width' => 12,
574 
    },
575 
    'sysgen_dut.bram_wr_din' => {
576 
      'hdlType' => 'std_logic_vector(63 downto 0)',
577 
      'width' => 64,
578 
    },
579 
    'sysgen_dut.bram_wr_en' => {
580 
      'hdlType' => 'std_logic_vector(7 downto 0)',
581 
      'width' => 8,
582 
    },
583 
    'sysgen_dut.fifo_rd_en' => {
584 
      'hdlType' => 'std_logic',
585 
      'width' => 1,
586 
    },
587 
    'sysgen_dut.fifo_wr_din' => {
588 
      'hdlType' => 'std_logic_vector(71 downto 0)',
589 
      'width' => 72,
590 
    },
591 
    'sysgen_dut.fifo_wr_en' => {
592 
      'hdlType' => 'std_logic',
593 
      'width' => 1,
594 
    },
595 
    'sysgen_dut.rst_o' => {
596 
      'hdlType' => 'std_logic',
597 
      'width' => 1,
598 
    },
599 
    'sysgen_dut.to_register10_ce' => {
600 
      'hdlType' => 'std_logic',
601 
      'width' => 1,
602 
    },
603 
    'sysgen_dut.to_register10_clk' => {
604 
      'hdlType' => 'std_logic',
605 
      'width' => 1,
606 
    },
607 
    'sysgen_dut.to_register10_clr' => {
608 
      'hdlType' => 'std_logic',
609 
      'width' => 1,
610 
    },
611 
    'sysgen_dut.to_register10_data_in' => {
612 
      'hdlType' => 'std_logic',
613 
      'width' => 1,
614 
    },
615 
    'sysgen_dut.to_register10_en' => {
616 
      'hdlType' => 'std_logic',
617 
      'width' => 1,
618 
    },
619 
    'sysgen_dut.to_register11_ce' => {
620 
      'hdlType' => 'std_logic',
621 
      'width' => 1,
622 
    },
623 
    'sysgen_dut.to_register11_clk' => {
624 
      'hdlType' => 'std_logic',
625 
      'width' => 1,
626 
    },
627 
    'sysgen_dut.to_register11_clr' => {
628 
      'hdlType' => 'std_logic',
629 
      'width' => 1,
630 
    },
631 
    'sysgen_dut.to_register11_data_in' => {
632 
      'hdlType' => 'std_logic',
633 
      'width' => 1,
634 
    },
635 
    'sysgen_dut.to_register11_en' => {
636 
      'hdlType' => 'std_logic',
637 
      'width' => 1,
638 
    },
639 
    'sysgen_dut.to_register12_ce' => {
640 
      'hdlType' => 'std_logic',
641 
      'width' => 1,
642 
    },
643 
    'sysgen_dut.to_register12_clk' => {
644 
      'hdlType' => 'std_logic',
645 
      'width' => 1,
646 
    },
647 
    'sysgen_dut.to_register12_clr' => {
648 
      'hdlType' => 'std_logic',
649 
      'width' => 1,
650 
    },
651 
    'sysgen_dut.to_register12_data_in' => {
652 
      'hdlType' => 'std_logic',
653 
      'width' => 1,
654 
    },
655 
    'sysgen_dut.to_register12_en' => {
656 
      'hdlType' => 'std_logic',
657 
      'width' => 1,
658 
    },
659 
    'sysgen_dut.to_register13_ce' => {
660 
      'hdlType' => 'std_logic',
661 
      'width' => 1,
662 
    },
663 
    'sysgen_dut.to_register13_clk' => {
664 
      'hdlType' => 'std_logic',
665 
      'width' => 1,
666 
    },
667 
    'sysgen_dut.to_register13_clr' => {
668 
      'hdlType' => 'std_logic',
669 
      'width' => 1,
670 
    },
671 
    'sysgen_dut.to_register13_data_in' => {
672 
      'hdlType' => 'std_logic_vector(31 downto 0)',
673 
      'width' => 32,
674 
    },
675 
    'sysgen_dut.to_register13_en' => {
676 
      'hdlType' => 'std_logic',
677 
      'width' => 1,
678 
    },
679 
    'sysgen_dut.to_register14_ce' => {
680 
      'hdlType' => 'std_logic',
681 
      'width' => 1,
682 
    },
683 
    'sysgen_dut.to_register14_clk' => {
684 
      'hdlType' => 'std_logic',
685 
      'width' => 1,
686 
    },
687 
    'sysgen_dut.to_register14_clr' => {
688 
      'hdlType' => 'std_logic',
689 
      'width' => 1,
690 
    },
691 
    'sysgen_dut.to_register14_data_in' => {
692 
      'hdlType' => 'std_logic',
693 
      'width' => 1,
694 
    },
695 
    'sysgen_dut.to_register14_en' => {
696 
      'hdlType' => 'std_logic',
697 
      'width' => 1,
698 
    },
699 
    'sysgen_dut.to_register15_ce' => {
700 
      'hdlType' => 'std_logic',
701 
      'width' => 1,
702 
    },
703 
    'sysgen_dut.to_register15_clk' => {
704 
      'hdlType' => 'std_logic',
705 
      'width' => 1,
706 
    },
707 
    'sysgen_dut.to_register15_clr' => {
708 
      'hdlType' => 'std_logic',
709 
      'width' => 1,
710 
    },
711 
    'sysgen_dut.to_register15_data_in' => {
712 
      'hdlType' => 'std_logic_vector(31 downto 0)',
713 
      'width' => 32,
714 
    },
715 
    'sysgen_dut.to_register15_en' => {
716 
      'hdlType' => 'std_logic',
717 
      'width' => 1,
718 
    },
719 
    'sysgen_dut.to_register16_ce' => {
720 
      'hdlType' => 'std_logic',
721 
      'width' => 1,
722 
    },
723 
    'sysgen_dut.to_register16_clk' => {
724 
      'hdlType' => 'std_logic',
725 
      'width' => 1,
726 
    },
727 
    'sysgen_dut.to_register16_clr' => {
728 
      'hdlType' => 'std_logic',
729 
      'width' => 1,
730 
    },
731 
    'sysgen_dut.to_register16_data_in' => {
732 
      'hdlType' => 'std_logic',
733 
      'width' => 1,
734 
    },
735 
    'sysgen_dut.to_register16_en' => {
736 
      'hdlType' => 'std_logic',
737 
      'width' => 1,
738 
    },
739 
    'sysgen_dut.to_register17_ce' => {
740 
      'hdlType' => 'std_logic',
741 
      'width' => 1,
742 
    },
743 
    'sysgen_dut.to_register17_clk' => {
744 
      'hdlType' => 'std_logic',
745 
      'width' => 1,
746 
    },
747 
    'sysgen_dut.to_register17_clr' => {
748 
      'hdlType' => 'std_logic',
749 
      'width' => 1,
750 
    },
751 
    'sysgen_dut.to_register17_data_in' => {
752 
      'hdlType' => 'std_logic_vector(31 downto 0)',
753 
      'width' => 32,
754 
    },
755 
    'sysgen_dut.to_register17_en' => {
756 
      'hdlType' => 'std_logic',
757 
      'width' => 1,
758 
    },
759 
    'sysgen_dut.to_register18_ce' => {
760 
      'hdlType' => 'std_logic',
761 
      'width' => 1,
762 
    },
763 
    'sysgen_dut.to_register18_clk' => {
764 
      'hdlType' => 'std_logic',
765 
      'width' => 1,
766 
    },
767 
    'sysgen_dut.to_register18_clr' => {
768 
      'hdlType' => 'std_logic',
769 
      'width' => 1,
770 
    },
771 
    'sysgen_dut.to_register18_data_in' => {
772 
      'hdlType' => 'std_logic',
773 
      'width' => 1,
774 
    },
775 
    'sysgen_dut.to_register18_en' => {
776 
      'hdlType' => 'std_logic',
777 
      'width' => 1,
778 
    },
779 
    'sysgen_dut.to_register19_ce' => {
780 
      'hdlType' => 'std_logic',
781 
      'width' => 1,
782 
    },
783 
    'sysgen_dut.to_register19_clk' => {
784 
      'hdlType' => 'std_logic',
785 
      'width' => 1,
786 
    },
787 
    'sysgen_dut.to_register19_clr' => {
788 
      'hdlType' => 'std_logic',
789 
      'width' => 1,
790 
    },
791 
    'sysgen_dut.to_register19_data_in' => {
792 
      'hdlType' => 'std_logic_vector(31 downto 0)',
793 
      'width' => 32,
794 
    },
795 
    'sysgen_dut.to_register19_en' => {
796 
      'hdlType' => 'std_logic',
797 
      'width' => 1,
798 
    },
799 
    'sysgen_dut.to_register1_ce' => {
800 
      'hdlType' => 'std_logic',
801 
      'width' => 1,
802 
    },
803 
    'sysgen_dut.to_register1_clk' => {
804 
      'hdlType' => 'std_logic',
805 
      'width' => 1,
806 
    },
807 
    'sysgen_dut.to_register1_clr' => {
808 
      'hdlType' => 'std_logic',
809 
      'width' => 1,
810 
    },
811 
    'sysgen_dut.to_register1_data_in' => {
812 
      'hdlType' => 'std_logic',
813 
      'width' => 1,
814 
    },
815 
    'sysgen_dut.to_register1_en' => {
816 
      'hdlType' => 'std_logic',
817 
      'width' => 1,
818 
    },
819 
    'sysgen_dut.to_register20_ce' => {
820 
      'hdlType' => 'std_logic',
821 
      'width' => 1,
822 
    },
823 
    'sysgen_dut.to_register20_clk' => {
824 
      'hdlType' => 'std_logic',
825 
      'width' => 1,
826 
    },
827 
    'sysgen_dut.to_register20_clr' => {
828 
      'hdlType' => 'std_logic',
829 
      'width' => 1,
830 
    },
831 
    'sysgen_dut.to_register20_data_in' => {
832 
      'hdlType' => 'std_logic',
833 
      'width' => 1,
834 
    },
835 
    'sysgen_dut.to_register20_en' => {
836 
      'hdlType' => 'std_logic',
837 
      'width' => 1,
838 
    },
839 
    'sysgen_dut.to_register21_ce' => {
840 
      'hdlType' => 'std_logic',
841 
      'width' => 1,
842 
    },
843 
    'sysgen_dut.to_register21_clk' => {
844 
      'hdlType' => 'std_logic',
845 
      'width' => 1,
846 
    },
847 
    'sysgen_dut.to_register21_clr' => {
848 
      'hdlType' => 'std_logic',
849 
      'width' => 1,
850 
    },
851 
    'sysgen_dut.to_register21_data_in' => {
852 
      'hdlType' => 'std_logic_vector(31 downto 0)',
853 
      'width' => 32,
854 
    },
855 
    'sysgen_dut.to_register21_en' => {
856 
      'hdlType' => 'std_logic',
857 
      'width' => 1,
858 
    },
859 
    'sysgen_dut.to_register22_ce' => {
860 
      'hdlType' => 'std_logic',
861 
      'width' => 1,
862 
    },
863 
    'sysgen_dut.to_register22_clk' => {
864 
      'hdlType' => 'std_logic',
865 
      'width' => 1,
866 
    },
867 
    'sysgen_dut.to_register22_clr' => {
868 
      'hdlType' => 'std_logic',
869 
      'width' => 1,
870 
    },
871 
    'sysgen_dut.to_register22_data_in' => {
872 
      'hdlType' => 'std_logic',
873 
      'width' => 1,
874 
    },
875 
    'sysgen_dut.to_register22_en' => {
876 
      'hdlType' => 'std_logic',
877 
      'width' => 1,
878 
    },
879 
    'sysgen_dut.to_register23_ce' => {
880 
      'hdlType' => 'std_logic',
881 
      'width' => 1,
882 
    },
883 
    'sysgen_dut.to_register23_clk' => {
884 
      'hdlType' => 'std_logic',
885 
      'width' => 1,
886 
    },
887 
    'sysgen_dut.to_register23_clr' => {
888 
      'hdlType' => 'std_logic',
889 
      'width' => 1,
890 
    },
891 
    'sysgen_dut.to_register23_data_in' => {
892 
      'hdlType' => 'std_logic_vector(31 downto 0)',
893 
      'width' => 32,
894 
    },
895 
    'sysgen_dut.to_register23_en' => {
896 
      'hdlType' => 'std_logic',
897 
      'width' => 1,
898 
    },
899 
    'sysgen_dut.to_register24_ce' => {
900 
      'hdlType' => 'std_logic',
901 
      'width' => 1,
902 
    },
903 
    'sysgen_dut.to_register24_clk' => {
904 
      'hdlType' => 'std_logic',
905 
      'width' => 1,
906 
    },
907 
    'sysgen_dut.to_register24_clr' => {
908 
      'hdlType' => 'std_logic',
909 
      'width' => 1,
910 
    },
911 
    'sysgen_dut.to_register24_data_in' => {
912 
      'hdlType' => 'std_logic',
913 
      'width' => 1,
914 
    },
915 
    'sysgen_dut.to_register24_en' => {
916 
      'hdlType' => 'std_logic',
917 
      'width' => 1,
918 
    },
919 
    'sysgen_dut.to_register25_ce' => {
920 
      'hdlType' => 'std_logic',
921 
      'width' => 1,
922 
    },
923 
    'sysgen_dut.to_register25_clk' => {
924 
      'hdlType' => 'std_logic',
925 
      'width' => 1,
926 
    },
927 
    'sysgen_dut.to_register25_clr' => {
928 
      'hdlType' => 'std_logic',
929 
      'width' => 1,
930 
    },
931 
    'sysgen_dut.to_register25_data_in' => {
932 
      'hdlType' => 'std_logic_vector(31 downto 0)',
933 
      'width' => 32,
934 
    },
935 
    'sysgen_dut.to_register25_en' => {
936 
      'hdlType' => 'std_logic',
937 
      'width' => 1,
938 
    },
939 
    'sysgen_dut.to_register26_ce' => {
940 
      'hdlType' => 'std_logic',
941 
      'width' => 1,
942 
    },
943 
    'sysgen_dut.to_register26_clk' => {
944 
      'hdlType' => 'std_logic',
945 
      'width' => 1,
946 
    },
947 
    'sysgen_dut.to_register26_clr' => {
948 
      'hdlType' => 'std_logic',
949 
      'width' => 1,
950 
    },
951 
    'sysgen_dut.to_register26_data_in' => {
952 
      'hdlType' => 'std_logic',
953 
      'width' => 1,
954 
    },
955 
    'sysgen_dut.to_register26_en' => {
956 
      'hdlType' => 'std_logic',
957 
      'width' => 1,
958 
    },
959 
    'sysgen_dut.to_register27_ce' => {
960 
      'hdlType' => 'std_logic',
961 
      'width' => 1,
962 
    },
963 
    'sysgen_dut.to_register27_clk' => {
964 
      'hdlType' => 'std_logic',
965 
      'width' => 1,
966 
    },
967 
    'sysgen_dut.to_register27_clr' => {
968 
      'hdlType' => 'std_logic',
969 
      'width' => 1,
970 
    },
971 
    'sysgen_dut.to_register27_data_in' => {
972 
      'hdlType' => 'std_logic_vector(31 downto 0)',
973 
      'width' => 32,
974 
    },
975 
    'sysgen_dut.to_register27_en' => {
976 
      'hdlType' => 'std_logic',
977 
      'width' => 1,
978 
    },
979 
    'sysgen_dut.to_register2_ce' => {
980 
      'hdlType' => 'std_logic',
981 
      'width' => 1,
982 
    },
983 
    'sysgen_dut.to_register2_clk' => {
984 
      'hdlType' => 'std_logic',
985 
      'width' => 1,
986 
    },
987 
    'sysgen_dut.to_register2_clr' => {
988 
      'hdlType' => 'std_logic',
989 
      'width' => 1,
990 
    },
991 
    'sysgen_dut.to_register2_data_in' => {
992 
      'hdlType' => 'std_logic_vector(31 downto 0)',
993 
      'width' => 32,
994 
    },
995 
    'sysgen_dut.to_register2_en' => {
996 
      'hdlType' => 'std_logic',
997 
      'width' => 1,
998 
    },
999 
    'sysgen_dut.to_register3_ce' => {
1000 
      'hdlType' => 'std_logic',
1001 
      'width' => 1,
1002 
    },
1003 
    'sysgen_dut.to_register3_clk' => {
1004 
      'hdlType' => 'std_logic',
1005 
      'width' => 1,
1006 
    },
1007 
    'sysgen_dut.to_register3_clr' => {
1008 
      'hdlType' => 'std_logic',
1009 
      'width' => 1,
1010 
    },
1011 
    'sysgen_dut.to_register3_data_in' => {
1012 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1013 
      'width' => 32,
1014 
    },
1015 
    'sysgen_dut.to_register3_en' => {
1016 
      'hdlType' => 'std_logic',
1017 
      'width' => 1,
1018 
    },
1019 
    'sysgen_dut.to_register4_ce' => {
1020 
      'hdlType' => 'std_logic',
1021 
      'width' => 1,
1022 
    },
1023 
    'sysgen_dut.to_register4_clk' => {
1024 
      'hdlType' => 'std_logic',
1025 
      'width' => 1,
1026 
    },
1027 
    'sysgen_dut.to_register4_clr' => {
1028 
      'hdlType' => 'std_logic',
1029 
      'width' => 1,
1030 
    },
1031 
    'sysgen_dut.to_register4_data_in' => {
1032 
      'hdlType' => 'std_logic',
1033 
      'width' => 1,
1034 
    },
1035 
    'sysgen_dut.to_register4_en' => {
1036 
      'hdlType' => 'std_logic',
1037 
      'width' => 1,
1038 
    },
1039 
    'sysgen_dut.to_register5_ce' => {
1040 
      'hdlType' => 'std_logic',
1041 
      'width' => 1,
1042 
    },
1043 
    'sysgen_dut.to_register5_clk' => {
1044 
      'hdlType' => 'std_logic',
1045 
      'width' => 1,
1046 
    },
1047 
    'sysgen_dut.to_register5_clr' => {
1048 
      'hdlType' => 'std_logic',
1049 
      'width' => 1,
1050 
    },
1051 
    'sysgen_dut.to_register5_data_in' => {
1052 
      'hdlType' => 'std_logic',
1053 
      'width' => 1,
1054 
    },
1055 
    'sysgen_dut.to_register5_en' => {
1056 
      'hdlType' => 'std_logic',
1057 
      'width' => 1,
1058 
    },
1059 
    'sysgen_dut.to_register6_ce' => {
1060 
      'hdlType' => 'std_logic',
1061 
      'width' => 1,
1062 
    },
1063 
    'sysgen_dut.to_register6_clk' => {
1064 
      'hdlType' => 'std_logic',
1065 
      'width' => 1,
1066 
    },
1067 
    'sysgen_dut.to_register6_clr' => {
1068 
      'hdlType' => 'std_logic',
1069 
      'width' => 1,
1070 
    },
1071 
    'sysgen_dut.to_register6_data_in' => {
1072 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1073 
      'width' => 32,
1074 
    },
1075 
    'sysgen_dut.to_register6_en' => {
1076 
      'hdlType' => 'std_logic',
1077 
      'width' => 1,
1078 
    },
1079 
    'sysgen_dut.to_register7_ce' => {
1080 
      'hdlType' => 'std_logic',
1081 
      'width' => 1,
1082 
    },
1083 
    'sysgen_dut.to_register7_clk' => {
1084 
      'hdlType' => 'std_logic',
1085 
      'width' => 1,
1086 
    },
1087 
    'sysgen_dut.to_register7_clr' => {
1088 
      'hdlType' => 'std_logic',
1089 
      'width' => 1,
1090 
    },
1091 
    'sysgen_dut.to_register7_data_in' => {
1092 
      'hdlType' => 'std_logic',
1093 
      'width' => 1,
1094 
    },
1095 
    'sysgen_dut.to_register7_en' => {
1096 
      'hdlType' => 'std_logic',
1097 
      'width' => 1,
1098 
    },
1099 
    'sysgen_dut.to_register8_ce' => {
1100 
      'hdlType' => 'std_logic',
1101 
      'width' => 1,
1102 
    },
1103 
    'sysgen_dut.to_register8_clk' => {
1104 
      'hdlType' => 'std_logic',
1105 
      'width' => 1,
1106 
    },
1107 
    'sysgen_dut.to_register8_clr' => {
1108 
      'hdlType' => 'std_logic',
1109 
      'width' => 1,
1110 
    },
1111 
    'sysgen_dut.to_register8_data_in' => {
1112 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1113 
      'width' => 32,
1114 
    },
1115 
    'sysgen_dut.to_register8_en' => {
1116 
      'hdlType' => 'std_logic',
1117 
      'width' => 1,
1118 
    },
1119 
    'sysgen_dut.to_register9_ce' => {
1120 
      'hdlType' => 'std_logic',
1121 
      'width' => 1,
1122 
    },
1123 
    'sysgen_dut.to_register9_clk' => {
1124 
      'hdlType' => 'std_logic',
1125 
      'width' => 1,
1126 
    },
1127 
    'sysgen_dut.to_register9_clr' => {
1128 
      'hdlType' => 'std_logic',
1129 
      'width' => 1,
1130 
    },
1131 
    'sysgen_dut.to_register9_data_in' => {
1132 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1133 
      'width' => 32,
1134 
    },
1135 
    'sysgen_dut.to_register9_en' => {
1136 
      'hdlType' => 'std_logic',
1137 
      'width' => 1,
1138 
    },
1139 
    'sysgen_dut.to_register_ce' => {
1140 
      'hdlType' => 'std_logic',
1141 
      'width' => 1,
1142 
    },
1143 
    'sysgen_dut.to_register_clk' => {
1144 
      'hdlType' => 'std_logic',
1145 
      'width' => 1,
1146 
    },
1147 
    'sysgen_dut.to_register_clr' => {
1148 
      'hdlType' => 'std_logic',
1149 
      'width' => 1,
1150 
    },
1151 
    'sysgen_dut.to_register_data_in' => {
1152 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1153 
      'width' => 32,
1154 
    },
1155 
    'sysgen_dut.to_register_en' => {
1156 
      'hdlType' => 'std_logic',
1157 
      'width' => 1,
1158 
    },
1159 
    'sysgen_dut.user_int_1o' => {
1160 
      'hdlType' => 'std_logic',
1161 
      'width' => 1,
1162 
    },
1163 
    'sysgen_dut.user_int_2o' => {
1164 
      'hdlType' => 'std_logic',
1165 
      'width' => 1,
1166 
    },
1167 
    'sysgen_dut.user_int_3o' => {
1168 
      'hdlType' => 'std_logic',
1169 
      'width' => 1,
1170 
    },
1171 
    'to_register.dout' => {
1172 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1173 
      'width' => 32,
1174 
    },
1175 
    'to_register1.dout' => {
1176 
      'hdlType' => 'std_logic',
1177 
      'width' => 1,
1178 
    },
1179 
    'to_register10.dout' => {
1180 
      'hdlType' => 'std_logic',
1181 
      'width' => 1,
1182 
    },
1183 
    'to_register11.dout' => {
1184 
      'hdlType' => 'std_logic',
1185 
      'width' => 1,
1186 
    },
1187 
    'to_register12.dout' => {
1188 
      'hdlType' => 'std_logic',
1189 
      'width' => 1,
1190 
    },
1191 
    'to_register13.dout' => {
1192 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1193 
      'width' => 32,
1194 
    },
1195 
    'to_register14.dout' => {
1196 
      'hdlType' => 'std_logic',
1197 
      'width' => 1,
1198 
    },
1199 
    'to_register15.dout' => {
1200 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1201 
      'width' => 32,
1202 
    },
1203 
    'to_register16.dout' => {
1204 
      'hdlType' => 'std_logic',
1205 
      'width' => 1,
1206 
    },
1207 
    'to_register17.dout' => {
1208 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1209 
      'width' => 32,
1210 
    },
1211 
    'to_register18.dout' => {
1212 
      'hdlType' => 'std_logic',
1213 
      'width' => 1,
1214 
    },
1215 
    'to_register19.dout' => {
1216 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1217 
      'width' => 32,
1218 
    },
1219 
    'to_register2.dout' => {
1220 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1221 
      'width' => 32,
1222 
    },
1223 
    'to_register20.dout' => {
1224 
      'hdlType' => 'std_logic',
1225 
      'width' => 1,
1226 
    },
1227 
    'to_register21.dout' => {
1228 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1229 
      'width' => 32,
1230 
    },
1231 
    'to_register22.dout' => {
1232 
      'hdlType' => 'std_logic',
1233 
      'width' => 1,
1234 
    },
1235 
    'to_register23.dout' => {
1236 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1237 
      'width' => 32,
1238 
    },
1239 
    'to_register24.dout' => {
1240 
      'hdlType' => 'std_logic',
1241 
      'width' => 1,
1242 
    },
1243 
    'to_register25.dout' => {
1244 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1245 
      'width' => 32,
1246 
    },
1247 
    'to_register26.dout' => {
1248 
      'hdlType' => 'std_logic',
1249 
      'width' => 1,
1250 
    },
1251 
    'to_register27.dout' => {
1252 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1253 
      'width' => 32,
1254 
    },
1255 
    'to_register3.dout' => {
1256 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1257 
      'width' => 32,
1258 
    },
1259 
    'to_register4.dout' => {
1260 
      'hdlType' => 'std_logic',
1261 
      'width' => 1,
1262 
    },
1263 
    'to_register5.dout' => {
1264 
      'hdlType' => 'std_logic',
1265 
      'width' => 1,
1266 
    },
1267 
    'to_register6.dout' => {
1268 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1269 
      'width' => 32,
1270 
    },
1271 
    'to_register7.dout' => {
1272 
      'hdlType' => 'std_logic',
1273 
      'width' => 1,
1274 
    },
1275 
    'to_register8.dout' => {
1276 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1277 
      'width' => 32,
1278 
    },
1279 
    'to_register9.dout' => {
1280 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1281 
      'width' => 32,
1282 
    },
1283 
  },
1284 
  'subblocks' => {
1285 
    'bram_rd_addr' => {
1286 
      'connections' => {
1287 
        'bram_rd_addr' => 'sysgen_dut.bram_rd_addr',
1288 
      },
1289 
      'entity' => {
1290 
        'attributes' => {
1291 
          'entityAlreadyNetlisted' => 1,
1292 
          'isGateway' => 1,
1293 
          'is_floating_block' => 1,
1294 
        },
1295 
        'entityName' => 'bram_rd_addr',
1296 
        'ports' => {
1297 
          'bram_rd_addr' => {
1298 
            'attributes' => {
1299 
              'bin_pt' => 0,
1300 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
1301 
              'is_floating_block' => 1,
1302 
              'is_gateway_port' => 1,
1303 
              'must_be_hdl_vector' => 1,
1304 
              'period' => 1,
1305 
              'port_id' => 0,
1306 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
1307 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
1308 
              'timingConstraint' => 'none',
1309 
              'type' => 'UFix_12_0',
1310 
            },
1311 
            'direction' => 'in',
1312 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1313 
            'width' => 12,
1314 
          },
1315 
        },
1316 
      },
1317 
      'entityName' => 'bram_rd_addr',
1318 
    },
1319 
    'bram_rd_dout' => {
1320 
      'connections' => {
1321 
        'bram_rd_dout' => '.bram_rd_dout',
1322 
      },
1323 
      'entity' => {
1324 
        'attributes' => {
1325 
          'entityAlreadyNetlisted' => 1,
1326 
          'isGateway' => 1,
1327 
          'is_floating_block' => 1,
1328 
        },
1329 
        'entityName' => 'bram_rd_dout',
1330 
        'ports' => {
1331 
          'bram_rd_dout' => {
1332 
            'attributes' => {
1333 
              'bin_pt' => 0,
1334 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
1335 
              'is_floating_block' => 1,
1336 
              'is_gateway_port' => 1,
1337 
              'must_be_hdl_vector' => 1,
1338 
              'period' => 1,
1339 
              'port_id' => 0,
1340 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
1341 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
1342 
              'timingConstraint' => 'none',
1343 
              'type' => 'UFix_64_0',
1344 
            },
1345 
            'direction' => 'out',
1346 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1347 
            'width' => 64,
1348 
          },
1349 
        },
1350 
      },
1351 
      'entityName' => 'bram_rd_dout',
1352 
    },
1353 
    'bram_wr_addr' => {
1354 
      'connections' => {
1355 
        'bram_wr_addr' => 'sysgen_dut.bram_wr_addr',
1356 
      },
1357 
      'entity' => {
1358 
        'attributes' => {
1359 
          'entityAlreadyNetlisted' => 1,
1360 
          'isGateway' => 1,
1361 
          'is_floating_block' => 1,
1362 
        },
1363 
        'entityName' => 'bram_wr_addr',
1364 
        'ports' => {
1365 
          'bram_wr_addr' => {
1366 
            'attributes' => {
1367 
              'bin_pt' => 0,
1368 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
1369 
              'is_floating_block' => 1,
1370 
              'is_gateway_port' => 1,
1371 
              'must_be_hdl_vector' => 1,
1372 
              'period' => 1,
1373 
              'port_id' => 0,
1374 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
1375 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
1376 
              'timingConstraint' => 'none',
1377 
              'type' => 'UFix_12_0',
1378 
            },
1379 
            'direction' => 'in',
1380 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1381 
            'width' => 12,
1382 
          },
1383 
        },
1384 
      },
1385 
      'entityName' => 'bram_wr_addr',
1386 
    },
1387 
    'bram_wr_din' => {
1388 
      'connections' => {
1389 
        'bram_wr_din' => 'sysgen_dut.bram_wr_din',
1390 
      },
1391 
      'entity' => {
1392 
        'attributes' => {
1393 
          'entityAlreadyNetlisted' => 1,
1394 
          'isGateway' => 1,
1395 
          'is_floating_block' => 1,
1396 
        },
1397 
        'entityName' => 'bram_wr_din',
1398 
        'ports' => {
1399 
          'bram_wr_din' => {
1400 
            'attributes' => {
1401 
              'bin_pt' => 0,
1402 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
1403 
              'is_floating_block' => 1,
1404 
              'is_gateway_port' => 1,
1405 
              'must_be_hdl_vector' => 1,
1406 
              'period' => 1,
1407 
              'port_id' => 0,
1408 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
1409 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
1410 
              'timingConstraint' => 'none',
1411 
              'type' => 'UFix_64_0',
1412 
            },
1413 
            'direction' => 'in',
1414 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1415 
            'width' => 64,
1416 
          },
1417 
        },
1418 
      },
1419 
      'entityName' => 'bram_wr_din',
1420 
    },
1421 
    'bram_wr_en' => {
1422 
      'connections' => {
1423 
        'bram_wr_en' => 'sysgen_dut.bram_wr_en',
1424 
      },
1425 
      'entity' => {
1426 
        'attributes' => {
1427 
          'entityAlreadyNetlisted' => 1,
1428 
          'isGateway' => 1,
1429 
          'is_floating_block' => 1,
1430 
        },
1431 
        'entityName' => 'bram_wr_en',
1432 
        'ports' => {
1433 
          'bram_wr_en' => {
1434 
            'attributes' => {
1435 
              'bin_pt' => 0,
1436 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
1437 
              'is_floating_block' => 1,
1438 
              'is_gateway_port' => 1,
1439 
              'must_be_hdl_vector' => 1,
1440 
              'period' => 1,
1441 
              'port_id' => 0,
1442 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
1443 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
1444 
              'timingConstraint' => 'none',
1445 
              'type' => 'UFix_8_0',
1446 
            },
1447 
            'direction' => 'in',
1448 
            'hdlType' => 'std_logic_vector(7 downto 0)',
1449 
            'width' => 8,
1450 
          },
1451 
        },
1452 
      },
1453 
      'entityName' => 'bram_wr_en',
1454 
    },
1455 
    'fifo_rd_count' => {
1456 
      'connections' => {
1457 
        'fifo_rd_count' => '.fifo_rd_count',
1458 
      },
1459 
      'entity' => {
1460 
        'attributes' => {
1461 
          'entityAlreadyNetlisted' => 1,
1462 
          'isGateway' => 1,
1463 
          'is_floating_block' => 1,
1464 
        },
1465 
        'entityName' => 'fifo_rd_count',
1466 
        'ports' => {
1467 
          'fifo_rd_count' => {
1468 
            'attributes' => {
1469 
              'bin_pt' => 0,
1470 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
1471 
              'is_floating_block' => 1,
1472 
              'is_gateway_port' => 1,
1473 
              'must_be_hdl_vector' => 1,
1474 
              'period' => 1,
1475 
              'port_id' => 0,
1476 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count/FIFO_rd_count',
1477 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count',
1478 
              'timingConstraint' => 'none',
1479 
              'type' => 'UFix_15_0',
1480 
            },
1481 
            'direction' => 'out',
1482 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1483 
            'width' => 15,
1484 
          },
1485 
        },
1486 
      },
1487 
      'entityName' => 'fifo_rd_count',
1488 
    },
1489 
    'fifo_rd_dout' => {
1490 
      'connections' => {
1491 
        'fifo_rd_dout' => '.fifo_rd_dout',
1492 
      },
1493 
      'entity' => {
1494 
        'attributes' => {
1495 
          'entityAlreadyNetlisted' => 1,
1496 
          'isGateway' => 1,
1497 
          'is_floating_block' => 1,
1498 
        },
1499 
        'entityName' => 'fifo_rd_dout',
1500 
        'ports' => {
1501 
          'fifo_rd_dout' => {
1502 
            'attributes' => {
1503 
              'bin_pt' => 0,
1504 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
1505 
              'is_floating_block' => 1,
1506 
              'is_gateway_port' => 1,
1507 
              'must_be_hdl_vector' => 1,
1508 
              'period' => 1,
1509 
              'port_id' => 0,
1510 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
1511 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
1512 
              'timingConstraint' => 'none',
1513 
              'type' => 'UFix_72_0',
1514 
            },
1515 
            'direction' => 'out',
1516 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1517 
            'width' => 72,
1518 
          },
1519 
        },
1520 
      },
1521 
      'entityName' => 'fifo_rd_dout',
1522 
    },
1523 
    'fifo_rd_empty' => {
1524 
      'connections' => {
1525 
        'fifo_rd_empty' => '.fifo_rd_empty',
1526 
      },
1527 
      'entity' => {
1528 
        'attributes' => {
1529 
          'entityAlreadyNetlisted' => 1,
1530 
          'isGateway' => 1,
1531 
          'is_floating_block' => 1,
1532 
        },
1533 
        'entityName' => 'fifo_rd_empty',
1534 
        'ports' => {
1535 
          'fifo_rd_empty' => {
1536 
            'attributes' => {
1537 
              'bin_pt' => 0,
1538 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
1539 
              'is_floating_block' => 1,
1540 
              'is_gateway_port' => 1,
1541 
              'must_be_hdl_vector' => 1,
1542 
              'period' => 1,
1543 
              'port_id' => 0,
1544 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
1545 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
1546 
              'timingConstraint' => 'none',
1547 
              'type' => 'Bool',
1548 
            },
1549 
            'direction' => 'out',
1550 
            'hdlType' => 'std_logic',
1551 
            'width' => 1,
1552 
          },
1553 
        },
1554 
      },
1555 
      'entityName' => 'fifo_rd_empty',
1556 
    },
1557 
    'fifo_rd_en' => {
1558 
      'connections' => {
1559 
        'fifo_rd_en' => 'sysgen_dut.fifo_rd_en',
1560 
      },
1561 
      'entity' => {
1562 
        'attributes' => {
1563 
          'entityAlreadyNetlisted' => 1,
1564 
          'isGateway' => 1,
1565 
          'is_floating_block' => 1,
1566 
        },
1567 
        'entityName' => 'fifo_rd_en',
1568 
        'ports' => {
1569 
          'fifo_rd_en' => {
1570 
            'attributes' => {
1571 
              'bin_pt' => 0,
1572 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
1573 
              'is_floating_block' => 1,
1574 
              'is_gateway_port' => 1,
1575 
              'must_be_hdl_vector' => 1,
1576 
              'period' => 1,
1577 
              'port_id' => 0,
1578 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
1579 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
1580 
              'timingConstraint' => 'none',
1581 
              'type' => 'Bool',
1582 
            },
1583 
            'direction' => 'in',
1584 
            'hdlType' => 'std_logic',
1585 
            'width' => 1,
1586 
          },
1587 
        },
1588 
      },
1589 
      'entityName' => 'fifo_rd_en',
1590 
    },
1591 
    'fifo_rd_pempty' => {
1592 
      'connections' => {
1593 
        'fifo_rd_pempty' => '.fifo_rd_pempty',
1594 
      },
1595 
      'entity' => {
1596 
        'attributes' => {
1597 
          'entityAlreadyNetlisted' => 1,
1598 
          'isGateway' => 1,
1599 
          'is_floating_block' => 1,
1600 
        },
1601 
        'entityName' => 'fifo_rd_pempty',
1602 
        'ports' => {
1603 
          'fifo_rd_pempty' => {
1604 
            'attributes' => {
1605 
              'bin_pt' => 0,
1606 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
1607 
              'is_floating_block' => 1,
1608 
              'is_gateway_port' => 1,
1609 
              'must_be_hdl_vector' => 1,
1610 
              'period' => 1,
1611 
              'port_id' => 0,
1612 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty/FIFO_rd_pempty',
1613 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty',
1614 
              'timingConstraint' => 'none',
1615 
              'type' => 'Bool',
1616 
            },
1617 
            'direction' => 'out',
1618 
            'hdlType' => 'std_logic',
1619 
            'width' => 1,
1620 
          },
1621 
        },
1622 
      },
1623 
      'entityName' => 'fifo_rd_pempty',
1624 
    },
1625 
    'fifo_rd_valid' => {
1626 
      'connections' => {
1627 
        'fifo_rd_valid' => '.fifo_rd_valid',
1628 
      },
1629 
      'entity' => {
1630 
        'attributes' => {
1631 
          'entityAlreadyNetlisted' => 1,
1632 
          'isGateway' => 1,
1633 
          'is_floating_block' => 1,
1634 
        },
1635 
        'entityName' => 'fifo_rd_valid',
1636 
        'ports' => {
1637 
          'fifo_rd_valid' => {
1638 
            'attributes' => {
1639 
              'bin_pt' => 0,
1640 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
1641 
              'is_floating_block' => 1,
1642 
              'is_gateway_port' => 1,
1643 
              'must_be_hdl_vector' => 1,
1644 
              'period' => 1,
1645 
              'port_id' => 0,
1646 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
1647 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
1648 
              'timingConstraint' => 'none',
1649 
              'type' => 'Bool',
1650 
            },
1651 
            'direction' => 'out',
1652 
            'hdlType' => 'std_logic',
1653 
            'width' => 1,
1654 
          },
1655 
        },
1656 
      },
1657 
      'entityName' => 'fifo_rd_valid',
1658 
    },
1659 
    'fifo_wr_count' => {
1660 
      'connections' => {
1661 
        'fifo_wr_count' => '.fifo_wr_count',
1662 
      },
1663 
      'entity' => {
1664 
        'attributes' => {
1665 
          'entityAlreadyNetlisted' => 1,
1666 
          'isGateway' => 1,
1667 
          'is_floating_block' => 1,
1668 
        },
1669 
        'entityName' => 'fifo_wr_count',
1670 
        'ports' => {
1671 
          'fifo_wr_count' => {
1672 
            'attributes' => {
1673 
              'bin_pt' => 0,
1674 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
1675 
              'is_floating_block' => 1,
1676 
              'is_gateway_port' => 1,
1677 
              'must_be_hdl_vector' => 1,
1678 
              'period' => 1,
1679 
              'port_id' => 0,
1680 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count/FIFO_wr_count',
1681 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count',
1682 
              'timingConstraint' => 'none',
1683 
              'type' => 'UFix_15_0',
1684 
            },
1685 
            'direction' => 'out',
1686 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1687 
            'width' => 15,
1688 
          },
1689 
        },
1690 
      },
1691 
      'entityName' => 'fifo_wr_count',
1692 
    },
1693 
    'fifo_wr_din' => {
1694 
      'connections' => {
1695 
        'fifo_wr_din' => 'sysgen_dut.fifo_wr_din',
1696 
      },
1697 
      'entity' => {
1698 
        'attributes' => {
1699 
          'entityAlreadyNetlisted' => 1,
1700 
          'isGateway' => 1,
1701 
          'is_floating_block' => 1,
1702 
        },
1703 
        'entityName' => 'fifo_wr_din',
1704 
        'ports' => {
1705 
          'fifo_wr_din' => {
1706 
            'attributes' => {
1707 
              'bin_pt' => 0,
1708 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
1709 
              'is_floating_block' => 1,
1710 
              'is_gateway_port' => 1,
1711 
              'must_be_hdl_vector' => 1,
1712 
              'period' => 1,
1713 
              'port_id' => 0,
1714 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
1715 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
1716 
              'timingConstraint' => 'none',
1717 
              'type' => 'UFix_72_0',
1718 
            },
1719 
            'direction' => 'in',
1720 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1721 
            'width' => 72,
1722 
          },
1723 
        },
1724 
      },
1725 
      'entityName' => 'fifo_wr_din',
1726 
    },
1727 
    'fifo_wr_en' => {
1728 
      'connections' => {
1729 
        'fifo_wr_en' => 'sysgen_dut.fifo_wr_en',
1730 
      },
1731 
      'entity' => {
1732 
        'attributes' => {
1733 
          'entityAlreadyNetlisted' => 1,
1734 
          'isGateway' => 1,
1735 
          'is_floating_block' => 1,
1736 
        },
1737 
        'entityName' => 'fifo_wr_en',
1738 
        'ports' => {
1739 
          'fifo_wr_en' => {
1740 
            'attributes' => {
1741 
              'bin_pt' => 0,
1742 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
1743 
              'is_floating_block' => 1,
1744 
              'is_gateway_port' => 1,
1745 
              'must_be_hdl_vector' => 1,
1746 
              'period' => 1,
1747 
              'port_id' => 0,
1748 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
1749 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
1750 
              'timingConstraint' => 'none',
1751 
              'type' => 'Bool',
1752 
            },
1753 
            'direction' => 'in',
1754 
            'hdlType' => 'std_logic',
1755 
            'width' => 1,
1756 
          },
1757 
        },
1758 
      },
1759 
      'entityName' => 'fifo_wr_en',
1760 
    },
1761 
    'fifo_wr_full' => {
1762 
      'connections' => {
1763 
        'fifo_wr_full' => '.fifo_wr_full',
1764 
      },
1765 
      'entity' => {
1766 
        'attributes' => {
1767 
          'entityAlreadyNetlisted' => 1,
1768 
          'isGateway' => 1,
1769 
          'is_floating_block' => 1,
1770 
        },
1771 
        'entityName' => 'fifo_wr_full',
1772 
        'ports' => {
1773 
          'fifo_wr_full' => {
1774 
            'attributes' => {
1775 
              'bin_pt' => 0,
1776 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
1777 
              'is_floating_block' => 1,
1778 
              'is_gateway_port' => 1,
1779 
              'must_be_hdl_vector' => 1,
1780 
              'period' => 1,
1781 
              'port_id' => 0,
1782 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full/FIFO_wr_full',
1783 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full',
1784 
              'timingConstraint' => 'none',
1785 
              'type' => 'Bool',
1786 
            },
1787 
            'direction' => 'out',
1788 
            'hdlType' => 'std_logic',
1789 
            'width' => 1,
1790 
          },
1791 
        },
1792 
      },
1793 
      'entityName' => 'fifo_wr_full',
1794 
    },
1795 
    'fifo_wr_pfull' => {
1796 
      'connections' => {
1797 
        'fifo_wr_pfull' => '.fifo_wr_pfull',
1798 
      },
1799 
      'entity' => {
1800 
        'attributes' => {
1801 
          'entityAlreadyNetlisted' => 1,
1802 
          'isGateway' => 1,
1803 
          'is_floating_block' => 1,
1804 
        },
1805 
        'entityName' => 'fifo_wr_pfull',
1806 
        'ports' => {
1807 
          'fifo_wr_pfull' => {
1808 
            'attributes' => {
1809 
              'bin_pt' => 0,
1810 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
1811 
              'is_floating_block' => 1,
1812 
              'is_gateway_port' => 1,
1813 
              'must_be_hdl_vector' => 1,
1814 
              'period' => 1,
1815 
              'port_id' => 0,
1816 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull/FIFO_wr_pfull',
1817 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull',
1818 
              'timingConstraint' => 'none',
1819 
              'type' => 'Bool',
1820 
            },
1821 
            'direction' => 'out',
1822 
            'hdlType' => 'std_logic',
1823 
            'width' => 1,
1824 
          },
1825 
        },
1826 
      },
1827 
      'entityName' => 'fifo_wr_pfull',
1828 
    },
1829 
    'from_register' => {
1830 
      'connections' => {
1831 
        'data_out' => 'from_register.data_out',
1832 
      },
1833 
      'entity' => {
1834 
        'attributes' => {
1835 
          'entityAlreadyNetlisted' => 1,
1836 
          'generics' => [
1837 
          ],
1838 
          'is_floating_block' => 1,
1839 
          'mask' => {
1840 
            'Block_Handle' => 2395.00048828125,
1841 
            'Block_handle' => 2395.00048828125,
1842 
            'MDL_Handle' => 2083.00048828125,
1843 
            'MDL_handle' => 2083.00048828125,
1844 
            'arith_type' => 2,
1845 
            'bin_pt' => 0,
1846 
            'block_config' => 'sysgen_blockset:fromreg_config',
1847 
            'block_handle' => 2395.00048828125,
1848 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1849 
            'block_type' => 'fromreg',
1850 
            'dbl_ovrd' => 0,
1851 
            'gui_display_data_type' => 1,
1852 
            'init' => 0,
1853 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
1854 
            'mdl_handle' => 2083.00048828125,
1855 
            'model_handle' => 2083.00048828125,
1856 
            'n_bits' => 32,
1857 
            'ownership' => 2,
1858 
            'period' => '5e-009',
1859 
            'preci_type' => 1,
1860 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1861 
            'shared_memory_name' => 'debug1i',
1862 
          },
1863 
          'needs_vhdl_wrapper' => 0,
1864 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1865 
        },
1866 
        'entityName' => 'x_x89',
1867 
        'ports' => {
1868 
          'data_out' => {
1869 
            'attributes' => {
1870 
              'bin_pt' => 0,
1871 
              'is_floating_block' => 1,
1872 
              'must_be_hdl_vector' => 1,
1873 
              'period' => 1,
1874 
              'port_id' => 0,
1875 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
1876 
              'type' => 'UFix_32_0',
1877 
            },
1878 
            'direction' => 'out',
1879 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1880 
            'width' => 32,
1881 
          },
1882 
        },
1883 
      },
1884 
      'entityName' => 'x_x89',
1885 
    },
1886 
    'from_register1' => {
1887 
      'connections' => {
1888 
        'data_out' => 'from_register1.data_out',
1889 
      },
1890 
      'entity' => {
1891 
        'attributes' => {
1892 
          'entityAlreadyNetlisted' => 1,
1893 
          'generics' => [
1894 
          ],
1895 
          'is_floating_block' => 1,
1896 
          'mask' => {
1897 
            'Block_Handle' => 2396.00048828125,
1898 
            'Block_handle' => 2396.00048828125,
1899 
            'MDL_Handle' => 2083.00048828125,
1900 
            'MDL_handle' => 2083.00048828125,
1901 
            'arith_type' => 2,
1902 
            'bin_pt' => 0,
1903 
            'block_config' => 'sysgen_blockset:fromreg_config',
1904 
            'block_handle' => 2396.00048828125,
1905 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1906 
            'block_type' => 'fromreg',
1907 
            'dbl_ovrd' => 0,
1908 
            'gui_display_data_type' => 1,
1909 
            'init' => 0,
1910 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
1911 
            'mdl_handle' => 2083.00048828125,
1912 
            'model_handle' => 2083.00048828125,
1913 
            'n_bits' => 32,
1914 
            'ownership' => 2,
1915 
            'period' => '5e-009',
1916 
            'preci_type' => 1,
1917 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1918 
            'shared_memory_name' => 'debug2i',
1919 
          },
1920 
          'needs_vhdl_wrapper' => 0,
1921 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1922 
        },
1923 
        'entityName' => 'x_x90',
1924 
        'ports' => {
1925 
          'data_out' => {
1926 
            'attributes' => {
1927 
              'bin_pt' => 0,
1928 
              'is_floating_block' => 1,
1929 
              'must_be_hdl_vector' => 1,
1930 
              'period' => 1,
1931 
              'port_id' => 0,
1932 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
1933 
              'type' => 'UFix_32_0',
1934 
            },
1935 
            'direction' => 'out',
1936 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1937 
            'width' => 32,
1938 
          },
1939 
        },
1940 
      },
1941 
      'entityName' => 'x_x90',
1942 
    },
1943 
    'from_register10' => {
1944 
      'connections' => {
1945 
        'data_out' => 'from_register10.data_out',
1946 
      },
1947 
      'entity' => {
1948 
        'attributes' => {
1949 
          'entityAlreadyNetlisted' => 1,
1950 
          'generics' => [
1951 
          ],
1952 
          'is_floating_block' => 1,
1953 
          'mask' => {
1954 
            'Block_Handle' => 2397.00048828125,
1955 
            'Block_handle' => 2397.00048828125,
1956 
            'MDL_Handle' => 2083.00048828125,
1957 
            'MDL_handle' => 2083.00048828125,
1958 
            'arith_type' => 2,
1959 
            'bin_pt' => 0,
1960 
            'block_config' => 'sysgen_blockset:fromreg_config',
1961 
            'block_handle' => 2397.00048828125,
1962 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1963 
            'block_type' => 'fromreg',
1964 
            'dbl_ovrd' => 0,
1965 
            'gui_display_data_type' => 1,
1966 
            'init' => 0,
1967 
            'init_bit_vector' => '\'b0',
1968 
            'mdl_handle' => 2083.00048828125,
1969 
            'model_handle' => 2083.00048828125,
1970 
            'n_bits' => 1,
1971 
            'ownership' => 2,
1972 
            'period' => '5e-009',
1973 
            'preci_type' => 1,
1974 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1975 
            'shared_memory_name' => 'register04tv',
1976 
          },
1977 
          'needs_vhdl_wrapper' => 0,
1978 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1979 
        },
1980 
        'entityName' => 'x_x91',
1981 
        'ports' => {
1982 
          'data_out' => {
1983 
            'attributes' => {
1984 
              'bin_pt' => 0,
1985 
              'is_floating_block' => 1,
1986 
              'must_be_hdl_vector' => 1,
1987 
              'period' => 1,
1988 
              'port_id' => 0,
1989 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
1990 
              'type' => 'UFix_1_0',
1991 
            },
1992 
            'direction' => 'out',
1993 
            'hdlType' => 'std_logic_vector(0 downto 0)',
1994 
            'width' => 1,
1995 
          },
1996 
        },
1997 
      },
1998 
      'entityName' => 'x_x91',
1999 
    },
2000 
    'from_register11' => {
2001 
      'connections' => {
2002 
        'data_out' => 'from_register11.data_out',
2003 
      },
2004 
      'entity' => {
2005 
        'attributes' => {
2006 
          'entityAlreadyNetlisted' => 1,
2007 
          'generics' => [
2008 
          ],
2009 
          'is_floating_block' => 1,
2010 
          'mask' => {
2011 
            'Block_Handle' => 2398.00048828125,
2012 
            'Block_handle' => 2398.00048828125,
2013 
            'MDL_Handle' => 2083.00048828125,
2014 
            'MDL_handle' => 2083.00048828125,
2015 
            'arith_type' => 2,
2016 
            'bin_pt' => 0,
2017 
            'block_config' => 'sysgen_blockset:fromreg_config',
2018 
            'block_handle' => 2398.00048828125,
2019 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
2020 
            'block_type' => 'fromreg',
2021 
            'dbl_ovrd' => 0,
2022 
            'gui_display_data_type' => 1,
2023 
            'init' => 0,
2024 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2025 
            'mdl_handle' => 2083.00048828125,
2026 
            'model_handle' => 2083.00048828125,
2027 
            'n_bits' => 32,
2028 
            'ownership' => 2,
2029 
            'period' => '5e-009',
2030 
            'preci_type' => 1,
2031 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2032 
            'shared_memory_name' => 'register05td',
2033 
          },
2034 
          'needs_vhdl_wrapper' => 0,
2035 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
2036 
        },
2037 
        'entityName' => 'x_x92',
2038 
        'ports' => {
2039 
          'data_out' => {
2040 
            'attributes' => {
2041 
              'bin_pt' => 0,
2042 
              'is_floating_block' => 1,
2043 
              'must_be_hdl_vector' => 1,
2044 
              'period' => 1,
2045 
              'port_id' => 0,
2046 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
2047 
              'type' => 'UFix_32_0',
2048 
            },
2049 
            'direction' => 'out',
2050 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2051 
            'width' => 32,
2052 
          },
2053 
        },
2054 
      },
2055 
      'entityName' => 'x_x92',
2056 
    },
2057 
    'from_register12' => {
2058 
      'connections' => {
2059 
        'data_out' => 'from_register12.data_out',
2060 
      },
2061 
      'entity' => {
2062 
        'attributes' => {
2063 
          'entityAlreadyNetlisted' => 1,
2064 
          'generics' => [
2065 
          ],
2066 
          'is_floating_block' => 1,
2067 
          'mask' => {
2068 
            'Block_Handle' => 2399.00048828125,
2069 
            'Block_handle' => 2399.00048828125,
2070 
            'MDL_Handle' => 2083.00048828125,
2071 
            'MDL_handle' => 2083.00048828125,
2072 
            'arith_type' => 2,
2073 
            'bin_pt' => 0,
2074 
            'block_config' => 'sysgen_blockset:fromreg_config',
2075 
            'block_handle' => 2399.00048828125,
2076 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2077 
            'block_type' => 'fromreg',
2078 
            'dbl_ovrd' => 0,
2079 
            'gui_display_data_type' => 1,
2080 
            'init' => 0,
2081 
            'init_bit_vector' => '\'b0',
2082 
            'mdl_handle' => 2083.00048828125,
2083 
            'model_handle' => 2083.00048828125,
2084 
            'n_bits' => 1,
2085 
            'ownership' => 2,
2086 
            'period' => '5e-009',
2087 
            'preci_type' => 1,
2088 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2089 
            'shared_memory_name' => 'register05tv',
2090 
          },
2091 
          'needs_vhdl_wrapper' => 0,
2092 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2093 
        },
2094 
        'entityName' => 'x_x93',
2095 
        'ports' => {
2096 
          'data_out' => {
2097 
            'attributes' => {
2098 
              'bin_pt' => 0,
2099 
              'is_floating_block' => 1,
2100 
              'must_be_hdl_vector' => 1,
2101 
              'period' => 1,
2102 
              'port_id' => 0,
2103 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
2104 
              'type' => 'UFix_1_0',
2105 
            },
2106 
            'direction' => 'out',
2107 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2108 
            'width' => 1,
2109 
          },
2110 
        },
2111 
      },
2112 
      'entityName' => 'x_x93',
2113 
    },
2114 
    'from_register13' => {
2115 
      'connections' => {
2116 
        'data_out' => 'from_register13.data_out',
2117 
      },
2118 
      'entity' => {
2119 
        'attributes' => {
2120 
          'entityAlreadyNetlisted' => 1,
2121 
          'generics' => [
2122 
          ],
2123 
          'is_floating_block' => 1,
2124 
          'mask' => {
2125 
            'Block_Handle' => 2400.00048828125,
2126 
            'Block_handle' => 2400.00048828125,
2127 
            'MDL_Handle' => 2083.00048828125,
2128 
            'MDL_handle' => 2083.00048828125,
2129 
            'arith_type' => 2,
2130 
            'bin_pt' => 0,
2131 
            'block_config' => 'sysgen_blockset:fromreg_config',
2132 
            'block_handle' => 2400.00048828125,
2133 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2134 
            'block_type' => 'fromreg',
2135 
            'dbl_ovrd' => 0,
2136 
            'gui_display_data_type' => 1,
2137 
            'init' => 0,
2138 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2139 
            'mdl_handle' => 2083.00048828125,
2140 
            'model_handle' => 2083.00048828125,
2141 
            'n_bits' => 32,
2142 
            'ownership' => 2,
2143 
            'period' => '5e-009',
2144 
            'preci_type' => 1,
2145 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2146 
            'shared_memory_name' => 'register06td',
2147 
          },
2148 
          'needs_vhdl_wrapper' => 0,
2149 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2150 
        },
2151 
        'entityName' => 'x_x94',
2152 
        'ports' => {
2153 
          'data_out' => {
2154 
            'attributes' => {
2155 
              'bin_pt' => 0,
2156 
              'is_floating_block' => 1,
2157 
              'must_be_hdl_vector' => 1,
2158 
              'period' => 1,
2159 
              'port_id' => 0,
2160 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
2161 
              'type' => 'UFix_32_0',
2162 
            },
2163 
            'direction' => 'out',
2164 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2165 
            'width' => 32,
2166 
          },
2167 
        },
2168 
      },
2169 
      'entityName' => 'x_x94',
2170 
    },
2171 
    'from_register14' => {
2172 
      'connections' => {
2173 
        'data_out' => 'from_register14.data_out',
2174 
      },
2175 
      'entity' => {
2176 
        'attributes' => {
2177 
          'entityAlreadyNetlisted' => 1,
2178 
          'generics' => [
2179 
          ],
2180 
          'is_floating_block' => 1,
2181 
          'mask' => {
2182 
            'Block_Handle' => 2401.00048828125,
2183 
            'Block_handle' => 2401.00048828125,
2184 
            'MDL_Handle' => 2083.00048828125,
2185 
            'MDL_handle' => 2083.00048828125,
2186 
            'arith_type' => 2,
2187 
            'bin_pt' => 0,
2188 
            'block_config' => 'sysgen_blockset:fromreg_config',
2189 
            'block_handle' => 2401.00048828125,
2190 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2191 
            'block_type' => 'fromreg',
2192 
            'dbl_ovrd' => 0,
2193 
            'gui_display_data_type' => 1,
2194 
            'init' => 0,
2195 
            'init_bit_vector' => '\'b0',
2196 
            'mdl_handle' => 2083.00048828125,
2197 
            'model_handle' => 2083.00048828125,
2198 
            'n_bits' => 1,
2199 
            'ownership' => 2,
2200 
            'period' => '5e-009',
2201 
            'preci_type' => 1,
2202 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2203 
            'shared_memory_name' => 'register06tv',
2204 
          },
2205 
          'needs_vhdl_wrapper' => 0,
2206 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2207 
        },
2208 
        'entityName' => 'x_x95',
2209 
        'ports' => {
2210 
          'data_out' => {
2211 
            'attributes' => {
2212 
              'bin_pt' => 0,
2213 
              'is_floating_block' => 1,
2214 
              'must_be_hdl_vector' => 1,
2215 
              'period' => 1,
2216 
              'port_id' => 0,
2217 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
2218 
              'type' => 'UFix_1_0',
2219 
            },
2220 
            'direction' => 'out',
2221 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2222 
            'width' => 1,
2223 
          },
2224 
        },
2225 
      },
2226 
      'entityName' => 'x_x95',
2227 
    },
2228 
    'from_register15' => {
2229 
      'connections' => {
2230 
        'data_out' => 'from_register15.data_out',
2231 
      },
2232 
      'entity' => {
2233 
        'attributes' => {
2234 
          'entityAlreadyNetlisted' => 1,
2235 
          'generics' => [
2236 
          ],
2237 
          'is_floating_block' => 1,
2238 
          'mask' => {
2239 
            'Block_Handle' => 2402.00048828125,
2240 
            'Block_handle' => 2402.00048828125,
2241 
            'MDL_Handle' => 2083.00048828125,
2242 
            'MDL_handle' => 2083.00048828125,
2243 
            'arith_type' => 2,
2244 
            'bin_pt' => 0,
2245 
            'block_config' => 'sysgen_blockset:fromreg_config',
2246 
            'block_handle' => 2402.00048828125,
2247 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2248 
            'block_type' => 'fromreg',
2249 
            'dbl_ovrd' => 0,
2250 
            'gui_display_data_type' => 1,
2251 
            'init' => 0,
2252 
            'init_bit_vector' => '\'b0',
2253 
            'mdl_handle' => 2083.00048828125,
2254 
            'model_handle' => 2083.00048828125,
2255 
            'n_bits' => 1,
2256 
            'ownership' => 2,
2257 
            'period' => '5e-009',
2258 
            'preci_type' => 1,
2259 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2260 
            'shared_memory_name' => 'DMA_Host2Board_Done',
2261 
          },
2262 
          'needs_vhdl_wrapper' => 0,
2263 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2264 
        },
2265 
        'entityName' => 'x_x96',
2266 
        'ports' => {
2267 
          'data_out' => {
2268 
            'attributes' => {
2269 
              'bin_pt' => 0,
2270 
              'is_floating_block' => 1,
2271 
              'must_be_hdl_vector' => 1,
2272 
              'period' => 1,
2273 
              'port_id' => 0,
2274 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
2275 
              'type' => 'UFix_1_0',
2276 
            },
2277 
            'direction' => 'out',
2278 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2279 
            'width' => 1,
2280 
          },
2281 
        },
2282 
      },
2283 
      'entityName' => 'x_x96',
2284 
    },
2285 
    'from_register16' => {
2286 
      'connections' => {
2287 
        'data_out' => 'from_register16.data_out',
2288 
      },
2289 
      'entity' => {
2290 
        'attributes' => {
2291 
          'entityAlreadyNetlisted' => 1,
2292 
          'generics' => [
2293 
          ],
2294 
          'is_floating_block' => 1,
2295 
          'mask' => {
2296 
            'Block_Handle' => 2403.00048828125,
2297 
            'Block_handle' => 2403.00048828125,
2298 
            'MDL_Handle' => 2083.00048828125,
2299 
            'MDL_handle' => 2083.00048828125,
2300 
            'arith_type' => 2,
2301 
            'bin_pt' => 0,
2302 
            'block_config' => 'sysgen_blockset:fromreg_config',
2303 
            'block_handle' => 2403.00048828125,
2304 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2305 
            'block_type' => 'fromreg',
2306 
            'dbl_ovrd' => 0,
2307 
            'gui_display_data_type' => 1,
2308 
            'init' => 0,
2309 
            'init_bit_vector' => '\'b0',
2310 
            'mdl_handle' => 2083.00048828125,
2311 
            'model_handle' => 2083.00048828125,
2312 
            'n_bits' => 1,
2313 
            'ownership' => 2,
2314 
            'period' => '5e-009',
2315 
            'preci_type' => 1,
2316 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2317 
            'shared_memory_name' => 'DMA_Host2Board_Busy',
2318 
          },
2319 
          'needs_vhdl_wrapper' => 0,
2320 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2321 
        },
2322 
        'entityName' => 'x_x97',
2323 
        'ports' => {
2324 
          'data_out' => {
2325 
            'attributes' => {
2326 
              'bin_pt' => 0,
2327 
              'is_floating_block' => 1,
2328 
              'must_be_hdl_vector' => 1,
2329 
              'period' => 1,
2330 
              'port_id' => 0,
2331 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
2332 
              'type' => 'UFix_1_0',
2333 
            },
2334 
            'direction' => 'out',
2335 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2336 
            'width' => 1,
2337 
          },
2338 
        },
2339 
      },
2340 
      'entityName' => 'x_x97',
2341 
    },
2342 
    'from_register17' => {
2343 
      'connections' => {
2344 
        'data_out' => 'from_register17.data_out',
2345 
      },
2346 
      'entity' => {
2347 
        'attributes' => {
2348 
          'entityAlreadyNetlisted' => 1,
2349 
          'generics' => [
2350 
          ],
2351 
          'is_floating_block' => 1,
2352 
          'mask' => {
2353 
            'Block_Handle' => 2404.00048828125,
2354 
            'Block_handle' => 2404.00048828125,
2355 
            'MDL_Handle' => 2083.00048828125,
2356 
            'MDL_handle' => 2083.00048828125,
2357 
            'arith_type' => 2,
2358 
            'bin_pt' => 0,
2359 
            'block_config' => 'sysgen_blockset:fromreg_config',
2360 
            'block_handle' => 2404.00048828125,
2361 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2362 
            'block_type' => 'fromreg',
2363 
            'dbl_ovrd' => 0,
2364 
            'gui_display_data_type' => 1,
2365 
            'init' => 0,
2366 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2367 
            'mdl_handle' => 2083.00048828125,
2368 
            'model_handle' => 2083.00048828125,
2369 
            'n_bits' => 32,
2370 
            'ownership' => 2,
2371 
            'period' => '5e-009',
2372 
            'preci_type' => 1,
2373 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2374 
            'shared_memory_name' => 'register07td',
2375 
          },
2376 
          'needs_vhdl_wrapper' => 0,
2377 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2378 
        },
2379 
        'entityName' => 'x_x98',
2380 
        'ports' => {
2381 
          'data_out' => {
2382 
            'attributes' => {
2383 
              'bin_pt' => 0,
2384 
              'is_floating_block' => 1,
2385 
              'must_be_hdl_vector' => 1,
2386 
              'period' => 1,
2387 
              'port_id' => 0,
2388 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
2389 
              'type' => 'UFix_32_0',
2390 
            },
2391 
            'direction' => 'out',
2392 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2393 
            'width' => 32,
2394 
          },
2395 
        },
2396 
      },
2397 
      'entityName' => 'x_x98',
2398 
    },
2399 
    'from_register18' => {
2400 
      'connections' => {
2401 
        'data_out' => 'from_register18.data_out',
2402 
      },
2403 
      'entity' => {
2404 
        'attributes' => {
2405 
          'entityAlreadyNetlisted' => 1,
2406 
          'generics' => [
2407 
          ],
2408 
          'is_floating_block' => 1,
2409 
          'mask' => {
2410 
            'Block_Handle' => 2405.00048828125,
2411 
            'Block_handle' => 2405.00048828125,
2412 
            'MDL_Handle' => 2083.00048828125,
2413 
            'MDL_handle' => 2083.00048828125,
2414 
            'arith_type' => 2,
2415 
            'bin_pt' => 0,
2416 
            'block_config' => 'sysgen_blockset:fromreg_config',
2417 
            'block_handle' => 2405.00048828125,
2418 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2419 
            'block_type' => 'fromreg',
2420 
            'dbl_ovrd' => 0,
2421 
            'gui_display_data_type' => 1,
2422 
            'init' => 0,
2423 
            'init_bit_vector' => '\'b0',
2424 
            'mdl_handle' => 2083.00048828125,
2425 
            'model_handle' => 2083.00048828125,
2426 
            'n_bits' => 1,
2427 
            'ownership' => 2,
2428 
            'period' => '5e-009',
2429 
            'preci_type' => 1,
2430 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2431 
            'shared_memory_name' => 'register07tv',
2432 
          },
2433 
          'needs_vhdl_wrapper' => 0,
2434 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2435 
        },
2436 
        'entityName' => 'x_x99',
2437 
        'ports' => {
2438 
          'data_out' => {
2439 
            'attributes' => {
2440 
              'bin_pt' => 0,
2441 
              'is_floating_block' => 1,
2442 
              'must_be_hdl_vector' => 1,
2443 
              'period' => 1,
2444 
              'port_id' => 0,
2445 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
2446 
              'type' => 'UFix_1_0',
2447 
            },
2448 
            'direction' => 'out',
2449 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2450 
            'width' => 1,
2451 
          },
2452 
        },
2453 
      },
2454 
      'entityName' => 'x_x99',
2455 
    },
2456 
    'from_register19' => {
2457 
      'connections' => {
2458 
        'data_out' => 'from_register19.data_out',
2459 
      },
2460 
      'entity' => {
2461 
        'attributes' => {
2462 
          'entityAlreadyNetlisted' => 1,
2463 
          'generics' => [
2464 
          ],
2465 
          'is_floating_block' => 1,
2466 
          'mask' => {
2467 
            'Block_Handle' => 2406.00048828125,
2468 
            'Block_handle' => 2406.00048828125,
2469 
            'MDL_Handle' => 2083.00048828125,
2470 
            'MDL_handle' => 2083.00048828125,
2471 
            'arith_type' => 2,
2472 
            'bin_pt' => 0,
2473 
            'block_config' => 'sysgen_blockset:fromreg_config',
2474 
            'block_handle' => 2406.00048828125,
2475 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2476 
            'block_type' => 'fromreg',
2477 
            'dbl_ovrd' => 0,
2478 
            'gui_display_data_type' => 1,
2479 
            'init' => 0,
2480 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2481 
            'mdl_handle' => 2083.00048828125,
2482 
            'model_handle' => 2083.00048828125,
2483 
            'n_bits' => 32,
2484 
            'ownership' => 2,
2485 
            'period' => '5e-009',
2486 
            'preci_type' => 1,
2487 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2488 
            'shared_memory_name' => 'debug4i',
2489 
          },
2490 
          'needs_vhdl_wrapper' => 0,
2491 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2492 
        },
2493 
        'entityName' => 'x_x100',
2494 
        'ports' => {
2495 
          'data_out' => {
2496 
            'attributes' => {
2497 
              'bin_pt' => 0,
2498 
              'is_floating_block' => 1,
2499 
              'must_be_hdl_vector' => 1,
2500 
              'period' => 1,
2501 
              'port_id' => 0,
2502 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
2503 
              'type' => 'UFix_32_0',
2504 
            },
2505 
            'direction' => 'out',
2506 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2507 
            'width' => 32,
2508 
          },
2509 
        },
2510 
      },
2511 
      'entityName' => 'x_x100',
2512 
    },
2513 
    'from_register2' => {
2514 
      'connections' => {
2515 
        'data_out' => 'from_register2.data_out',
2516 
      },
2517 
      'entity' => {
2518 
        'attributes' => {
2519 
          'entityAlreadyNetlisted' => 1,
2520 
          'generics' => [
2521 
          ],
2522 
          'is_floating_block' => 1,
2523 
          'mask' => {
2524 
            'Block_Handle' => 2407.00048828125,
2525 
            'Block_handle' => 2407.00048828125,
2526 
            'MDL_Handle' => 2083.00048828125,
2527 
            'MDL_handle' => 2083.00048828125,
2528 
            'arith_type' => 2,
2529 
            'bin_pt' => 0,
2530 
            'block_config' => 'sysgen_blockset:fromreg_config',
2531 
            'block_handle' => 2407.00048828125,
2532 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2533 
            'block_type' => 'fromreg',
2534 
            'dbl_ovrd' => 0,
2535 
            'gui_display_data_type' => 1,
2536 
            'init' => 0,
2537 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2538 
            'mdl_handle' => 2083.00048828125,
2539 
            'model_handle' => 2083.00048828125,
2540 
            'n_bits' => 32,
2541 
            'ownership' => 2,
2542 
            'period' => '5e-009',
2543 
            'preci_type' => 1,
2544 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2545 
            'shared_memory_name' => 'debug3i',
2546 
          },
2547 
          'needs_vhdl_wrapper' => 0,
2548 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2549 
        },
2550 
        'entityName' => 'x_x101',
2551 
        'ports' => {
2552 
          'data_out' => {
2553 
            'attributes' => {
2554 
              'bin_pt' => 0,
2555 
              'is_floating_block' => 1,
2556 
              'must_be_hdl_vector' => 1,
2557 
              'period' => 1,
2558 
              'port_id' => 0,
2559 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
2560 
              'type' => 'UFix_32_0',
2561 
            },
2562 
            'direction' => 'out',
2563 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2564 
            'width' => 32,
2565 
          },
2566 
        },
2567 
      },
2568 
      'entityName' => 'x_x101',
2569 
    },
2570 
    'from_register20' => {
2571 
      'connections' => {
2572 
        'data_out' => 'from_register20.data_out',
2573 
      },
2574 
      'entity' => {
2575 
        'attributes' => {
2576 
          'entityAlreadyNetlisted' => 1,
2577 
          'generics' => [
2578 
          ],
2579 
          'is_floating_block' => 1,
2580 
          'mask' => {
2581 
            'Block_Handle' => 2408.00048828125,
2582 
            'Block_handle' => 2408.00048828125,
2583 
            'MDL_Handle' => 2083.00048828125,
2584 
            'MDL_handle' => 2083.00048828125,
2585 
            'arith_type' => 2,
2586 
            'bin_pt' => 0,
2587 
            'block_config' => 'sysgen_blockset:fromreg_config',
2588 
            'block_handle' => 2408.00048828125,
2589 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2590 
            'block_type' => 'fromreg',
2591 
            'dbl_ovrd' => 0,
2592 
            'gui_display_data_type' => 1,
2593 
            'init' => 0,
2594 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2595 
            'mdl_handle' => 2083.00048828125,
2596 
            'model_handle' => 2083.00048828125,
2597 
            'n_bits' => 32,
2598 
            'ownership' => 2,
2599 
            'period' => '5e-009',
2600 
            'preci_type' => 1,
2601 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2602 
            'shared_memory_name' => 'register08td',
2603 
          },
2604 
          'needs_vhdl_wrapper' => 0,
2605 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2606 
        },
2607 
        'entityName' => 'x_x102',
2608 
        'ports' => {
2609 
          'data_out' => {
2610 
            'attributes' => {
2611 
              'bin_pt' => 0,
2612 
              'is_floating_block' => 1,
2613 
              'must_be_hdl_vector' => 1,
2614 
              'period' => 1,
2615 
              'port_id' => 0,
2616 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
2617 
              'type' => 'UFix_32_0',
2618 
            },
2619 
            'direction' => 'out',
2620 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2621 
            'width' => 32,
2622 
          },
2623 
        },
2624 
      },
2625 
      'entityName' => 'x_x102',
2626 
    },
2627 
    'from_register21' => {
2628 
      'connections' => {
2629 
        'data_out' => 'from_register21.data_out',
2630 
      },
2631 
      'entity' => {
2632 
        'attributes' => {
2633 
          'entityAlreadyNetlisted' => 1,
2634 
          'generics' => [
2635 
          ],
2636 
          'is_floating_block' => 1,
2637 
          'mask' => {
2638 
            'Block_Handle' => 2409.00048828125,
2639 
            'Block_handle' => 2409.00048828125,
2640 
            'MDL_Handle' => 2083.00048828125,
2641 
            'MDL_handle' => 2083.00048828125,
2642 
            'arith_type' => 2,
2643 
            'bin_pt' => 0,
2644 
            'block_config' => 'sysgen_blockset:fromreg_config',
2645 
            'block_handle' => 2409.00048828125,
2646 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2647 
            'block_type' => 'fromreg',
2648 
            'dbl_ovrd' => 0,
2649 
            'gui_display_data_type' => 1,
2650 
            'init' => 0,
2651 
            'init_bit_vector' => '\'b0',
2652 
            'mdl_handle' => 2083.00048828125,
2653 
            'model_handle' => 2083.00048828125,
2654 
            'n_bits' => 1,
2655 
            'ownership' => 2,
2656 
            'period' => '5e-009',
2657 
            'preci_type' => 1,
2658 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2659 
            'shared_memory_name' => 'register08tv',
2660 
          },
2661 
          'needs_vhdl_wrapper' => 0,
2662 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2663 
        },
2664 
        'entityName' => 'x_x103',
2665 
        'ports' => {
2666 
          'data_out' => {
2667 
            'attributes' => {
2668 
              'bin_pt' => 0,
2669 
              'is_floating_block' => 1,
2670 
              'must_be_hdl_vector' => 1,
2671 
              'period' => 1,
2672 
              'port_id' => 0,
2673 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
2674 
              'type' => 'UFix_1_0',
2675 
            },
2676 
            'direction' => 'out',
2677 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2678 
            'width' => 1,
2679 
          },
2680 
        },
2681 
      },
2682 
      'entityName' => 'x_x103',
2683 
    },
2684 
    'from_register22' => {
2685 
      'connections' => {
2686 
        'data_out' => 'from_register22.data_out',
2687 
      },
2688 
      'entity' => {
2689 
        'attributes' => {
2690 
          'entityAlreadyNetlisted' => 1,
2691 
          'generics' => [
2692 
          ],
2693 
          'is_floating_block' => 1,
2694 
          'mask' => {
2695 
            'Block_Handle' => 2410.00048828125,
2696 
            'Block_handle' => 2410.00048828125,
2697 
            'MDL_Handle' => 2083.00048828125,
2698 
            'MDL_handle' => 2083.00048828125,
2699 
            'arith_type' => 2,
2700 
            'bin_pt' => 0,
2701 
            'block_config' => 'sysgen_blockset:fromreg_config',
2702 
            'block_handle' => 2410.00048828125,
2703 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2704 
            'block_type' => 'fromreg',
2705 
            'dbl_ovrd' => 0,
2706 
            'gui_display_data_type' => 1,
2707 
            'init' => 0,
2708 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2709 
            'mdl_handle' => 2083.00048828125,
2710 
            'model_handle' => 2083.00048828125,
2711 
            'n_bits' => 32,
2712 
            'ownership' => 2,
2713 
            'period' => '5e-009',
2714 
            'preci_type' => 1,
2715 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2716 
            'shared_memory_name' => 'register09td',
2717 
          },
2718 
          'needs_vhdl_wrapper' => 0,
2719 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2720 
        },
2721 
        'entityName' => 'x_x104',
2722 
        'ports' => {
2723 
          'data_out' => {
2724 
            'attributes' => {
2725 
              'bin_pt' => 0,
2726 
              'is_floating_block' => 1,
2727 
              'must_be_hdl_vector' => 1,
2728 
              'period' => 1,
2729 
              'port_id' => 0,
2730 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
2731 
              'type' => 'UFix_32_0',
2732 
            },
2733 
            'direction' => 'out',
2734 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2735 
            'width' => 32,
2736 
          },
2737 
        },
2738 
      },
2739 
      'entityName' => 'x_x104',
2740 
    },
2741 
    'from_register23' => {
2742 
      'connections' => {
2743 
        'data_out' => 'from_register23.data_out',
2744 
      },
2745 
      'entity' => {
2746 
        'attributes' => {
2747 
          'entityAlreadyNetlisted' => 1,
2748 
          'generics' => [
2749 
          ],
2750 
          'is_floating_block' => 1,
2751 
          'mask' => {
2752 
            'Block_Handle' => 2411.00048828125,
2753 
            'Block_handle' => 2411.00048828125,
2754 
            'MDL_Handle' => 2083.00048828125,
2755 
            'MDL_handle' => 2083.00048828125,
2756 
            'arith_type' => 2,
2757 
            'bin_pt' => 0,
2758 
            'block_config' => 'sysgen_blockset:fromreg_config',
2759 
            'block_handle' => 2411.00048828125,
2760 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2761 
            'block_type' => 'fromreg',
2762 
            'dbl_ovrd' => 0,
2763 
            'gui_display_data_type' => 1,
2764 
            'init' => 0,
2765 
            'init_bit_vector' => '\'b0',
2766 
            'mdl_handle' => 2083.00048828125,
2767 
            'model_handle' => 2083.00048828125,
2768 
            'n_bits' => 1,
2769 
            'ownership' => 2,
2770 
            'period' => '5e-009',
2771 
            'preci_type' => 1,
2772 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2773 
            'shared_memory_name' => 'register09tv',
2774 
          },
2775 
          'needs_vhdl_wrapper' => 0,
2776 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2777 
        },
2778 
        'entityName' => 'x_x105',
2779 
        'ports' => {
2780 
          'data_out' => {
2781 
            'attributes' => {
2782 
              'bin_pt' => 0,
2783 
              'is_floating_block' => 1,
2784 
              'must_be_hdl_vector' => 1,
2785 
              'period' => 1,
2786 
              'port_id' => 0,
2787 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
2788 
              'type' => 'UFix_1_0',
2789 
            },
2790 
            'direction' => 'out',
2791 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2792 
            'width' => 1,
2793 
          },
2794 
        },
2795 
      },
2796 
      'entityName' => 'x_x105',
2797 
    },
2798 
    'from_register24' => {
2799 
      'connections' => {
2800 
        'data_out' => 'from_register24.data_out',
2801 
      },
2802 
      'entity' => {
2803 
        'attributes' => {
2804 
          'entityAlreadyNetlisted' => 1,
2805 
          'generics' => [
2806 
          ],
2807 
          'is_floating_block' => 1,
2808 
          'mask' => {
2809 
            'Block_Handle' => 2412.00048828125,
2810 
            'Block_handle' => 2412.00048828125,
2811 
            'MDL_Handle' => 2083.00048828125,
2812 
            'MDL_handle' => 2083.00048828125,
2813 
            'arith_type' => 2,
2814 
            'bin_pt' => 0,
2815 
            'block_config' => 'sysgen_blockset:fromreg_config',
2816 
            'block_handle' => 2412.00048828125,
2817 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2818 
            'block_type' => 'fromreg',
2819 
            'dbl_ovrd' => 0,
2820 
            'gui_display_data_type' => 1,
2821 
            'init' => 0,
2822 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2823 
            'mdl_handle' => 2083.00048828125,
2824 
            'model_handle' => 2083.00048828125,
2825 
            'n_bits' => 32,
2826 
            'ownership' => 2,
2827 
            'period' => '5e-009',
2828 
            'preci_type' => 1,
2829 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2830 
            'shared_memory_name' => 'register10td',
2831 
          },
2832 
          'needs_vhdl_wrapper' => 0,
2833 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2834 
        },
2835 
        'entityName' => 'x_x106',
2836 
        'ports' => {
2837 
          'data_out' => {
2838 
            'attributes' => {
2839 
              'bin_pt' => 0,
2840 
              'is_floating_block' => 1,
2841 
              'must_be_hdl_vector' => 1,
2842 
              'period' => 1,
2843 
              'port_id' => 0,
2844 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
2845 
              'type' => 'UFix_32_0',
2846 
            },
2847 
            'direction' => 'out',
2848 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2849 
            'width' => 32,
2850 
          },
2851 
        },
2852 
      },
2853 
      'entityName' => 'x_x106',
2854 
    },
2855 
    'from_register25' => {
2856 
      'connections' => {
2857 
        'data_out' => 'from_register25.data_out',
2858 
      },
2859 
      'entity' => {
2860 
        'attributes' => {
2861 
          'entityAlreadyNetlisted' => 1,
2862 
          'generics' => [
2863 
          ],
2864 
          'is_floating_block' => 1,
2865 
          'mask' => {
2866 
            'Block_Handle' => 2413.00048828125,
2867 
            'Block_handle' => 2413.00048828125,
2868 
            'MDL_Handle' => 2083.00048828125,
2869 
            'MDL_handle' => 2083.00048828125,
2870 
            'arith_type' => 2,
2871 
            'bin_pt' => 0,
2872 
            'block_config' => 'sysgen_blockset:fromreg_config',
2873 
            'block_handle' => 2413.00048828125,
2874 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2875 
            'block_type' => 'fromreg',
2876 
            'dbl_ovrd' => 0,
2877 
            'gui_display_data_type' => 1,
2878 
            'init' => 0,
2879 
            'init_bit_vector' => '\'b0',
2880 
            'mdl_handle' => 2083.00048828125,
2881 
            'model_handle' => 2083.00048828125,
2882 
            'n_bits' => 1,
2883 
            'ownership' => 2,
2884 
            'period' => '5e-009',
2885 
            'preci_type' => 1,
2886 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2887 
            'shared_memory_name' => 'register10tv',
2888 
          },
2889 
          'needs_vhdl_wrapper' => 0,
2890 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2891 
        },
2892 
        'entityName' => 'x_x107',
2893 
        'ports' => {
2894 
          'data_out' => {
2895 
            'attributes' => {
2896 
              'bin_pt' => 0,
2897 
              'is_floating_block' => 1,
2898 
              'must_be_hdl_vector' => 1,
2899 
              'period' => 1,
2900 
              'port_id' => 0,
2901 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
2902 
              'type' => 'UFix_1_0',
2903 
            },
2904 
            'direction' => 'out',
2905 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2906 
            'width' => 1,
2907 
          },
2908 
        },
2909 
      },
2910 
      'entityName' => 'x_x107',
2911 
    },
2912 
    'from_register26' => {
2913 
      'connections' => {
2914 
        'data_out' => 'from_register26.data_out',
2915 
      },
2916 
      'entity' => {
2917 
        'attributes' => {
2918 
          'entityAlreadyNetlisted' => 1,
2919 
          'generics' => [
2920 
          ],
2921 
          'is_floating_block' => 1,
2922 
          'mask' => {
2923 
            'Block_Handle' => 2414.00048828125,
2924 
            'Block_handle' => 2414.00048828125,
2925 
            'MDL_Handle' => 2083.00048828125,
2926 
            'MDL_handle' => 2083.00048828125,
2927 
            'arith_type' => 2,
2928 
            'bin_pt' => 0,
2929 
            'block_config' => 'sysgen_blockset:fromreg_config',
2930 
            'block_handle' => 2414.00048828125,
2931 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2932 
            'block_type' => 'fromreg',
2933 
            'dbl_ovrd' => 0,
2934 
            'gui_display_data_type' => 1,
2935 
            'init' => 0,
2936 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2937 
            'mdl_handle' => 2083.00048828125,
2938 
            'model_handle' => 2083.00048828125,
2939 
            'n_bits' => 32,
2940 
            'ownership' => 2,
2941 
            'period' => '5e-009',
2942 
            'preci_type' => 1,
2943 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2944 
            'shared_memory_name' => 'register11td',
2945 
          },
2946 
          'needs_vhdl_wrapper' => 0,
2947 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2948 
        },
2949 
        'entityName' => 'x_x108',
2950 
        'ports' => {
2951 
          'data_out' => {
2952 
            'attributes' => {
2953 
              'bin_pt' => 0,
2954 
              'is_floating_block' => 1,
2955 
              'must_be_hdl_vector' => 1,
2956 
              'period' => 1,
2957 
              'port_id' => 0,
2958 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
2959 
              'type' => 'UFix_32_0',
2960 
            },
2961 
            'direction' => 'out',
2962 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2963 
            'width' => 32,
2964 
          },
2965 
        },
2966 
      },
2967 
      'entityName' => 'x_x108',
2968 
    },
2969 
    'from_register27' => {
2970 
      'connections' => {
2971 
        'data_out' => 'from_register27.data_out',
2972 
      },
2973 
      'entity' => {
2974 
        'attributes' => {
2975 
          'entityAlreadyNetlisted' => 1,
2976 
          'generics' => [
2977 
          ],
2978 
          'is_floating_block' => 1,
2979 
          'mask' => {
2980 
            'Block_Handle' => 2415.00048828125,
2981 
            'Block_handle' => 2415.00048828125,
2982 
            'MDL_Handle' => 2083.00048828125,
2983 
            'MDL_handle' => 2083.00048828125,
2984 
            'arith_type' => 2,
2985 
            'bin_pt' => 0,
2986 
            'block_config' => 'sysgen_blockset:fromreg_config',
2987 
            'block_handle' => 2415.00048828125,
2988 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
2989 
            'block_type' => 'fromreg',
2990 
            'dbl_ovrd' => 0,
2991 
            'gui_display_data_type' => 1,
2992 
            'init' => 0,
2993 
            'init_bit_vector' => '\'b0',
2994 
            'mdl_handle' => 2083.00048828125,
2995 
            'model_handle' => 2083.00048828125,
2996 
            'n_bits' => 1,
2997 
            'ownership' => 2,
2998 
            'period' => '5e-009',
2999 
            'preci_type' => 1,
3000 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3001 
            'shared_memory_name' => 'register11tv',
3002 
          },
3003 
          'needs_vhdl_wrapper' => 0,
3004 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
3005 
        },
3006 
        'entityName' => 'x_x109',
3007 
        'ports' => {
3008 
          'data_out' => {
3009 
            'attributes' => {
3010 
              'bin_pt' => 0,
3011 
              'is_floating_block' => 1,
3012 
              'must_be_hdl_vector' => 1,
3013 
              'period' => 1,
3014 
              'port_id' => 0,
3015 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
3016 
              'type' => 'UFix_1_0',
3017 
            },
3018 
            'direction' => 'out',
3019 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3020 
            'width' => 1,
3021 
          },
3022 
        },
3023 
      },
3024 
      'entityName' => 'x_x109',
3025 
    },
3026 
    'from_register28' => {
3027 
      'connections' => {
3028 
        'data_out' => 'from_register28.data_out',
3029 
      },
3030 
      'entity' => {
3031 
        'attributes' => {
3032 
          'entityAlreadyNetlisted' => 1,
3033 
          'generics' => [
3034 
          ],
3035 
          'is_floating_block' => 1,
3036 
          'mask' => {
3037 
            'Block_Handle' => 2416.00048828125,
3038 
            'Block_handle' => 2416.00048828125,
3039 
            'MDL_Handle' => 2083.00048828125,
3040 
            'MDL_handle' => 2083.00048828125,
3041 
            'arith_type' => 2,
3042 
            'bin_pt' => 0,
3043 
            'block_config' => 'sysgen_blockset:fromreg_config',
3044 
            'block_handle' => 2416.00048828125,
3045 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
3046 
            'block_type' => 'fromreg',
3047 
            'dbl_ovrd' => 0,
3048 
            'gui_display_data_type' => 1,
3049 
            'init' => 0,
3050 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3051 
            'mdl_handle' => 2083.00048828125,
3052 
            'model_handle' => 2083.00048828125,
3053 
            'n_bits' => 32,
3054 
            'ownership' => 2,
3055 
            'period' => '5e-009',
3056 
            'preci_type' => 1,
3057 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3058 
            'shared_memory_name' => 'register12td',
3059 
          },
3060 
          'needs_vhdl_wrapper' => 0,
3061 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
3062 
        },
3063 
        'entityName' => 'x_x110',
3064 
        'ports' => {
3065 
          'data_out' => {
3066 
            'attributes' => {
3067 
              'bin_pt' => 0,
3068 
              'is_floating_block' => 1,
3069 
              'must_be_hdl_vector' => 1,
3070 
              'period' => 1,
3071 
              'port_id' => 0,
3072 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
3073 
              'type' => 'UFix_32_0',
3074 
            },
3075 
            'direction' => 'out',
3076 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3077 
            'width' => 32,
3078 
          },
3079 
        },
3080 
      },
3081 
      'entityName' => 'x_x110',
3082 
    },
3083 
    'from_register29' => {
3084 
      'connections' => {
3085 
        'data_out' => 'from_register29.data_out',
3086 
      },
3087 
      'entity' => {
3088 
        'attributes' => {
3089 
          'entityAlreadyNetlisted' => 1,
3090 
          'generics' => [
3091 
          ],
3092 
          'is_floating_block' => 1,
3093 
          'mask' => {
3094 
            'Block_Handle' => 2417.00048828125,
3095 
            'Block_handle' => 2417.00048828125,
3096 
            'MDL_Handle' => 2083.00048828125,
3097 
            'MDL_handle' => 2083.00048828125,
3098 
            'arith_type' => 2,
3099 
            'bin_pt' => 0,
3100 
            'block_config' => 'sysgen_blockset:fromreg_config',
3101 
            'block_handle' => 2417.00048828125,
3102 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
3103 
            'block_type' => 'fromreg',
3104 
            'dbl_ovrd' => 0,
3105 
            'gui_display_data_type' => 1,
3106 
            'init' => 0,
3107 
            'init_bit_vector' => '\'b0',
3108 
            'mdl_handle' => 2083.00048828125,
3109 
            'model_handle' => 2083.00048828125,
3110 
            'n_bits' => 1,
3111 
            'ownership' => 2,
3112 
            'period' => '5e-009',
3113 
            'preci_type' => 1,
3114 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3115 
            'shared_memory_name' => 'register12tv',
3116 
          },
3117 
          'needs_vhdl_wrapper' => 0,
3118 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
3119 
        },
3120 
        'entityName' => 'x_x111',
3121 
        'ports' => {
3122 
          'data_out' => {
3123 
            'attributes' => {
3124 
              'bin_pt' => 0,
3125 
              'is_floating_block' => 1,
3126 
              'must_be_hdl_vector' => 1,
3127 
              'period' => 1,
3128 
              'port_id' => 0,
3129 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
3130 
              'type' => 'UFix_1_0',
3131 
            },
3132 
            'direction' => 'out',
3133 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3134 
            'width' => 1,
3135 
          },
3136 
        },
3137 
      },
3138 
      'entityName' => 'x_x111',
3139 
    },
3140 
    'from_register3' => {
3141 
      'connections' => {
3142 
        'data_out' => 'from_register3.data_out',
3143 
      },
3144 
      'entity' => {
3145 
        'attributes' => {
3146 
          'entityAlreadyNetlisted' => 1,
3147 
          'generics' => [
3148 
          ],
3149 
          'is_floating_block' => 1,
3150 
          'mask' => {
3151 
            'Block_Handle' => 2418.00048828125,
3152 
            'Block_handle' => 2418.00048828125,
3153 
            'MDL_Handle' => 2083.00048828125,
3154 
            'MDL_handle' => 2083.00048828125,
3155 
            'arith_type' => 2,
3156 
            'bin_pt' => 0,
3157 
            'block_config' => 'sysgen_blockset:fromreg_config',
3158 
            'block_handle' => 2418.00048828125,
3159 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3160 
            'block_type' => 'fromreg',
3161 
            'dbl_ovrd' => 0,
3162 
            'gui_display_data_type' => 1,
3163 
            'init' => 0,
3164 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3165 
            'mdl_handle' => 2083.00048828125,
3166 
            'model_handle' => 2083.00048828125,
3167 
            'n_bits' => 32,
3168 
            'ownership' => 2,
3169 
            'period' => '5e-009',
3170 
            'preci_type' => 1,
3171 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3172 
            'shared_memory_name' => 'register01td',
3173 
          },
3174 
          'needs_vhdl_wrapper' => 0,
3175 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3176 
        },
3177 
        'entityName' => 'x_x112',
3178 
        'ports' => {
3179 
          'data_out' => {
3180 
            'attributes' => {
3181 
              'bin_pt' => 0,
3182 
              'is_floating_block' => 1,
3183 
              'must_be_hdl_vector' => 1,
3184 
              'period' => 1,
3185 
              'port_id' => 0,
3186 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
3187 
              'type' => 'UFix_32_0',
3188 
            },
3189 
            'direction' => 'out',
3190 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3191 
            'width' => 32,
3192 
          },
3193 
        },
3194 
      },
3195 
      'entityName' => 'x_x112',
3196 
    },
3197 
    'from_register30' => {
3198 
      'connections' => {
3199 
        'data_out' => 'from_register30.data_out',
3200 
      },
3201 
      'entity' => {
3202 
        'attributes' => {
3203 
          'entityAlreadyNetlisted' => 1,
3204 
          'generics' => [
3205 
          ],
3206 
          'is_floating_block' => 1,
3207 
          'mask' => {
3208 
            'Block_Handle' => 2419.00048828125,
3209 
            'Block_handle' => 2419.00048828125,
3210 
            'MDL_Handle' => 2083.00048828125,
3211 
            'MDL_handle' => 2083.00048828125,
3212 
            'arith_type' => 2,
3213 
            'bin_pt' => 0,
3214 
            'block_config' => 'sysgen_blockset:fromreg_config',
3215 
            'block_handle' => 2419.00048828125,
3216 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3217 
            'block_type' => 'fromreg',
3218 
            'dbl_ovrd' => 0,
3219 
            'gui_display_data_type' => 1,
3220 
            'init' => 0,
3221 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3222 
            'mdl_handle' => 2083.00048828125,
3223 
            'model_handle' => 2083.00048828125,
3224 
            'n_bits' => 32,
3225 
            'ownership' => 2,
3226 
            'period' => '5e-009',
3227 
            'preci_type' => 1,
3228 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3229 
            'shared_memory_name' => 'register13td',
3230 
          },
3231 
          'needs_vhdl_wrapper' => 0,
3232 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3233 
        },
3234 
        'entityName' => 'x_x113',
3235 
        'ports' => {
3236 
          'data_out' => {
3237 
            'attributes' => {
3238 
              'bin_pt' => 0,
3239 
              'is_floating_block' => 1,
3240 
              'must_be_hdl_vector' => 1,
3241 
              'period' => 1,
3242 
              'port_id' => 0,
3243 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
3244 
              'type' => 'UFix_32_0',
3245 
            },
3246 
            'direction' => 'out',
3247 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3248 
            'width' => 32,
3249 
          },
3250 
        },
3251 
      },
3252 
      'entityName' => 'x_x113',
3253 
    },
3254 
    'from_register31' => {
3255 
      'connections' => {
3256 
        'data_out' => 'from_register31.data_out',
3257 
      },
3258 
      'entity' => {
3259 
        'attributes' => {
3260 
          'entityAlreadyNetlisted' => 1,
3261 
          'generics' => [
3262 
          ],
3263 
          'is_floating_block' => 1,
3264 
          'mask' => {
3265 
            'Block_Handle' => 2420.00048828125,
3266 
            'Block_handle' => 2420.00048828125,
3267 
            'MDL_Handle' => 2083.00048828125,
3268 
            'MDL_handle' => 2083.00048828125,
3269 
            'arith_type' => 2,
3270 
            'bin_pt' => 0,
3271 
            'block_config' => 'sysgen_blockset:fromreg_config',
3272 
            'block_handle' => 2420.00048828125,
3273 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3274 
            'block_type' => 'fromreg',
3275 
            'dbl_ovrd' => 0,
3276 
            'gui_display_data_type' => 1,
3277 
            'init' => 0,
3278 
            'init_bit_vector' => '\'b0',
3279 
            'mdl_handle' => 2083.00048828125,
3280 
            'model_handle' => 2083.00048828125,
3281 
            'n_bits' => 1,
3282 
            'ownership' => 2,
3283 
            'period' => '5e-009',
3284 
            'preci_type' => 1,
3285 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3286 
            'shared_memory_name' => 'register13tv',
3287 
          },
3288 
          'needs_vhdl_wrapper' => 0,
3289 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3290 
        },
3291 
        'entityName' => 'x_x114',
3292 
        'ports' => {
3293 
          'data_out' => {
3294 
            'attributes' => {
3295 
              'bin_pt' => 0,
3296 
              'is_floating_block' => 1,
3297 
              'must_be_hdl_vector' => 1,
3298 
              'period' => 1,
3299 
              'port_id' => 0,
3300 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
3301 
              'type' => 'UFix_1_0',
3302 
            },
3303 
            'direction' => 'out',
3304 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3305 
            'width' => 1,
3306 
          },
3307 
        },
3308 
      },
3309 
      'entityName' => 'x_x114',
3310 
    },
3311 
    'from_register32' => {
3312 
      'connections' => {
3313 
        'data_out' => 'from_register32.data_out',
3314 
      },
3315 
      'entity' => {
3316 
        'attributes' => {
3317 
          'entityAlreadyNetlisted' => 1,
3318 
          'generics' => [
3319 
          ],
3320 
          'is_floating_block' => 1,
3321 
          'mask' => {
3322 
            'Block_Handle' => 2421.00048828125,
3323 
            'Block_handle' => 2421.00048828125,
3324 
            'MDL_Handle' => 2083.00048828125,
3325 
            'MDL_handle' => 2083.00048828125,
3326 
            'arith_type' => 2,
3327 
            'bin_pt' => 0,
3328 
            'block_config' => 'sysgen_blockset:fromreg_config',
3329 
            'block_handle' => 2421.00048828125,
3330 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3331 
            'block_type' => 'fromreg',
3332 
            'dbl_ovrd' => 0,
3333 
            'gui_display_data_type' => 1,
3334 
            'init' => 0,
3335 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3336 
            'mdl_handle' => 2083.00048828125,
3337 
            'model_handle' => 2083.00048828125,
3338 
            'n_bits' => 32,
3339 
            'ownership' => 2,
3340 
            'period' => '5e-009',
3341 
            'preci_type' => 1,
3342 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3343 
            'shared_memory_name' => 'register14td',
3344 
          },
3345 
          'needs_vhdl_wrapper' => 0,
3346 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3347 
        },
3348 
        'entityName' => 'x_x115',
3349 
        'ports' => {
3350 
          'data_out' => {
3351 
            'attributes' => {
3352 
              'bin_pt' => 0,
3353 
              'is_floating_block' => 1,
3354 
              'must_be_hdl_vector' => 1,
3355 
              'period' => 1,
3356 
              'port_id' => 0,
3357 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
3358 
              'type' => 'UFix_32_0',
3359 
            },
3360 
            'direction' => 'out',
3361 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3362 
            'width' => 32,
3363 
          },
3364 
        },
3365 
      },
3366 
      'entityName' => 'x_x115',
3367 
    },
3368 
    'from_register33' => {
3369 
      'connections' => {
3370 
        'data_out' => 'from_register33.data_out',
3371 
      },
3372 
      'entity' => {
3373 
        'attributes' => {
3374 
          'entityAlreadyNetlisted' => 1,
3375 
          'generics' => [
3376 
          ],
3377 
          'is_floating_block' => 1,
3378 
          'mask' => {
3379 
            'Block_Handle' => 2422.00048828125,
3380 
            'Block_handle' => 2422.00048828125,
3381 
            'MDL_Handle' => 2083.00048828125,
3382 
            'MDL_handle' => 2083.00048828125,
3383 
            'arith_type' => 2,
3384 
            'bin_pt' => 0,
3385 
            'block_config' => 'sysgen_blockset:fromreg_config',
3386 
            'block_handle' => 2422.00048828125,
3387 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3388 
            'block_type' => 'fromreg',
3389 
            'dbl_ovrd' => 0,
3390 
            'gui_display_data_type' => 1,
3391 
            'init' => 0,
3392 
            'init_bit_vector' => '\'b0',
3393 
            'mdl_handle' => 2083.00048828125,
3394 
            'model_handle' => 2083.00048828125,
3395 
            'n_bits' => 1,
3396 
            'ownership' => 2,
3397 
            'period' => '5e-009',
3398 
            'preci_type' => 1,
3399 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3400 
            'shared_memory_name' => 'register14tv',
3401 
          },
3402 
          'needs_vhdl_wrapper' => 0,
3403 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3404 
        },
3405 
        'entityName' => 'x_x116',
3406 
        'ports' => {
3407 
          'data_out' => {
3408 
            'attributes' => {
3409 
              'bin_pt' => 0,
3410 
              'is_floating_block' => 1,
3411 
              'must_be_hdl_vector' => 1,
3412 
              'period' => 1,
3413 
              'port_id' => 0,
3414 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
3415 
              'type' => 'UFix_1_0',
3416 
            },
3417 
            'direction' => 'out',
3418 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3419 
            'width' => 1,
3420 
          },
3421 
        },
3422 
      },
3423 
      'entityName' => 'x_x116',
3424 
    },
3425 
    'from_register4' => {
3426 
      'connections' => {
3427 
        'data_out' => 'from_register4.data_out',
3428 
      },
3429 
      'entity' => {
3430 
        'attributes' => {
3431 
          'entityAlreadyNetlisted' => 1,
3432 
          'generics' => [
3433 
          ],
3434 
          'is_floating_block' => 1,
3435 
          'mask' => {
3436 
            'Block_Handle' => 2423.00048828125,
3437 
            'Block_handle' => 2423.00048828125,
3438 
            'MDL_Handle' => 2083.00048828125,
3439 
            'MDL_handle' => 2083.00048828125,
3440 
            'arith_type' => 2,
3441 
            'bin_pt' => 0,
3442 
            'block_config' => 'sysgen_blockset:fromreg_config',
3443 
            'block_handle' => 2423.00048828125,
3444 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3445 
            'block_type' => 'fromreg',
3446 
            'dbl_ovrd' => 0,
3447 
            'gui_display_data_type' => 1,
3448 
            'init' => 0,
3449 
            'init_bit_vector' => '\'b0',
3450 
            'mdl_handle' => 2083.00048828125,
3451 
            'model_handle' => 2083.00048828125,
3452 
            'n_bits' => 1,
3453 
            'ownership' => 2,
3454 
            'period' => '5e-009',
3455 
            'preci_type' => 1,
3456 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3457 
            'shared_memory_name' => 'register01tv',
3458 
          },
3459 
          'needs_vhdl_wrapper' => 0,
3460 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3461 
        },
3462 
        'entityName' => 'x_x117',
3463 
        'ports' => {
3464 
          'data_out' => {
3465 
            'attributes' => {
3466 
              'bin_pt' => 0,
3467 
              'is_floating_block' => 1,
3468 
              'must_be_hdl_vector' => 1,
3469 
              'period' => 1,
3470 
              'port_id' => 0,
3471 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
3472 
              'type' => 'UFix_1_0',
3473 
            },
3474 
            'direction' => 'out',
3475 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3476 
            'width' => 1,
3477 
          },
3478 
        },
3479 
      },
3480 
      'entityName' => 'x_x117',
3481 
    },
3482 
    'from_register5' => {
3483 
      'connections' => {
3484 
        'data_out' => 'from_register5.data_out',
3485 
      },
3486 
      'entity' => {
3487 
        'attributes' => {
3488 
          'entityAlreadyNetlisted' => 1,
3489 
          'generics' => [
3490 
          ],
3491 
          'is_floating_block' => 1,
3492 
          'mask' => {
3493 
            'Block_Handle' => 2424.00048828125,
3494 
            'Block_handle' => 2424.00048828125,
3495 
            'MDL_Handle' => 2083.00048828125,
3496 
            'MDL_handle' => 2083.00048828125,
3497 
            'arith_type' => 2,
3498 
            'bin_pt' => 0,
3499 
            'block_config' => 'sysgen_blockset:fromreg_config',
3500 
            'block_handle' => 2424.00048828125,
3501 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3502 
            'block_type' => 'fromreg',
3503 
            'dbl_ovrd' => 0,
3504 
            'gui_display_data_type' => 1,
3505 
            'init' => 0,
3506 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3507 
            'mdl_handle' => 2083.00048828125,
3508 
            'model_handle' => 2083.00048828125,
3509 
            'n_bits' => 32,
3510 
            'ownership' => 2,
3511 
            'period' => '5e-009',
3512 
            'preci_type' => 1,
3513 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3514 
            'shared_memory_name' => 'register02td',
3515 
          },
3516 
          'needs_vhdl_wrapper' => 0,
3517 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3518 
        },
3519 
        'entityName' => 'x_x118',
3520 
        'ports' => {
3521 
          'data_out' => {
3522 
            'attributes' => {
3523 
              'bin_pt' => 0,
3524 
              'is_floating_block' => 1,
3525 
              'must_be_hdl_vector' => 1,
3526 
              'period' => 1,
3527 
              'port_id' => 0,
3528 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
3529 
              'type' => 'UFix_32_0',
3530 
            },
3531 
            'direction' => 'out',
3532 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3533 
            'width' => 32,
3534 
          },
3535 
        },
3536 
      },
3537 
      'entityName' => 'x_x118',
3538 
    },
3539 
    'from_register6' => {
3540 
      'connections' => {
3541 
        'data_out' => 'from_register6.data_out',
3542 
      },
3543 
      'entity' => {
3544 
        'attributes' => {
3545 
          'entityAlreadyNetlisted' => 1,
3546 
          'generics' => [
3547 
          ],
3548 
          'is_floating_block' => 1,
3549 
          'mask' => {
3550 
            'Block_Handle' => 2425.00048828125,
3551 
            'Block_handle' => 2425.00048828125,
3552 
            'MDL_Handle' => 2083.00048828125,
3553 
            'MDL_handle' => 2083.00048828125,
3554 
            'arith_type' => 2,
3555 
            'bin_pt' => 0,
3556 
            'block_config' => 'sysgen_blockset:fromreg_config',
3557 
            'block_handle' => 2425.00048828125,
3558 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3559 
            'block_type' => 'fromreg',
3560 
            'dbl_ovrd' => 0,
3561 
            'gui_display_data_type' => 1,
3562 
            'init' => 0,
3563 
            'init_bit_vector' => '\'b0',
3564 
            'mdl_handle' => 2083.00048828125,
3565 
            'model_handle' => 2083.00048828125,
3566 
            'n_bits' => 1,
3567 
            'ownership' => 2,
3568 
            'period' => '5e-009',
3569 
            'preci_type' => 1,
3570 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3571 
            'shared_memory_name' => 'register02tv',
3572 
          },
3573 
          'needs_vhdl_wrapper' => 0,
3574 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3575 
        },
3576 
        'entityName' => 'x_x119',
3577 
        'ports' => {
3578 
          'data_out' => {
3579 
            'attributes' => {
3580 
              'bin_pt' => 0,
3581 
              'is_floating_block' => 1,
3582 
              'must_be_hdl_vector' => 1,
3583 
              'period' => 1,
3584 
              'port_id' => 0,
3585 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
3586 
              'type' => 'UFix_1_0',
3587 
            },
3588 
            'direction' => 'out',
3589 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3590 
            'width' => 1,
3591 
          },
3592 
        },
3593 
      },
3594 
      'entityName' => 'x_x119',
3595 
    },
3596 
    'from_register7' => {
3597 
      'connections' => {
3598 
        'data_out' => 'from_register7.data_out',
3599 
      },
3600 
      'entity' => {
3601 
        'attributes' => {
3602 
          'entityAlreadyNetlisted' => 1,
3603 
          'generics' => [
3604 
          ],
3605 
          'is_floating_block' => 1,
3606 
          'mask' => {
3607 
            'Block_Handle' => 2426.00048828125,
3608 
            'Block_handle' => 2426.00048828125,
3609 
            'MDL_Handle' => 2083.00048828125,
3610 
            'MDL_handle' => 2083.00048828125,
3611 
            'arith_type' => 2,
3612 
            'bin_pt' => 0,
3613 
            'block_config' => 'sysgen_blockset:fromreg_config',
3614 
            'block_handle' => 2426.00048828125,
3615 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3616 
            'block_type' => 'fromreg',
3617 
            'dbl_ovrd' => 0,
3618 
            'gui_display_data_type' => 1,
3619 
            'init' => 0,
3620 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3621 
            'mdl_handle' => 2083.00048828125,
3622 
            'model_handle' => 2083.00048828125,
3623 
            'n_bits' => 32,
3624 
            'ownership' => 2,
3625 
            'period' => '5e-009',
3626 
            'preci_type' => 1,
3627 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3628 
            'shared_memory_name' => 'register03td',
3629 
          },
3630 
          'needs_vhdl_wrapper' => 0,
3631 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3632 
        },
3633 
        'entityName' => 'x_x120',
3634 
        'ports' => {
3635 
          'data_out' => {
3636 
            'attributes' => {
3637 
              'bin_pt' => 0,
3638 
              'is_floating_block' => 1,
3639 
              'must_be_hdl_vector' => 1,
3640 
              'period' => 1,
3641 
              'port_id' => 0,
3642 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
3643 
              'type' => 'UFix_32_0',
3644 
            },
3645 
            'direction' => 'out',
3646 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3647 
            'width' => 32,
3648 
          },
3649 
        },
3650 
      },
3651 
      'entityName' => 'x_x120',
3652 
    },
3653 
    'from_register8' => {
3654 
      'connections' => {
3655 
        'data_out' => 'from_register8.data_out',
3656 
      },
3657 
      'entity' => {
3658 
        'attributes' => {
3659 
          'entityAlreadyNetlisted' => 1,
3660 
          'generics' => [
3661 
          ],
3662 
          'is_floating_block' => 1,
3663 
          'mask' => {
3664 
            'Block_Handle' => 2427.00048828125,
3665 
            'Block_handle' => 2427.00048828125,
3666 
            'MDL_Handle' => 2083.00048828125,
3667 
            'MDL_handle' => 2083.00048828125,
3668 
            'arith_type' => 2,
3669 
            'bin_pt' => 0,
3670 
            'block_config' => 'sysgen_blockset:fromreg_config',
3671 
            'block_handle' => 2427.00048828125,
3672 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3673 
            'block_type' => 'fromreg',
3674 
            'dbl_ovrd' => 0,
3675 
            'gui_display_data_type' => 1,
3676 
            'init' => 0,
3677 
            'init_bit_vector' => '\'b0',
3678 
            'mdl_handle' => 2083.00048828125,
3679 
            'model_handle' => 2083.00048828125,
3680 
            'n_bits' => 1,
3681 
            'ownership' => 2,
3682 
            'period' => '5e-009',
3683 
            'preci_type' => 1,
3684 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3685 
            'shared_memory_name' => 'register03tv',
3686 
          },
3687 
          'needs_vhdl_wrapper' => 0,
3688 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3689 
        },
3690 
        'entityName' => 'x_x121',
3691 
        'ports' => {
3692 
          'data_out' => {
3693 
            'attributes' => {
3694 
              'bin_pt' => 0,
3695 
              'is_floating_block' => 1,
3696 
              'must_be_hdl_vector' => 1,
3697 
              'period' => 1,
3698 
              'port_id' => 0,
3699 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
3700 
              'type' => 'UFix_1_0',
3701 
            },
3702 
            'direction' => 'out',
3703 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3704 
            'width' => 1,
3705 
          },
3706 
        },
3707 
      },
3708 
      'entityName' => 'x_x121',
3709 
    },
3710 
    'from_register9' => {
3711 
      'connections' => {
3712 
        'data_out' => 'from_register9.data_out',
3713 
      },
3714 
      'entity' => {
3715 
        'attributes' => {
3716 
          'entityAlreadyNetlisted' => 1,
3717 
          'generics' => [
3718 
          ],
3719 
          'is_floating_block' => 1,
3720 
          'mask' => {
3721 
            'Block_Handle' => 2428.00048828125,
3722 
            'Block_handle' => 2428.00048828125,
3723 
            'MDL_Handle' => 2083.00048828125,
3724 
            'MDL_handle' => 2083.00048828125,
3725 
            'arith_type' => 2,
3726 
            'bin_pt' => 0,
3727 
            'block_config' => 'sysgen_blockset:fromreg_config',
3728 
            'block_handle' => 2428.00048828125,
3729 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3730 
            'block_type' => 'fromreg',
3731 
            'dbl_ovrd' => 0,
3732 
            'gui_display_data_type' => 1,
3733 
            'init' => 0,
3734 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3735 
            'mdl_handle' => 2083.00048828125,
3736 
            'model_handle' => 2083.00048828125,
3737 
            'n_bits' => 32,
3738 
            'ownership' => 2,
3739 
            'period' => '5e-009',
3740 
            'preci_type' => 1,
3741 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3742 
            'shared_memory_name' => 'register04td',
3743 
          },
3744 
          'needs_vhdl_wrapper' => 0,
3745 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3746 
        },
3747 
        'entityName' => 'x_x122',
3748 
        'ports' => {
3749 
          'data_out' => {
3750 
            'attributes' => {
3751 
              'bin_pt' => 0,
3752 
              'is_floating_block' => 1,
3753 
              'must_be_hdl_vector' => 1,
3754 
              'period' => 1,
3755 
              'port_id' => 0,
3756 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
3757 
              'type' => 'UFix_32_0',
3758 
            },
3759 
            'direction' => 'out',
3760 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3761 
            'width' => 32,
3762 
          },
3763 
        },
3764 
      },
3765 
      'entityName' => 'x_x122',
3766 
    },
3767 
    'rst_i' => {
3768 
      'connections' => {
3769 
        'rst_i' => '.rst_i',
3770 
      },
3771 
      'entity' => {
3772 
        'attributes' => {
3773 
          'entityAlreadyNetlisted' => 1,
3774 
          'isGateway' => 1,
3775 
          'is_floating_block' => 1,
3776 
        },
3777 
        'entityName' => 'rst_i',
3778 
        'ports' => {
3779 
          'rst_i' => {
3780 
            'attributes' => {
3781 
              'bin_pt' => 0,
3782 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
3783 
              'is_floating_block' => 1,
3784 
              'is_gateway_port' => 1,
3785 
              'must_be_hdl_vector' => 1,
3786 
              'period' => 1,
3787 
              'port_id' => 0,
3788 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
3789 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
3790 
              'timingConstraint' => 'none',
3791 
              'type' => 'Bool',
3792 
            },
3793 
            'direction' => 'out',
3794 
            'hdlType' => 'std_logic',
3795 
            'width' => 1,
3796 
          },
3797 
        },
3798 
      },
3799 
      'entityName' => 'rst_i',
3800 
    },
3801 
    'rst_o' => {
3802 
      'connections' => {
3803 
        'rst_o' => 'sysgen_dut.rst_o',
3804 
      },
3805 
      'entity' => {
3806 
        'attributes' => {
3807 
          'entityAlreadyNetlisted' => 1,
3808 
          'isGateway' => 1,
3809 
          'is_floating_block' => 1,
3810 
        },
3811 
        'entityName' => 'rst_o',
3812 
        'ports' => {
3813 
          'rst_o' => {
3814 
            'attributes' => {
3815 
              'bin_pt' => 0,
3816 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
3817 
              'is_floating_block' => 1,
3818 
              'is_gateway_port' => 1,
3819 
              'must_be_hdl_vector' => 1,
3820 
              'period' => 1,
3821 
              'port_id' => 0,
3822 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
3823 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
3824 
              'timingConstraint' => 'none',
3825 
              'type' => 'Bool',
3826 
            },
3827 
            'direction' => 'in',
3828 
            'hdlType' => 'std_logic',
3829 
            'width' => 1,
3830 
          },
3831 
        },
3832 
      },
3833 
      'entityName' => 'rst_o',
3834 
    },
3835 
    'sysgen_dut' => {
3836 
      'connections' => {
3837 
        'bram_rd_addr' => 'sysgen_dut.bram_rd_addr',
3838 
        'bram_rd_dout' => '.bram_rd_dout',
3839 
        'bram_wr_addr' => 'sysgen_dut.bram_wr_addr',
3840 
        'bram_wr_din' => 'sysgen_dut.bram_wr_din',
3841 
        'bram_wr_en' => 'sysgen_dut.bram_wr_en',
3842 
        'clk' => '.clk',
3843 
        'fifo_rd_count' => '.fifo_rd_count',
3844 
        'fifo_rd_dout' => '.fifo_rd_dout',
3845 
        'fifo_rd_empty' => '.fifo_rd_empty',
3846 
        'fifo_rd_en' => 'sysgen_dut.fifo_rd_en',
3847 
        'fifo_rd_pempty' => '.fifo_rd_pempty',
3848 
        'fifo_rd_valid' => '.fifo_rd_valid',
3849 
        'fifo_wr_count' => '.fifo_wr_count',
3850 
        'fifo_wr_din' => 'sysgen_dut.fifo_wr_din',
3851 
        'fifo_wr_en' => 'sysgen_dut.fifo_wr_en',
3852 
        'fifo_wr_full' => '.fifo_wr_full',
3853 
        'fifo_wr_pfull' => '.fifo_wr_pfull',
3854 
        'from_register10_data_out' => 'from_register10.data_out',
3855 
        'from_register11_data_out' => 'from_register11.data_out',
3856 
        'from_register12_data_out' => 'from_register12.data_out',
3857 
        'from_register13_data_out' => 'from_register13.data_out',
3858 
        'from_register14_data_out' => 'from_register14.data_out',
3859 
        'from_register15_data_out' => 'from_register15.data_out',
3860 
        'from_register16_data_out' => 'from_register16.data_out',
3861 
        'from_register17_data_out' => 'from_register17.data_out',
3862 
        'from_register18_data_out' => 'from_register18.data_out',
3863 
        'from_register19_data_out' => 'from_register19.data_out',
3864 
        'from_register1_data_out' => 'from_register1.data_out',
3865 
        'from_register20_data_out' => 'from_register20.data_out',
3866 
        'from_register21_data_out' => 'from_register21.data_out',
3867 
        'from_register22_data_out' => 'from_register22.data_out',
3868 
        'from_register23_data_out' => 'from_register23.data_out',
3869 
        'from_register24_data_out' => 'from_register24.data_out',
3870 
        'from_register25_data_out' => 'from_register25.data_out',
3871 
        'from_register26_data_out' => 'from_register26.data_out',
3872 
        'from_register27_data_out' => 'from_register27.data_out',
3873 
        'from_register28_data_out' => 'from_register28.data_out',
3874 
        'from_register29_data_out' => 'from_register29.data_out',
3875 
        'from_register2_data_out' => 'from_register2.data_out',
3876 
        'from_register30_data_out' => 'from_register30.data_out',
3877 
        'from_register31_data_out' => 'from_register31.data_out',
3878 
        'from_register32_data_out' => 'from_register32.data_out',
3879 
        'from_register33_data_out' => 'from_register33.data_out',
3880 
        'from_register3_data_out' => 'from_register3.data_out',
3881 
        'from_register4_data_out' => 'from_register4.data_out',
3882 
        'from_register5_data_out' => 'from_register5.data_out',
3883 
        'from_register6_data_out' => 'from_register6.data_out',
3884 
        'from_register7_data_out' => 'from_register7.data_out',
3885 
        'from_register8_data_out' => 'from_register8.data_out',
3886 
        'from_register9_data_out' => 'from_register9.data_out',
3887 
        'from_register_data_out' => 'from_register.data_out',
3888 
        'rst_i' => '.rst_i',
3889 
        'rst_o' => 'sysgen_dut.rst_o',
3890 
        'to_register10_ce' => 'sysgen_dut.to_register10_ce',
3891 
        'to_register10_clk' => 'sysgen_dut.to_register10_clk',
3892 
        'to_register10_clr' => 'sysgen_dut.to_register10_clr',
3893 
        'to_register10_data_in' => 'sysgen_dut.to_register10_data_in',
3894 
        'to_register10_dout' => 'to_register10.dout',
3895 
        'to_register10_en' => 'sysgen_dut.to_register10_en',
3896 
        'to_register11_ce' => 'sysgen_dut.to_register11_ce',
3897 
        'to_register11_clk' => 'sysgen_dut.to_register11_clk',
3898 
        'to_register11_clr' => 'sysgen_dut.to_register11_clr',
3899 
        'to_register11_data_in' => 'sysgen_dut.to_register11_data_in',
3900 
        'to_register11_dout' => 'to_register11.dout',
3901 
        'to_register11_en' => 'sysgen_dut.to_register11_en',
3902 
        'to_register12_ce' => 'sysgen_dut.to_register12_ce',
3903 
        'to_register12_clk' => 'sysgen_dut.to_register12_clk',
3904 
        'to_register12_clr' => 'sysgen_dut.to_register12_clr',
3905 
        'to_register12_data_in' => 'sysgen_dut.to_register12_data_in',
3906 
        'to_register12_dout' => 'to_register12.dout',
3907 
        'to_register12_en' => 'sysgen_dut.to_register12_en',
3908 
        'to_register13_ce' => 'sysgen_dut.to_register13_ce',
3909 
        'to_register13_clk' => 'sysgen_dut.to_register13_clk',
3910 
        'to_register13_clr' => 'sysgen_dut.to_register13_clr',
3911 
        'to_register13_data_in' => 'sysgen_dut.to_register13_data_in',
3912 
        'to_register13_dout' => 'to_register13.dout',
3913 
        'to_register13_en' => 'sysgen_dut.to_register13_en',
3914 
        'to_register14_ce' => 'sysgen_dut.to_register14_ce',
3915 
        'to_register14_clk' => 'sysgen_dut.to_register14_clk',
3916 
        'to_register14_clr' => 'sysgen_dut.to_register14_clr',
3917 
        'to_register14_data_in' => 'sysgen_dut.to_register14_data_in',
3918 
        'to_register14_dout' => 'to_register14.dout',
3919 
        'to_register14_en' => 'sysgen_dut.to_register14_en',
3920 
        'to_register15_ce' => 'sysgen_dut.to_register15_ce',
3921 
        'to_register15_clk' => 'sysgen_dut.to_register15_clk',
3922 
        'to_register15_clr' => 'sysgen_dut.to_register15_clr',
3923 
        'to_register15_data_in' => 'sysgen_dut.to_register15_data_in',
3924 
        'to_register15_dout' => 'to_register15.dout',
3925 
        'to_register15_en' => 'sysgen_dut.to_register15_en',
3926 
        'to_register16_ce' => 'sysgen_dut.to_register16_ce',
3927 
        'to_register16_clk' => 'sysgen_dut.to_register16_clk',
3928 
        'to_register16_clr' => 'sysgen_dut.to_register16_clr',
3929 
        'to_register16_data_in' => 'sysgen_dut.to_register16_data_in',
3930 
        'to_register16_dout' => 'to_register16.dout',
3931 
        'to_register16_en' => 'sysgen_dut.to_register16_en',
3932 
        'to_register17_ce' => 'sysgen_dut.to_register17_ce',
3933 
        'to_register17_clk' => 'sysgen_dut.to_register17_clk',
3934 
        'to_register17_clr' => 'sysgen_dut.to_register17_clr',
3935 
        'to_register17_data_in' => 'sysgen_dut.to_register17_data_in',
3936 
        'to_register17_dout' => 'to_register17.dout',
3937 
        'to_register17_en' => 'sysgen_dut.to_register17_en',
3938 
        'to_register18_ce' => 'sysgen_dut.to_register18_ce',
3939 
        'to_register18_clk' => 'sysgen_dut.to_register18_clk',
3940 
        'to_register18_clr' => 'sysgen_dut.to_register18_clr',
3941 
        'to_register18_data_in' => 'sysgen_dut.to_register18_data_in',
3942 
        'to_register18_dout' => 'to_register18.dout',
3943 
        'to_register18_en' => 'sysgen_dut.to_register18_en',
3944 
        'to_register19_ce' => 'sysgen_dut.to_register19_ce',
3945 
        'to_register19_clk' => 'sysgen_dut.to_register19_clk',
3946 
        'to_register19_clr' => 'sysgen_dut.to_register19_clr',
3947 
        'to_register19_data_in' => 'sysgen_dut.to_register19_data_in',
3948 
        'to_register19_dout' => 'to_register19.dout',
3949 
        'to_register19_en' => 'sysgen_dut.to_register19_en',
3950 
        'to_register1_ce' => 'sysgen_dut.to_register1_ce',
3951 
        'to_register1_clk' => 'sysgen_dut.to_register1_clk',
3952 
        'to_register1_clr' => 'sysgen_dut.to_register1_clr',
3953 
        'to_register1_data_in' => 'sysgen_dut.to_register1_data_in',
3954 
        'to_register1_dout' => 'to_register1.dout',
3955 
        'to_register1_en' => 'sysgen_dut.to_register1_en',
3956 
        'to_register20_ce' => 'sysgen_dut.to_register20_ce',
3957 
        'to_register20_clk' => 'sysgen_dut.to_register20_clk',
3958 
        'to_register20_clr' => 'sysgen_dut.to_register20_clr',
3959 
        'to_register20_data_in' => 'sysgen_dut.to_register20_data_in',
3960 
        'to_register20_dout' => 'to_register20.dout',
3961 
        'to_register20_en' => 'sysgen_dut.to_register20_en',
3962 
        'to_register21_ce' => 'sysgen_dut.to_register21_ce',
3963 
        'to_register21_clk' => 'sysgen_dut.to_register21_clk',
3964 
        'to_register21_clr' => 'sysgen_dut.to_register21_clr',
3965 
        'to_register21_data_in' => 'sysgen_dut.to_register21_data_in',
3966 
        'to_register21_dout' => 'to_register21.dout',
3967 
        'to_register21_en' => 'sysgen_dut.to_register21_en',
3968 
        'to_register22_ce' => 'sysgen_dut.to_register22_ce',
3969 
        'to_register22_clk' => 'sysgen_dut.to_register22_clk',
3970 
        'to_register22_clr' => 'sysgen_dut.to_register22_clr',
3971 
        'to_register22_data_in' => 'sysgen_dut.to_register22_data_in',
3972 
        'to_register22_dout' => 'to_register22.dout',
3973 
        'to_register22_en' => 'sysgen_dut.to_register22_en',
3974 
        'to_register23_ce' => 'sysgen_dut.to_register23_ce',
3975 
        'to_register23_clk' => 'sysgen_dut.to_register23_clk',
3976 
        'to_register23_clr' => 'sysgen_dut.to_register23_clr',
3977 
        'to_register23_data_in' => 'sysgen_dut.to_register23_data_in',
3978 
        'to_register23_dout' => 'to_register23.dout',
3979 
        'to_register23_en' => 'sysgen_dut.to_register23_en',
3980 
        'to_register24_ce' => 'sysgen_dut.to_register24_ce',
3981 
        'to_register24_clk' => 'sysgen_dut.to_register24_clk',
3982 
        'to_register24_clr' => 'sysgen_dut.to_register24_clr',
3983 
        'to_register24_data_in' => 'sysgen_dut.to_register24_data_in',
3984 
        'to_register24_dout' => 'to_register24.dout',
3985 
        'to_register24_en' => 'sysgen_dut.to_register24_en',
3986 
        'to_register25_ce' => 'sysgen_dut.to_register25_ce',
3987 
        'to_register25_clk' => 'sysgen_dut.to_register25_clk',
3988 
        'to_register25_clr' => 'sysgen_dut.to_register25_clr',
3989 
        'to_register25_data_in' => 'sysgen_dut.to_register25_data_in',
3990 
        'to_register25_dout' => 'to_register25.dout',
3991 
        'to_register25_en' => 'sysgen_dut.to_register25_en',
3992 
        'to_register26_ce' => 'sysgen_dut.to_register26_ce',
3993 
        'to_register26_clk' => 'sysgen_dut.to_register26_clk',
3994 
        'to_register26_clr' => 'sysgen_dut.to_register26_clr',
3995 
        'to_register26_data_in' => 'sysgen_dut.to_register26_data_in',
3996 
        'to_register26_dout' => 'to_register26.dout',
3997 
        'to_register26_en' => 'sysgen_dut.to_register26_en',
3998 
        'to_register27_ce' => 'sysgen_dut.to_register27_ce',
3999 
        'to_register27_clk' => 'sysgen_dut.to_register27_clk',
4000 
        'to_register27_clr' => 'sysgen_dut.to_register27_clr',
4001 
        'to_register27_data_in' => 'sysgen_dut.to_register27_data_in',
4002 
        'to_register27_dout' => 'to_register27.dout',
4003 
        'to_register27_en' => 'sysgen_dut.to_register27_en',
4004 
        'to_register2_ce' => 'sysgen_dut.to_register2_ce',
4005 
        'to_register2_clk' => 'sysgen_dut.to_register2_clk',
4006 
        'to_register2_clr' => 'sysgen_dut.to_register2_clr',
4007 
        'to_register2_data_in' => 'sysgen_dut.to_register2_data_in',
4008 
        'to_register2_dout' => 'to_register2.dout',
4009 
        'to_register2_en' => 'sysgen_dut.to_register2_en',
4010 
        'to_register3_ce' => 'sysgen_dut.to_register3_ce',
4011 
        'to_register3_clk' => 'sysgen_dut.to_register3_clk',
4012 
        'to_register3_clr' => 'sysgen_dut.to_register3_clr',
4013 
        'to_register3_data_in' => 'sysgen_dut.to_register3_data_in',
4014 
        'to_register3_dout' => 'to_register3.dout',
4015 
        'to_register3_en' => 'sysgen_dut.to_register3_en',
4016 
        'to_register4_ce' => 'sysgen_dut.to_register4_ce',
4017 
        'to_register4_clk' => 'sysgen_dut.to_register4_clk',
4018 
        'to_register4_clr' => 'sysgen_dut.to_register4_clr',
4019 
        'to_register4_data_in' => 'sysgen_dut.to_register4_data_in',
4020 
        'to_register4_dout' => 'to_register4.dout',
4021 
        'to_register4_en' => 'sysgen_dut.to_register4_en',
4022 
        'to_register5_ce' => 'sysgen_dut.to_register5_ce',
4023 
        'to_register5_clk' => 'sysgen_dut.to_register5_clk',
4024 
        'to_register5_clr' => 'sysgen_dut.to_register5_clr',
4025 
        'to_register5_data_in' => 'sysgen_dut.to_register5_data_in',
4026 
        'to_register5_dout' => 'to_register5.dout',
4027 
        'to_register5_en' => 'sysgen_dut.to_register5_en',
4028 
        'to_register6_ce' => 'sysgen_dut.to_register6_ce',
4029 
        'to_register6_clk' => 'sysgen_dut.to_register6_clk',
4030 
        'to_register6_clr' => 'sysgen_dut.to_register6_clr',
4031 
        'to_register6_data_in' => 'sysgen_dut.to_register6_data_in',
4032 
        'to_register6_dout' => 'to_register6.dout',
4033 
        'to_register6_en' => 'sysgen_dut.to_register6_en',
4034 
        'to_register7_ce' => 'sysgen_dut.to_register7_ce',
4035 
        'to_register7_clk' => 'sysgen_dut.to_register7_clk',
4036 
        'to_register7_clr' => 'sysgen_dut.to_register7_clr',
4037 
        'to_register7_data_in' => 'sysgen_dut.to_register7_data_in',
4038 
        'to_register7_dout' => 'to_register7.dout',
4039 
        'to_register7_en' => 'sysgen_dut.to_register7_en',
4040 
        'to_register8_ce' => 'sysgen_dut.to_register8_ce',
4041 
        'to_register8_clk' => 'sysgen_dut.to_register8_clk',
4042 
        'to_register8_clr' => 'sysgen_dut.to_register8_clr',
4043 
        'to_register8_data_in' => 'sysgen_dut.to_register8_data_in',
4044 
        'to_register8_dout' => 'to_register8.dout',
4045 
        'to_register8_en' => 'sysgen_dut.to_register8_en',
4046 
        'to_register9_ce' => 'sysgen_dut.to_register9_ce',
4047 
        'to_register9_clk' => 'sysgen_dut.to_register9_clk',
4048 
        'to_register9_clr' => 'sysgen_dut.to_register9_clr',
4049 
        'to_register9_data_in' => 'sysgen_dut.to_register9_data_in',
4050 
        'to_register9_dout' => 'to_register9.dout',
4051 
        'to_register9_en' => 'sysgen_dut.to_register9_en',
4052 
        'to_register_ce' => 'sysgen_dut.to_register_ce',
4053 
        'to_register_clk' => 'sysgen_dut.to_register_clk',
4054 
        'to_register_clr' => 'sysgen_dut.to_register_clr',
4055 
        'to_register_data_in' => 'sysgen_dut.to_register_data_in',
4056 
        'to_register_dout' => 'to_register.dout',
4057 
        'to_register_en' => 'sysgen_dut.to_register_en',
4058 
        'user_int_1o' => 'sysgen_dut.user_int_1o',
4059 
        'user_int_2o' => 'sysgen_dut.user_int_2o',
4060 
        'user_int_3o' => 'sysgen_dut.user_int_3o',
4061 
      },
4062 
      'entity' => {
4063 
        'attributes' => {
4064 
          'entityAlreadyNetlisted' => 1,
4065 
          'hdlArchAttributes' => [
4066 
          ],
4067 
          'hdlEntityAttributes' => [
4068 
          ],
4069 
          'isClkWrapper' => 1,
4070 
        },
4071 
        'connections' => {
4072 
          'bram_rd_addr' => 'bram_rd_addr_net',
4073 
          'bram_rd_dout' => 'bram_rd_dout_net',
4074 
          'bram_wr_addr' => 'bram_wr_addr_net',
4075 
          'bram_wr_din' => 'bram_wr_din_net',
4076 
          'bram_wr_en' => 'bram_wr_en_net',
4077 
          'clk' => 'clkNet',
4078 
          'fifo_rd_count' => 'fifo_rd_count_net',
4079 
          'fifo_rd_dout' => 'fifo_rd_dout_net',
4080 
          'fifo_rd_empty' => 'fifo_rd_empty_net',
4081 
          'fifo_rd_en' => 'fifo_rd_en_net',
4082 
          'fifo_rd_pempty' => 'fifo_rd_pempty_net',
4083 
          'fifo_rd_valid' => 'fifo_rd_valid_net',
4084 
          'fifo_wr_count' => 'fifo_wr_count_net',
4085 
          'fifo_wr_din' => 'fifo_wr_din_net',
4086 
          'fifo_wr_en' => 'fifo_wr_en_net',
4087 
          'fifo_wr_full' => 'fifo_wr_full_net',
4088 
          'fifo_wr_pfull' => 'fifo_wr_pfull_net',
4089 
          'from_register10_data_out' => 'data_out_x1_net',
4090 
          'from_register11_data_out' => 'data_out_x2_net',
4091 
          'from_register12_data_out' => 'data_out_x3_net',
4092 
          'from_register13_data_out' => 'data_out_x4_net',
4093 
          'from_register14_data_out' => 'data_out_x5_net',
4094 
          'from_register15_data_out' => 'from_register15_data_out_net',
4095 
          'from_register16_data_out' => 'from_register16_data_out_net',
4096 
          'from_register17_data_out' => 'data_out_x8_net',
4097 
          'from_register18_data_out' => 'data_out_x9_net',
4098 
          'from_register19_data_out' => 'from_register19_data_out_net',
4099 
          'from_register1_data_out' => 'from_register1_data_out_net',
4100 
          'from_register20_data_out' => 'data_out_x12_net',
4101 
          'from_register21_data_out' => 'data_out_x13_net',
4102 
          'from_register22_data_out' => 'data_out_x14_net',
4103 
          'from_register23_data_out' => 'data_out_x15_net',
4104 
          'from_register24_data_out' => 'data_out_x16_net',
4105 
          'from_register25_data_out' => 'data_out_x17_net',
4106 
          'from_register26_data_out' => 'data_out_x18_net',
4107 
          'from_register27_data_out' => 'data_out_x19_net',
4108 
          'from_register28_data_out' => 'data_out_x20_net',
4109 
          'from_register29_data_out' => 'data_out_x21_net',
4110 
          'from_register2_data_out' => 'from_register2_data_out_net',
4111 
          'from_register30_data_out' => 'data_out_x23_net',
4112 
          'from_register31_data_out' => 'data_out_x24_net',
4113 
          'from_register32_data_out' => 'data_out_x25_net',
4114 
          'from_register33_data_out' => 'data_out_x26_net',
4115 
          'from_register3_data_out' => 'data_out_x22_net',
4116 
          'from_register4_data_out' => 'data_out_x27_net',
4117 
          'from_register5_data_out' => 'data_out_x28_net',
4118 
          'from_register6_data_out' => 'data_out_x29_net',
4119 
          'from_register7_data_out' => 'data_out_x30_net',
4120 
          'from_register8_data_out' => 'data_out_x31_net',
4121 
          'from_register9_data_out' => 'data_out_x32_net',
4122 
          'from_register_data_out' => 'from_register_data_out_net',
4123 
          'rst_i' => 'rst_i_net',
4124 
          'rst_o' => 'rst_o_net',
4125 
          'to_register10_ce' => 'ce_1_sg_x0',
4126 
          'to_register10_clk' => 'clk_1_sg_x0',
4127 
          'to_register10_clr' => [
4128 
            'constant',
4129 
            '\'0\'',
4130 
          ],
4131 
          'to_register10_data_in' => 'data_in_x1_net',
4132 
          'to_register10_dout' => 'to_register10_dout_net',
4133 
          'to_register10_en' => 'constant6_op_net_x2',
4134 
          'to_register11_ce' => 'ce_1_sg_x0',
4135 
          'to_register11_clk' => 'clk_1_sg_x0',
4136 
          'to_register11_clr' => [
4137 
            'constant',
4138 
            '\'0\'',
4139 
          ],
4140 
          'to_register11_data_in' => 'data_in_x2_net',
4141 
          'to_register11_dout' => 'to_register11_dout_net',
4142 
          'to_register11_en' => 'constant6_op_net_x3',
4143 
          'to_register12_ce' => 'ce_1_sg_x0',
4144 
          'to_register12_clk' => 'clk_1_sg_x0',
4145 
          'to_register12_clr' => [
4146 
            'constant',
4147 
            '\'0\'',
4148 
          ],
4149 
          'to_register12_data_in' => 'data_in_x3_net',
4150 
          'to_register12_dout' => 'to_register12_dout_net',
4151 
          'to_register12_en' => 'constant6_op_net_x4',
4152 
          'to_register13_ce' => 'ce_1_sg_x0',
4153 
          'to_register13_clk' => 'clk_1_sg_x0',
4154 
          'to_register13_clr' => [
4155 
            'constant',
4156 
            '\'0\'',
4157 
          ],
4158 
          'to_register13_data_in' => 'data_in_x4_net',
4159 
          'to_register13_dout' => 'to_register13_dout_net',
4160 
          'to_register13_en' => 'constant6_op_net_x5',
4161 
          'to_register14_ce' => 'ce_1_sg_x0',
4162 
          'to_register14_clk' => 'clk_1_sg_x0',
4163 
          'to_register14_clr' => [
4164 
            'constant',
4165 
            '\'0\'',
4166 
          ],
4167 
          'to_register14_data_in' => 'data_in_x5_net',
4168 
          'to_register14_dout' => 'to_register14_dout_net',
4169 
          'to_register14_en' => 'constant6_op_net_x6',
4170 
          'to_register15_ce' => 'ce_1_sg_x0',
4171 
          'to_register15_clk' => 'clk_1_sg_x0',
4172 
          'to_register15_clr' => [
4173 
            'constant',
4174 
            '\'0\'',
4175 
          ],
4176 
          'to_register15_data_in' => 'data_in_x6_net',
4177 
          'to_register15_dout' => 'to_register15_dout_net',
4178 
          'to_register15_en' => 'constant6_op_net_x7',
4179 
          'to_register16_ce' => 'ce_1_sg_x0',
4180 
          'to_register16_clk' => 'clk_1_sg_x0',
4181 
          'to_register16_clr' => [
4182 
            'constant',
4183 
            '\'0\'',
4184 
          ],
4185 
          'to_register16_data_in' => 'data_in_x7_net',
4186 
          'to_register16_dout' => 'to_register16_dout_net',
4187 
          'to_register16_en' => 'constant6_op_net_x8',
4188 
          'to_register17_ce' => 'ce_1_sg_x0',
4189 
          'to_register17_clk' => 'clk_1_sg_x0',
4190 
          'to_register17_clr' => [
4191 
            'constant',
4192 
            '\'0\'',
4193 
          ],
4194 
          'to_register17_data_in' => 'data_in_x8_net',
4195 
          'to_register17_dout' => 'to_register17_dout_net',
4196 
          'to_register17_en' => 'constant6_op_net_x9',
4197 
          'to_register18_ce' => 'ce_1_sg_x0',
4198 
          'to_register18_clk' => 'clk_1_sg_x0',
4199 
          'to_register18_clr' => [
4200 
            'constant',
4201 
            '\'0\'',
4202 
          ],
4203 
          'to_register18_data_in' => 'data_in_x9_net',
4204 
          'to_register18_dout' => 'to_register18_dout_net',
4205 
          'to_register18_en' => 'constant6_op_net_x10',
4206 
          'to_register19_ce' => 'ce_1_sg_x0',
4207 
          'to_register19_clk' => 'clk_1_sg_x0',
4208 
          'to_register19_clr' => [
4209 
            'constant',
4210 
            '\'0\'',
4211 
          ],
4212 
          'to_register19_data_in' => 'data_in_x10_net',
4213 
          'to_register19_dout' => 'to_register19_dout_net',
4214 
          'to_register19_en' => 'constant6_op_net_x11',
4215 
          'to_register1_ce' => 'ce_1_sg_x0',
4216 
          'to_register1_clk' => 'clk_1_sg_x0',
4217 
          'to_register1_clr' => [
4218 
            'constant',
4219 
            '\'0\'',
4220 
          ],
4221 
          'to_register1_data_in' => 'data_in_x0_net',
4222 
          'to_register1_dout' => 'to_register1_dout_net',
4223 
          'to_register1_en' => 'constant6_op_net_x1',
4224 
          'to_register20_ce' => 'ce_1_sg_x0',
4225 
          'to_register20_clk' => 'clk_1_sg_x0',
4226 
          'to_register20_clr' => [
4227 
            'constant',
4228 
            '\'0\'',
4229 
          ],
4230 
          'to_register20_data_in' => 'data_in_x12_net',
4231 
          'to_register20_dout' => 'to_register20_dout_net',
4232 
          'to_register20_en' => 'constant6_op_net_x13',
4233 
          'to_register21_ce' => 'ce_1_sg_x0',
4234 
          'to_register21_clk' => 'clk_1_sg_x0',
4235 
          'to_register21_clr' => [
4236 
            'constant',
4237 
            '\'0\'',
4238 
          ],
4239 
          'to_register21_data_in' => 'data_in_x13_net',
4240 
          'to_register21_dout' => 'to_register21_dout_net',
4241 
          'to_register21_en' => 'constant6_op_net_x14',
4242 
          'to_register22_ce' => 'ce_1_sg_x0',
4243 
          'to_register22_clk' => 'clk_1_sg_x0',
4244 
          'to_register22_clr' => [
4245 
            'constant',
4246 
            '\'0\'',
4247 
          ],
4248 
          'to_register22_data_in' => 'data_in_x14_net',
4249 
          'to_register22_dout' => 'to_register22_dout_net',
4250 
          'to_register22_en' => 'constant6_op_net_x15',
4251 
          'to_register23_ce' => 'ce_1_sg_x0',
4252 
          'to_register23_clk' => 'clk_1_sg_x0',
4253 
          'to_register23_clr' => [
4254 
            'constant',
4255 
            '\'0\'',
4256 
          ],
4257 
          'to_register23_data_in' => 'data_in_x15_net',
4258 
          'to_register23_dout' => 'to_register23_dout_net',
4259 
          'to_register23_en' => 'constant6_op_net_x16',
4260 
          'to_register24_ce' => 'ce_1_sg_x0',
4261 
          'to_register24_clk' => 'clk_1_sg_x0',
4262 
          'to_register24_clr' => [
4263 
            'constant',
4264 
            '\'0\'',
4265 
          ],
4266 
          'to_register24_data_in' => 'data_in_x16_net',
4267 
          'to_register24_dout' => 'to_register24_dout_net',
4268 
          'to_register24_en' => 'constant6_op_net_x17',
4269 
          'to_register25_ce' => 'ce_1_sg_x0',
4270 
          'to_register25_clk' => 'clk_1_sg_x0',
4271 
          'to_register25_clr' => [
4272 
            'constant',
4273 
            '\'0\'',
4274 
          ],
4275 
          'to_register25_data_in' => 'data_in_x17_net',
4276 
          'to_register25_dout' => 'to_register25_dout_net',
4277 
          'to_register25_en' => 'constant6_op_net_x18',
4278 
          'to_register26_ce' => 'ce_1_sg_x0',
4279 
          'to_register26_clk' => 'clk_1_sg_x0',
4280 
          'to_register26_clr' => [
4281 
            'constant',
4282 
            '\'0\'',
4283 
          ],
4284 
          'to_register26_data_in' => 'data_in_x18_net',
4285 
          'to_register26_dout' => 'to_register26_dout_net',
4286 
          'to_register26_en' => 'constant6_op_net_x19',
4287 
          'to_register27_ce' => 'ce_1_sg_x0',
4288 
          'to_register27_clk' => 'clk_1_sg_x0',
4289 
          'to_register27_clr' => [
4290 
            'constant',
4291 
            '\'0\'',
4292 
          ],
4293 
          'to_register27_data_in' => 'data_in_x19_net',
4294 
          'to_register27_dout' => 'to_register27_dout_net',
4295 
          'to_register27_en' => 'constant6_op_net_x20',
4296 
          'to_register2_ce' => 'ce_1_sg_x0',
4297 
          'to_register2_clk' => 'clk_1_sg_x0',
4298 
          'to_register2_clr' => [
4299 
            'constant',
4300 
            '\'0\'',
4301 
          ],
4302 
          'to_register2_data_in' => 'data_in_x11_net',
4303 
          'to_register2_dout' => 'to_register2_dout_net',
4304 
          'to_register2_en' => 'constant6_op_net_x12',
4305 
          'to_register3_ce' => 'ce_1_sg_x0',
4306 
          'to_register3_clk' => 'clk_1_sg_x0',
4307 
          'to_register3_clr' => [
4308 
            'constant',
4309 
            '\'0\'',
4310 
          ],
4311 
          'to_register3_data_in' => 'data_in_x20_net',
4312 
          'to_register3_dout' => 'to_register3_dout_net',
4313 
          'to_register3_en' => 'constant6_op_net_x21',
4314 
          'to_register4_ce' => 'ce_1_sg_x0',
4315 
          'to_register4_clk' => 'clk_1_sg_x0',
4316 
          'to_register4_clr' => [
4317 
            'constant',
4318 
            '\'0\'',
4319 
          ],
4320 
          'to_register4_data_in' => 'data_in_x21_net',
4321 
          'to_register4_dout' => 'to_register4_dout_net',
4322 
          'to_register4_en' => 'constant6_op_net_x22',
4323 
          'to_register5_ce' => 'ce_1_sg_x0',
4324 
          'to_register5_clk' => 'clk_1_sg_x0',
4325 
          'to_register5_clr' => [
4326 
            'constant',
4327 
            '\'0\'',
4328 
          ],
4329 
          'to_register5_data_in' => 'data_in_x22_net',
4330 
          'to_register5_dout' => 'to_register5_dout_net',
4331 
          'to_register5_en' => 'constant6_op_net_x23',
4332 
          'to_register6_ce' => 'ce_1_sg_x0',
4333 
          'to_register6_clk' => 'clk_1_sg_x0',
4334 
          'to_register6_clr' => [
4335 
            'constant',
4336 
            '\'0\'',
4337 
          ],
4338 
          'to_register6_data_in' => 'data_in_x23_net',
4339 
          'to_register6_dout' => 'to_register6_dout_net',
4340 
          'to_register6_en' => 'constant6_op_net_x24',
4341 
          'to_register7_ce' => 'ce_1_sg_x0',
4342 
          'to_register7_clk' => 'clk_1_sg_x0',
4343 
          'to_register7_clr' => [
4344 
            'constant',
4345 
            '\'0\'',
4346 
          ],
4347 
          'to_register7_data_in' => 'data_in_x24_net',
4348 
          'to_register7_dout' => 'to_register7_dout_net',
4349 
          'to_register7_en' => 'constant6_op_net_x25',
4350 
          'to_register8_ce' => 'ce_1_sg_x0',
4351 
          'to_register8_clk' => 'clk_1_sg_x0',
4352 
          'to_register8_clr' => [
4353 
            'constant',
4354 
            '\'0\'',
4355 
          ],
4356 
          'to_register8_data_in' => 'data_in_x25_net',
4357 
          'to_register8_dout' => 'to_register8_dout_net',
4358 
          'to_register8_en' => 'constant6_op_net_x26',
4359 
          'to_register9_ce' => 'ce_1_sg_x0',
4360 
          'to_register9_clk' => 'clk_1_sg_x0',
4361 
          'to_register9_clr' => [
4362 
            'constant',
4363 
            '\'0\'',
4364 
          ],
4365 
          'to_register9_data_in' => 'data_in_x26_net',
4366 
          'to_register9_dout' => 'to_register9_dout_net',
4367 
          'to_register9_en' => 'constant6_op_net_x27',
4368 
          'to_register_ce' => 'ce_1_sg_x0',
4369 
          'to_register_clk' => 'clk_1_sg_x0',
4370 
          'to_register_clr' => [
4371 
            'constant',
4372 
            '\'0\'',
4373 
          ],
4374 
          'to_register_data_in' => 'data_in_net',
4375 
          'to_register_dout' => 'to_register_dout_net',
4376 
          'to_register_en' => 'constant6_op_net_x0',
4377 
          'user_int_1o' => 'user_int_1o_net',
4378 
          'user_int_2o' => 'user_int_2o_net',
4379 
          'user_int_3o' => 'user_int_3o_net',
4380 
        },
4381 
        'entityName' => 'user_logic_cw',
4382 
        'nets' => {
4383 
          'bram_rd_addr_net' => {
4384 
            'attributes' => {
4385 
              'hdlNetAttributes' => [
4386 
              ],
4387 
            },
4388 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4389 
            'width' => 12,
4390 
          },
4391 
          'bram_rd_dout_net' => {
4392 
            'attributes' => {
4393 
              'hdlNetAttributes' => [
4394 
              ],
4395 
            },
4396 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4397 
            'width' => 64,
4398 
          },
4399 
          'bram_wr_addr_net' => {
4400 
            'attributes' => {
4401 
              'hdlNetAttributes' => [
4402 
              ],
4403 
            },
4404 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4405 
            'width' => 12,
4406 
          },
4407 
          'bram_wr_din_net' => {
4408 
            'attributes' => {
4409 
              'hdlNetAttributes' => [
4410 
              ],
4411 
            },
4412 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4413 
            'width' => 64,
4414 
          },
4415 
          'bram_wr_en_net' => {
4416 
            'attributes' => {
4417 
              'hdlNetAttributes' => [
4418 
              ],
4419 
            },
4420 
            'hdlType' => 'std_logic_vector(7 downto 0)',
4421 
            'width' => 8,
4422 
          },
4423 
          'ce_1_sg_x0' => {
4424 
            'attributes' => {
4425 
              'hdlNetAttributes' => [
4426 
                [
4427 
                  'MAX_FANOUT',
4428 
                  'string',
4429 
                  '"REDUCE"',
4430 
                ],
4431 
              ],
4432 
            },
4433 
            'hdlType' => 'std_logic',
4434 
            'width' => 1,
4435 
          },
4436 
          'clkNet' => {
4437 
            'attributes' => {
4438 
              'hdlNetAttributes' => [
4439 
              ],
4440 
            },
4441 
            'hdlType' => 'std_logic',
4442 
            'width' => 1,
4443 
          },
4444 
          'clk_1_sg_x0' => {
4445 
            'attributes' => {
4446 
              'hdlNetAttributes' => [
4447 
              ],
4448 
            },
4449 
            'hdlType' => 'std_logic',
4450 
            'width' => 1,
4451 
          },
4452 
          'constant6_op_net_x0' => {
4453 
            'attributes' => {
4454 
              'hdlNetAttributes' => [
4455 
              ],
4456 
            },
4457 
            'hdlType' => 'std_logic',
4458 
            'width' => 1,
4459 
          },
4460 
          'constant6_op_net_x1' => {
4461 
            'attributes' => {
4462 
              'hdlNetAttributes' => [
4463 
              ],
4464 
            },
4465 
            'hdlType' => 'std_logic',
4466 
            'width' => 1,
4467 
          },
4468 
          'constant6_op_net_x10' => {
4469 
            'attributes' => {
4470 
              'hdlNetAttributes' => [
4471 
              ],
4472 
            },
4473 
            'hdlType' => 'std_logic',
4474 
            'width' => 1,
4475 
          },
4476 
          'constant6_op_net_x11' => {
4477 
            'attributes' => {
4478 
              'hdlNetAttributes' => [
4479 
              ],
4480 
            },
4481 
            'hdlType' => 'std_logic',
4482 
            'width' => 1,
4483 
          },
4484 
          'constant6_op_net_x12' => {
4485 
            'attributes' => {
4486 
              'hdlNetAttributes' => [
4487 
              ],
4488 
            },
4489 
            'hdlType' => 'std_logic',
4490 
            'width' => 1,
4491 
          },
4492 
          'constant6_op_net_x13' => {
4493 
            'attributes' => {
4494 
              'hdlNetAttributes' => [
4495 
              ],
4496 
            },
4497 
            'hdlType' => 'std_logic',
4498 
            'width' => 1,
4499 
          },
4500 
          'constant6_op_net_x14' => {
4501 
            'attributes' => {
4502 
              'hdlNetAttributes' => [
4503 
              ],
4504 
            },
4505 
            'hdlType' => 'std_logic',
4506 
            'width' => 1,
4507 
          },
4508 
          'constant6_op_net_x15' => {
4509 
            'attributes' => {
4510 
              'hdlNetAttributes' => [
4511 
              ],
4512 
            },
4513 
            'hdlType' => 'std_logic',
4514 
            'width' => 1,
4515 
          },
4516 
          'constant6_op_net_x16' => {
4517 
            'attributes' => {
4518 
              'hdlNetAttributes' => [
4519 
              ],
4520 
            },
4521 
            'hdlType' => 'std_logic',
4522 
            'width' => 1,
4523 
          },
4524 
          'constant6_op_net_x17' => {
4525 
            'attributes' => {
4526 
              'hdlNetAttributes' => [
4527 
              ],
4528 
            },
4529 
            'hdlType' => 'std_logic',
4530 
            'width' => 1,
4531 
          },
4532 
          'constant6_op_net_x18' => {
4533 
            'attributes' => {
4534 
              'hdlNetAttributes' => [
4535 
              ],
4536 
            },
4537 
            'hdlType' => 'std_logic',
4538 
            'width' => 1,
4539 
          },
4540 
          'constant6_op_net_x19' => {
4541 
            'attributes' => {
4542 
              'hdlNetAttributes' => [
4543 
              ],
4544 
            },
4545 
            'hdlType' => 'std_logic',
4546 
            'width' => 1,
4547 
          },
4548 
          'constant6_op_net_x2' => {
4549 
            'attributes' => {
4550 
              'hdlNetAttributes' => [
4551 
              ],
4552 
            },
4553 
            'hdlType' => 'std_logic',
4554 
            'width' => 1,
4555 
          },
4556 
          'constant6_op_net_x20' => {
4557 
            'attributes' => {
4558 
              'hdlNetAttributes' => [
4559 
              ],
4560 
            },
4561 
            'hdlType' => 'std_logic',
4562 
            'width' => 1,
4563 
          },
4564 
          'constant6_op_net_x21' => {
4565 
            'attributes' => {
4566 
              'hdlNetAttributes' => [
4567 
              ],
4568 
            },
4569 
            'hdlType' => 'std_logic',
4570 
            'width' => 1,
4571 
          },
4572 
          'constant6_op_net_x22' => {
4573 
            'attributes' => {
4574 
              'hdlNetAttributes' => [
4575 
              ],
4576 
            },
4577 
            'hdlType' => 'std_logic',
4578 
            'width' => 1,
4579 
          },
4580 
          'constant6_op_net_x23' => {
4581 
            'attributes' => {
4582 
              'hdlNetAttributes' => [
4583 
              ],
4584 
            },
4585 
            'hdlType' => 'std_logic',
4586 
            'width' => 1,
4587 
          },
4588 
          'constant6_op_net_x24' => {
4589 
            'attributes' => {
4590 
              'hdlNetAttributes' => [
4591 
              ],
4592 
            },
4593 
            'hdlType' => 'std_logic',
4594 
            'width' => 1,
4595 
          },
4596 
          'constant6_op_net_x25' => {
4597 
            'attributes' => {
4598 
              'hdlNetAttributes' => [
4599 
              ],
4600 
            },
4601 
            'hdlType' => 'std_logic',
4602 
            'width' => 1,
4603 
          },
4604 
          'constant6_op_net_x26' => {
4605 
            'attributes' => {
4606 
              'hdlNetAttributes' => [
4607 
              ],
4608 
            },
4609 
            'hdlType' => 'std_logic',
4610 
            'width' => 1,
4611 
          },
4612 
          'constant6_op_net_x27' => {
4613 
            'attributes' => {
4614 
              'hdlNetAttributes' => [
4615 
              ],
4616 
            },
4617 
            'hdlType' => 'std_logic',
4618 
            'width' => 1,
4619 
          },
4620 
          'constant6_op_net_x3' => {
4621 
            'attributes' => {
4622 
              'hdlNetAttributes' => [
4623 
              ],
4624 
            },
4625 
            'hdlType' => 'std_logic',
4626 
            'width' => 1,
4627 
          },
4628 
          'constant6_op_net_x4' => {
4629 
            'attributes' => {
4630 
              'hdlNetAttributes' => [
4631 
              ],
4632 
            },
4633 
            'hdlType' => 'std_logic',
4634 
            'width' => 1,
4635 
          },
4636 
          'constant6_op_net_x5' => {
4637 
            'attributes' => {
4638 
              'hdlNetAttributes' => [
4639 
              ],
4640 
            },
4641 
            'hdlType' => 'std_logic',
4642 
            'width' => 1,
4643 
          },
4644 
          'constant6_op_net_x6' => {
4645 
            'attributes' => {
4646 
              'hdlNetAttributes' => [
4647 
              ],
4648 
            },
4649 
            'hdlType' => 'std_logic',
4650 
            'width' => 1,
4651 
          },
4652 
          'constant6_op_net_x7' => {
4653 
            'attributes' => {
4654 
              'hdlNetAttributes' => [
4655 
              ],
4656 
            },
4657 
            'hdlType' => 'std_logic',
4658 
            'width' => 1,
4659 
          },
4660 
          'constant6_op_net_x8' => {
4661 
            'attributes' => {
4662 
              'hdlNetAttributes' => [
4663 
              ],
4664 
            },
4665 
            'hdlType' => 'std_logic',
4666 
            'width' => 1,
4667 
          },
4668 
          'constant6_op_net_x9' => {
4669 
            'attributes' => {
4670 
              'hdlNetAttributes' => [
4671 
              ],
4672 
            },
4673 
            'hdlType' => 'std_logic',
4674 
            'width' => 1,
4675 
          },
4676 
          'data_in_net' => {
4677 
            'attributes' => {
4678 
              'hdlNetAttributes' => [
4679 
              ],
4680 
            },
4681 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4682 
            'width' => 32,
4683 
          },
4684 
          'data_in_x0_net' => {
4685 
            'attributes' => {
4686 
              'hdlNetAttributes' => [
4687 
              ],
4688 
            },
4689 
            'hdlType' => 'std_logic',
4690 
            'width' => 1,
4691 
          },
4692 
          'data_in_x10_net' => {
4693 
            'attributes' => {
4694 
              'hdlNetAttributes' => [
4695 
              ],
4696 
            },
4697 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4698 
            'width' => 32,
4699 
          },
4700 
          'data_in_x11_net' => {
4701 
            'attributes' => {
4702 
              'hdlNetAttributes' => [
4703 
              ],
4704 
            },
4705 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4706 
            'width' => 32,
4707 
          },
4708 
          'data_in_x12_net' => {
4709 
            'attributes' => {
4710 
              'hdlNetAttributes' => [
4711 
              ],
4712 
            },
4713 
            'hdlType' => 'std_logic',
4714 
            'width' => 1,
4715 
          },
4716 
          'data_in_x13_net' => {
4717 
            'attributes' => {
4718 
              'hdlNetAttributes' => [
4719 
              ],
4720 
            },
4721 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4722 
            'width' => 32,
4723 
          },
4724 
          'data_in_x14_net' => {
4725 
            'attributes' => {
4726 
              'hdlNetAttributes' => [
4727 
              ],
4728 
            },
4729 
            'hdlType' => 'std_logic',
4730 
            'width' => 1,
4731 
          },
4732 
          'data_in_x15_net' => {
4733 
            'attributes' => {
4734 
              'hdlNetAttributes' => [
4735 
              ],
4736 
            },
4737 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4738 
            'width' => 32,
4739 
          },
4740 
          'data_in_x16_net' => {
4741 
            'attributes' => {
4742 
              'hdlNetAttributes' => [
4743 
              ],
4744 
            },
4745 
            'hdlType' => 'std_logic',
4746 
            'width' => 1,
4747 
          },
4748 
          'data_in_x17_net' => {
4749 
            'attributes' => {
4750 
              'hdlNetAttributes' => [
4751 
              ],
4752 
            },
4753 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4754 
            'width' => 32,
4755 
          },
4756 
          'data_in_x18_net' => {
4757 
            'attributes' => {
4758 
              'hdlNetAttributes' => [
4759 
              ],
4760 
            },
4761 
            'hdlType' => 'std_logic',
4762 
            'width' => 1,
4763 
          },
4764 
          'data_in_x19_net' => {
4765 
            'attributes' => {
4766 
              'hdlNetAttributes' => [
4767 
              ],
4768 
            },
4769 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4770 
            'width' => 32,
4771 
          },
4772 
          'data_in_x1_net' => {
4773 
            'attributes' => {
4774 
              'hdlNetAttributes' => [
4775 
              ],
4776 
            },
4777 
            'hdlType' => 'std_logic',
4778 
            'width' => 1,
4779 
          },
4780 
          'data_in_x20_net' => {
4781 
            'attributes' => {
4782 
              'hdlNetAttributes' => [
4783 
              ],
4784 
            },
4785 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4786 
            'width' => 32,
4787 
          },
4788 
          'data_in_x21_net' => {
4789 
            'attributes' => {
4790 
              'hdlNetAttributes' => [
4791 
              ],
4792 
            },
4793 
            'hdlType' => 'std_logic',
4794 
            'width' => 1,
4795 
          },
4796 
          'data_in_x22_net' => {
4797 
            'attributes' => {
4798 
              'hdlNetAttributes' => [
4799 
              ],
4800 
            },
4801 
            'hdlType' => 'std_logic',
4802 
            'width' => 1,
4803 
          },
4804 
          'data_in_x23_net' => {
4805 
            'attributes' => {
4806 
              'hdlNetAttributes' => [
4807 
              ],
4808 
            },
4809 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4810 
            'width' => 32,
4811 
          },
4812 
          'data_in_x24_net' => {
4813 
            'attributes' => {
4814 
              'hdlNetAttributes' => [
4815 
              ],
4816 
            },
4817 
            'hdlType' => 'std_logic',
4818 
            'width' => 1,
4819 
          },
4820 
          'data_in_x25_net' => {
4821 
            'attributes' => {
4822 
              'hdlNetAttributes' => [
4823 
              ],
4824 
            },
4825 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4826 
            'width' => 32,
4827 
          },
4828 
          'data_in_x26_net' => {
4829 
            'attributes' => {
4830 
              'hdlNetAttributes' => [
4831 
              ],
4832 
            },
4833 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4834 
            'width' => 32,
4835 
          },
4836 
          'data_in_x2_net' => {
4837 
            'attributes' => {
4838 
              'hdlNetAttributes' => [
4839 
              ],
4840 
            },
4841 
            'hdlType' => 'std_logic',
4842 
            'width' => 1,
4843 
          },
4844 
          'data_in_x3_net' => {
4845 
            'attributes' => {
4846 
              'hdlNetAttributes' => [
4847 
              ],
4848 
            },
4849 
            'hdlType' => 'std_logic',
4850 
            'width' => 1,
4851 
          },
4852 
          'data_in_x4_net' => {
4853 
            'attributes' => {
4854 
              'hdlNetAttributes' => [
4855 
              ],
4856 
            },
4857 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4858 
            'width' => 32,
4859 
          },
4860 
          'data_in_x5_net' => {
4861 
            'attributes' => {
4862 
              'hdlNetAttributes' => [
4863 
              ],
4864 
            },
4865 
            'hdlType' => 'std_logic',
4866 
            'width' => 1,
4867 
          },
4868 
          'data_in_x6_net' => {
4869 
            'attributes' => {
4870 
              'hdlNetAttributes' => [
4871 
              ],
4872 
            },
4873 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4874 
            'width' => 32,
4875 
          },
4876 
          'data_in_x7_net' => {
4877 
            'attributes' => {
4878 
              'hdlNetAttributes' => [
4879 
              ],
4880 
            },
4881 
            'hdlType' => 'std_logic',
4882 
            'width' => 1,
4883 
          },
4884 
          'data_in_x8_net' => {
4885 
            'attributes' => {
4886 
              'hdlNetAttributes' => [
4887 
              ],
4888 
            },
4889 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4890 
            'width' => 32,
4891 
          },
4892 
          'data_in_x9_net' => {
4893 
            'attributes' => {
4894 
              'hdlNetAttributes' => [
4895 
              ],
4896 
            },
4897 
            'hdlType' => 'std_logic',
4898 
            'width' => 1,
4899 
          },
4900 
          'data_out_x12_net' => {
4901 
            'attributes' => {
4902 
              'hdlNetAttributes' => [
4903 
              ],
4904 
            },
4905 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4906 
            'width' => 32,
4907 
          },
4908 
          'data_out_x13_net' => {
4909 
            'attributes' => {
4910 
              'hdlNetAttributes' => [
4911 
              ],
4912 
            },
4913 
            'hdlType' => 'std_logic',
4914 
            'width' => 1,
4915 
          },
4916 
          'data_out_x14_net' => {
4917 
            'attributes' => {
4918 
              'hdlNetAttributes' => [
4919 
              ],
4920 
            },
4921 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4922 
            'width' => 32,
4923 
          },
4924 
          'data_out_x15_net' => {
4925 
            'attributes' => {
4926 
              'hdlNetAttributes' => [
4927 
              ],
4928 
            },
4929 
            'hdlType' => 'std_logic',
4930 
            'width' => 1,
4931 
          },
4932 
          'data_out_x16_net' => {
4933 
            'attributes' => {
4934 
              'hdlNetAttributes' => [
4935 
              ],
4936 
            },
4937 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4938 
            'width' => 32,
4939 
          },
4940 
          'data_out_x17_net' => {
4941 
            'attributes' => {
4942 
              'hdlNetAttributes' => [
4943 
              ],
4944 
            },
4945 
            'hdlType' => 'std_logic',
4946 
            'width' => 1,
4947 
          },
4948 
          'data_out_x18_net' => {
4949 
            'attributes' => {
4950 
              'hdlNetAttributes' => [
4951 
              ],
4952 
            },
4953 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4954 
            'width' => 32,
4955 
          },
4956 
          'data_out_x19_net' => {
4957 
            'attributes' => {
4958 
              'hdlNetAttributes' => [
4959 
              ],
4960 
            },
4961 
            'hdlType' => 'std_logic',
4962 
            'width' => 1,
4963 
          },
4964 
          'data_out_x1_net' => {
4965 
            'attributes' => {
4966 
              'hdlNetAttributes' => [
4967 
              ],
4968 
            },
4969 
            'hdlType' => 'std_logic',
4970 
            'width' => 1,
4971 
          },
4972 
          'data_out_x20_net' => {
4973 
            'attributes' => {
4974 
              'hdlNetAttributes' => [
4975 
              ],
4976 
            },
4977 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4978 
            'width' => 32,
4979 
          },
4980 
          'data_out_x21_net' => {
4981 
            'attributes' => {
4982 
              'hdlNetAttributes' => [
4983 
              ],
4984 
            },
4985 
            'hdlType' => 'std_logic',
4986 
            'width' => 1,
4987 
          },
4988 
          'data_out_x22_net' => {
4989 
            'attributes' => {
4990 
              'hdlNetAttributes' => [
4991 
              ],
4992 
            },
4993 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4994 
            'width' => 32,
4995 
          },
4996 
          'data_out_x23_net' => {
4997 
            'attributes' => {
4998 
              'hdlNetAttributes' => [
4999 
              ],
5000 
            },
5001 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5002 
            'width' => 32,
5003 
          },
5004 
          'data_out_x24_net' => {
5005 
            'attributes' => {
5006 
              'hdlNetAttributes' => [
5007 
              ],
5008 
            },
5009 
            'hdlType' => 'std_logic',
5010 
            'width' => 1,
5011 
          },
5012 
          'data_out_x25_net' => {
5013 
            'attributes' => {
5014 
              'hdlNetAttributes' => [
5015 
              ],
5016 
            },
5017 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5018 
            'width' => 32,
5019 
          },
5020 
          'data_out_x26_net' => {
5021 
            'attributes' => {
5022 
              'hdlNetAttributes' => [
5023 
              ],
5024 
            },
5025 
            'hdlType' => 'std_logic',
5026 
            'width' => 1,
5027 
          },
5028 
          'data_out_x27_net' => {
5029 
            'attributes' => {
5030 
              'hdlNetAttributes' => [
5031 
              ],
5032 
            },
5033 
            'hdlType' => 'std_logic',
5034 
            'width' => 1,
5035 
          },
5036 
          'data_out_x28_net' => {
5037 
            'attributes' => {
5038 
              'hdlNetAttributes' => [
5039 
              ],
5040 
            },
5041 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5042 
            'width' => 32,
5043 
          },
5044 
          'data_out_x29_net' => {
5045 
            'attributes' => {
5046 
              'hdlNetAttributes' => [
5047 
              ],
5048 
            },
5049 
            'hdlType' => 'std_logic',
5050 
            'width' => 1,
5051 
          },
5052 
          'data_out_x2_net' => {
5053 
            'attributes' => {
5054 
              'hdlNetAttributes' => [
5055 
              ],
5056 
            },
5057 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5058 
            'width' => 32,
5059 
          },
5060 
          'data_out_x30_net' => {
5061 
            'attributes' => {
5062 
              'hdlNetAttributes' => [
5063 
              ],
5064 
            },
5065 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5066 
            'width' => 32,
5067 
          },
5068 
          'data_out_x31_net' => {
5069 
            'attributes' => {
5070 
              'hdlNetAttributes' => [
5071 
              ],
5072 
            },
5073 
            'hdlType' => 'std_logic',
5074 
            'width' => 1,
5075 
          },
5076 
          'data_out_x32_net' => {
5077 
            'attributes' => {
5078 
              'hdlNetAttributes' => [
5079 
              ],
5080 
            },
5081 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5082 
            'width' => 32,
5083 
          },
5084 
          'data_out_x3_net' => {
5085 
            'attributes' => {
5086 
              'hdlNetAttributes' => [
5087 
              ],
5088 
            },
5089 
            'hdlType' => 'std_logic',
5090 
            'width' => 1,
5091 
          },
5092 
          'data_out_x4_net' => {
5093 
            'attributes' => {
5094 
              'hdlNetAttributes' => [
5095 
              ],
5096 
            },
5097 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5098 
            'width' => 32,
5099 
          },
5100 
          'data_out_x5_net' => {
5101 
            'attributes' => {
5102 
              'hdlNetAttributes' => [
5103 
              ],
5104 
            },
5105 
            'hdlType' => 'std_logic',
5106 
            'width' => 1,
5107 
          },
5108 
          'data_out_x8_net' => {
5109 
            'attributes' => {
5110 
              'hdlNetAttributes' => [
5111 
              ],
5112 
            },
5113 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5114 
            'width' => 32,
5115 
          },
5116 
          'data_out_x9_net' => {
5117 
            'attributes' => {
5118 
              'hdlNetAttributes' => [
5119 
              ],
5120 
            },
5121 
            'hdlType' => 'std_logic',
5122 
            'width' => 1,
5123 
          },
5124 
          'fifo_rd_count_net' => {
5125 
            'attributes' => {
5126 
              'hdlNetAttributes' => [
5127 
              ],
5128 
            },
5129 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5130 
            'width' => 15,
5131 
          },
5132 
          'fifo_rd_dout_net' => {
5133 
            'attributes' => {
5134 
              'hdlNetAttributes' => [
5135 
              ],
5136 
            },
5137 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5138 
            'width' => 72,
5139 
          },
5140 
          'fifo_rd_empty_net' => {
5141 
            'attributes' => {
5142 
              'hdlNetAttributes' => [
5143 
              ],
5144 
            },
5145 
            'hdlType' => 'std_logic',
5146 
            'width' => 1,
5147 
          },
5148 
          'fifo_rd_en_net' => {
5149 
            'attributes' => {
5150 
              'hdlNetAttributes' => [
5151 
              ],
5152 
            },
5153 
            'hdlType' => 'std_logic',
5154 
            'width' => 1,
5155 
          },
5156 
          'fifo_rd_pempty_net' => {
5157 
            'attributes' => {
5158 
              'hdlNetAttributes' => [
5159 
              ],
5160 
            },
5161 
            'hdlType' => 'std_logic',
5162 
            'width' => 1,
5163 
          },
5164 
          'fifo_rd_valid_net' => {
5165 
            'attributes' => {
5166 
              'hdlNetAttributes' => [
5167 
              ],
5168 
            },
5169 
            'hdlType' => 'std_logic',
5170 
            'width' => 1,
5171 
          },
5172 
          'fifo_wr_count_net' => {
5173 
            'attributes' => {
5174 
              'hdlNetAttributes' => [
5175 
              ],
5176 
            },
5177 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5178 
            'width' => 15,
5179 
          },
5180 
          'fifo_wr_din_net' => {
5181 
            'attributes' => {
5182 
              'hdlNetAttributes' => [
5183 
              ],
5184 
            },
5185 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5186 
            'width' => 72,
5187 
          },
5188 
          'fifo_wr_en_net' => {
5189 
            'attributes' => {
5190 
              'hdlNetAttributes' => [
5191 
              ],
5192 
            },
5193 
            'hdlType' => 'std_logic',
5194 
            'width' => 1,
5195 
          },
5196 
          'fifo_wr_full_net' => {
5197 
            'attributes' => {
5198 
              'hdlNetAttributes' => [
5199 
              ],
5200 
            },
5201 
            'hdlType' => 'std_logic',
5202 
            'width' => 1,
5203 
          },
5204 
          'fifo_wr_pfull_net' => {
5205 
            'attributes' => {
5206 
              'hdlNetAttributes' => [
5207 
              ],
5208 
            },
5209 
            'hdlType' => 'std_logic',
5210 
            'width' => 1,
5211 
          },
5212 
          'from_register15_data_out_net' => {
5213 
            'attributes' => {
5214 
              'hdlNetAttributes' => [
5215 
              ],
5216 
            },
5217 
            'hdlType' => 'std_logic',
5218 
            'width' => 1,
5219 
          },
5220 
          'from_register16_data_out_net' => {
5221 
            'attributes' => {
5222 
              'hdlNetAttributes' => [
5223 
              ],
5224 
            },
5225 
            'hdlType' => 'std_logic',
5226 
            'width' => 1,
5227 
          },
5228 
          'from_register19_data_out_net' => {
5229 
            'attributes' => {
5230 
              'hdlNetAttributes' => [
5231 
              ],
5232 
            },
5233 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5234 
            'width' => 32,
5235 
          },
5236 
          'from_register1_data_out_net' => {
5237 
            'attributes' => {
5238 
              'hdlNetAttributes' => [
5239 
              ],
5240 
            },
5241 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5242 
            'width' => 32,
5243 
          },
5244 
          'from_register2_data_out_net' => {
5245 
            'attributes' => {
5246 
              'hdlNetAttributes' => [
5247 
              ],
5248 
            },
5249 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5250 
            'width' => 32,
5251 
          },
5252 
          'from_register_data_out_net' => {
5253 
            'attributes' => {
5254 
              'hdlNetAttributes' => [
5255 
              ],
5256 
            },
5257 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5258 
            'width' => 32,
5259 
          },
5260 
          'persistentdff_inst_q' => {
5261 
            'attributes' => {
5262 
              'hdlNetAttributes' => [
5263 
                [
5264 
                  'syn_keep',
5265 
                  'boolean',
5266 
                  'true',
5267 
                ],
5268 
                [
5269 
                  'keep',
5270 
                  'boolean',
5271 
                  'true',
5272 
                ],
5273 
                [
5274 
                  'preserve_signal',
5275 
                  'boolean',
5276 
                  'true',
5277 
                ],
5278 
              ],
5279 
            },
5280 
            'hdlType' => 'std_logic',
5281 
            'width' => 1,
5282 
          },
5283 
          'rst_i_net' => {
5284 
            'attributes' => {
5285 
              'hdlNetAttributes' => [
5286 
              ],
5287 
            },
5288 
            'hdlType' => 'std_logic',
5289 
            'width' => 1,
5290 
          },
5291 
          'rst_o_net' => {
5292 
            'attributes' => {
5293 
              'hdlNetAttributes' => [
5294 
              ],
5295 
            },
5296 
            'hdlType' => 'std_logic',
5297 
            'width' => 1,
5298 
          },
5299 
          'to_register10_dout_net' => {
5300 
            'attributes' => {
5301 
              'hdlNetAttributes' => [
5302 
              ],
5303 
            },
5304 
            'hdlType' => 'std_logic',
5305 
            'width' => 1,
5306 
          },
5307 
          'to_register11_dout_net' => {
5308 
            'attributes' => {
5309 
              'hdlNetAttributes' => [
5310 
              ],
5311 
            },
5312 
            'hdlType' => 'std_logic',
5313 
            'width' => 1,
5314 
          },
5315 
          'to_register12_dout_net' => {
5316 
            'attributes' => {
5317 
              'hdlNetAttributes' => [
5318 
              ],
5319 
            },
5320 
            'hdlType' => 'std_logic',
5321 
            'width' => 1,
5322 
          },
5323 
          'to_register13_dout_net' => {
5324 
            'attributes' => {
5325 
              'hdlNetAttributes' => [
5326 
              ],
5327 
            },
5328 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5329 
            'width' => 32,
5330 
          },
5331 
          'to_register14_dout_net' => {
5332 
            'attributes' => {
5333 
              'hdlNetAttributes' => [
5334 
              ],
5335 
            },
5336 
            'hdlType' => 'std_logic',
5337 
            'width' => 1,
5338 
          },
5339 
          'to_register15_dout_net' => {
5340 
            'attributes' => {
5341 
              'hdlNetAttributes' => [
5342 
              ],
5343 
            },
5344 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5345 
            'width' => 32,
5346 
          },
5347 
          'to_register16_dout_net' => {
5348 
            'attributes' => {
5349 
              'hdlNetAttributes' => [
5350 
              ],
5351 
            },
5352 
            'hdlType' => 'std_logic',
5353 
            'width' => 1,
5354 
          },
5355 
          'to_register17_dout_net' => {
5356 
            'attributes' => {
5357 
              'hdlNetAttributes' => [
5358 
              ],
5359 
            },
5360 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5361 
            'width' => 32,
5362 
          },
5363 
          'to_register18_dout_net' => {
5364 
            'attributes' => {
5365 
              'hdlNetAttributes' => [
5366 
              ],
5367 
            },
5368 
            'hdlType' => 'std_logic',
5369 
            'width' => 1,
5370 
          },
5371 
          'to_register19_dout_net' => {
5372 
            'attributes' => {
5373 
              'hdlNetAttributes' => [
5374 
              ],
5375 
            },
5376 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5377 
            'width' => 32,
5378 
          },
5379 
          'to_register1_dout_net' => {
5380 
            'attributes' => {
5381 
              'hdlNetAttributes' => [
5382 
              ],
5383 
            },
5384 
            'hdlType' => 'std_logic',
5385 
            'width' => 1,
5386 
          },
5387 
          'to_register20_dout_net' => {
5388 
            'attributes' => {
5389 
              'hdlNetAttributes' => [
5390 
              ],
5391 
            },
5392 
            'hdlType' => 'std_logic',
5393 
            'width' => 1,
5394 
          },
5395 
          'to_register21_dout_net' => {
5396 
            'attributes' => {
5397 
              'hdlNetAttributes' => [
5398 
              ],
5399 
            },
5400 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5401 
            'width' => 32,
5402 
          },
5403 
          'to_register22_dout_net' => {
5404 
            'attributes' => {
5405 
              'hdlNetAttributes' => [
5406 
              ],
5407 
            },
5408 
            'hdlType' => 'std_logic',
5409 
            'width' => 1,
5410 
          },
5411 
          'to_register23_dout_net' => {
5412 
            'attributes' => {
5413 
              'hdlNetAttributes' => [
5414 
              ],
5415 
            },
5416 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5417 
            'width' => 32,
5418 
          },
5419 
          'to_register24_dout_net' => {
5420 
            'attributes' => {
5421 
              'hdlNetAttributes' => [
5422 
              ],
5423 
            },
5424 
            'hdlType' => 'std_logic',
5425 
            'width' => 1,
5426 
          },
5427 
          'to_register25_dout_net' => {
5428 
            'attributes' => {
5429 
              'hdlNetAttributes' => [
5430 
              ],
5431 
            },
5432 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5433 
            'width' => 32,
5434 
          },
5435 
          'to_register26_dout_net' => {
5436 
            'attributes' => {
5437 
              'hdlNetAttributes' => [
5438 
              ],
5439 
            },
5440 
            'hdlType' => 'std_logic',
5441 
            'width' => 1,
5442 
          },
5443 
          'to_register27_dout_net' => {
5444 
            'attributes' => {
5445 
              'hdlNetAttributes' => [
5446 
              ],
5447 
            },
5448 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5449 
            'width' => 32,
5450 
          },
5451 
          'to_register2_dout_net' => {
5452 
            'attributes' => {
5453 
              'hdlNetAttributes' => [
5454 
              ],
5455 
            },
5456 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5457 
            'width' => 32,
5458 
          },
5459 
          'to_register3_dout_net' => {
5460 
            'attributes' => {
5461 
              'hdlNetAttributes' => [
5462 
              ],
5463 
            },
5464 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5465 
            'width' => 32,
5466 
          },
5467 
          'to_register4_dout_net' => {
5468 
            'attributes' => {
5469 
              'hdlNetAttributes' => [
5470 
              ],
5471 
            },
5472 
            'hdlType' => 'std_logic',
5473 
            'width' => 1,
5474 
          },
5475 
          'to_register5_dout_net' => {
5476 
            'attributes' => {
5477 
              'hdlNetAttributes' => [
5478 
              ],
5479 
            },
5480 
            'hdlType' => 'std_logic',
5481 
            'width' => 1,
5482 
          },
5483 
          'to_register6_dout_net' => {
5484 
            'attributes' => {
5485 
              'hdlNetAttributes' => [
5486 
              ],
5487 
            },
5488 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5489 
            'width' => 32,
5490 
          },
5491 
          'to_register7_dout_net' => {
5492 
            'attributes' => {
5493 
              'hdlNetAttributes' => [
5494 
              ],
5495 
            },
5496 
            'hdlType' => 'std_logic',
5497 
            'width' => 1,
5498 
          },
5499 
          'to_register8_dout_net' => {
5500 
            'attributes' => {
5501 
              'hdlNetAttributes' => [
5502 
              ],
5503 
            },
5504 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5505 
            'width' => 32,
5506 
          },
5507 
          'to_register9_dout_net' => {
5508 
            'attributes' => {
5509 
              'hdlNetAttributes' => [
5510 
              ],
5511 
            },
5512 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5513 
            'width' => 32,
5514 
          },
5515 
          'to_register_dout_net' => {
5516 
            'attributes' => {
5517 
              'hdlNetAttributes' => [
5518 
              ],
5519 
            },
5520 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5521 
            'width' => 32,
5522 
          },
5523 
          'user_int_1o_net' => {
5524 
            'attributes' => {
5525 
              'hdlNetAttributes' => [
5526 
              ],
5527 
            },
5528 
            'hdlType' => 'std_logic',
5529 
            'width' => 1,
5530 
          },
5531 
          'user_int_2o_net' => {
5532 
            'attributes' => {
5533 
              'hdlNetAttributes' => [
5534 
              ],
5535 
            },
5536 
            'hdlType' => 'std_logic',
5537 
            'width' => 1,
5538 
          },
5539 
          'user_int_3o_net' => {
5540 
            'attributes' => {
5541 
              'hdlNetAttributes' => [
5542 
              ],
5543 
            },
5544 
            'hdlType' => 'std_logic',
5545 
            'width' => 1,
5546 
          },
5547 
        },
5548 
        'ports' => {
5549 
          'bram_rd_addr' => {
5550 
            'attributes' => {
5551 
              'bin_pt' => 0,
5552 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
5553 
              'is_floating_block' => 1,
5554 
              'is_gateway_port' => 1,
5555 
              'must_be_hdl_vector' => 1,
5556 
              'period' => 1,
5557 
              'port_id' => 0,
5558 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
5559 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
5560 
              'timingConstraint' => 'none',
5561 
              'type' => 'UFix_12_0',
5562 
            },
5563 
            'direction' => 'out',
5564 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5565 
            'width' => 12,
5566 
          },
5567 
          'bram_rd_dout' => {
5568 
            'attributes' => {
5569 
              'bin_pt' => 0,
5570 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
5571 
              'is_floating_block' => 1,
5572 
              'is_gateway_port' => 1,
5573 
              'must_be_hdl_vector' => 1,
5574 
              'period' => 1,
5575 
              'port_id' => 0,
5576 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
5577 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
5578 
              'timingConstraint' => 'none',
5579 
              'type' => 'UFix_64_0',
5580 
            },
5581 
            'direction' => 'in',
5582 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5583 
            'width' => 64,
5584 
          },
5585 
          'bram_wr_addr' => {
5586 
            'attributes' => {
5587 
              'bin_pt' => 0,
5588 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
5589 
              'is_floating_block' => 1,
5590 
              'is_gateway_port' => 1,
5591 
              'must_be_hdl_vector' => 1,
5592 
              'period' => 1,
5593 
              'port_id' => 0,
5594 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
5595 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
5596 
              'timingConstraint' => 'none',
5597 
              'type' => 'UFix_12_0',
5598 
            },
5599 
            'direction' => 'out',
5600 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5601 
            'width' => 12,
5602 
          },
5603 
          'bram_wr_din' => {
5604 
            'attributes' => {
5605 
              'bin_pt' => 0,
5606 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
5607 
              'is_floating_block' => 1,
5608 
              'is_gateway_port' => 1,
5609 
              'must_be_hdl_vector' => 1,
5610 
              'period' => 1,
5611 
              'port_id' => 0,
5612 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
5613 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
5614 
              'timingConstraint' => 'none',
5615 
              'type' => 'UFix_64_0',
5616 
            },
5617 
            'direction' => 'out',
5618 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5619 
            'width' => 64,
5620 
          },
5621 
          'bram_wr_en' => {
5622 
            'attributes' => {
5623 
              'bin_pt' => 0,
5624 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
5625 
              'is_floating_block' => 1,
5626 
              'is_gateway_port' => 1,
5627 
              'must_be_hdl_vector' => 1,
5628 
              'period' => 1,
5629 
              'port_id' => 0,
5630 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
5631 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
5632 
              'timingConstraint' => 'none',
5633 
              'type' => 'UFix_8_0',
5634 
            },
5635 
            'direction' => 'out',
5636 
            'hdlType' => 'std_logic_vector(7 downto 0)',
5637 
            'width' => 8,
5638 
          },
5639 
          'ce' => {
5640 
            'attributes' => {
5641 
              'defaultHdlValue' => '\'1\'',
5642 
              'domain' => 'default',
5643 
              'group' => 6,
5644 
              'isCe' => 1,
5645 
              'period' => 1,
5646 
            },
5647 
            'direction' => 'in',
5648 
            'hdlType' => 'std_logic',
5649 
            'width' => 1,
5650 
          },
5651 
          'clk' => {
5652 
            'attributes' => {
5653 
              'domain' => 'default',
5654 
              'group' => 6,
5655 
              'isClk' => 1,
5656 
              'period' => 1,
5657 
              'type' => 'logic',
5658 
            },
5659 
            'direction' => 'in',
5660 
            'hdlType' => 'std_logic',
5661 
            'width' => 1,
5662 
          },
5663 
          'fifo_rd_count' => {
5664 
            'attributes' => {
5665 
              'bin_pt' => 0,
5666 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
5667 
              'is_floating_block' => 1,
5668 
              'is_gateway_port' => 1,
5669 
              'must_be_hdl_vector' => 1,
5670 
              'period' => 1,
5671 
              'port_id' => 0,
5672 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count/FIFO_rd_count',
5673 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count',
5674 
              'timingConstraint' => 'none',
5675 
              'type' => 'UFix_15_0',
5676 
            },
5677 
            'direction' => 'in',
5678 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5679 
            'width' => 15,
5680 
          },
5681 
          'fifo_rd_dout' => {
5682 
            'attributes' => {
5683 
              'bin_pt' => 0,
5684 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
5685 
              'is_floating_block' => 1,
5686 
              'is_gateway_port' => 1,
5687 
              'must_be_hdl_vector' => 1,
5688 
              'period' => 1,
5689 
              'port_id' => 0,
5690 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
5691 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
5692 
              'timingConstraint' => 'none',
5693 
              'type' => 'UFix_72_0',
5694 
            },
5695 
            'direction' => 'in',
5696 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5697 
            'width' => 72,
5698 
          },
5699 
          'fifo_rd_empty' => {
5700 
            'attributes' => {
5701 
              'bin_pt' => 0,
5702 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
5703 
              'is_floating_block' => 1,
5704 
              'is_gateway_port' => 1,
5705 
              'must_be_hdl_vector' => 1,
5706 
              'period' => 1,
5707 
              'port_id' => 0,
5708 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
5709 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
5710 
              'timingConstraint' => 'none',
5711 
              'type' => 'Bool',
5712 
            },
5713 
            'direction' => 'in',
5714 
            'hdlType' => 'std_logic',
5715 
            'width' => 1,
5716 
          },
5717 
          'fifo_rd_en' => {
5718 
            'attributes' => {
5719 
              'bin_pt' => 0,
5720 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
5721 
              'is_floating_block' => 1,
5722 
              'is_gateway_port' => 1,
5723 
              'must_be_hdl_vector' => 1,
5724 
              'period' => 1,
5725 
              'port_id' => 0,
5726 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
5727 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
5728 
              'timingConstraint' => 'none',
5729 
              'type' => 'Bool',
5730 
            },
5731 
            'direction' => 'out',
5732 
            'hdlType' => 'std_logic',
5733 
            'width' => 1,
5734 
          },
5735 
          'fifo_rd_pempty' => {
5736 
            'attributes' => {
5737 
              'bin_pt' => 0,
5738 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
5739 
              'is_floating_block' => 1,
5740 
              'is_gateway_port' => 1,
5741 
              'must_be_hdl_vector' => 1,
5742 
              'period' => 1,
5743 
              'port_id' => 0,
5744 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty/FIFO_rd_pempty',
5745 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty',
5746 
              'timingConstraint' => 'none',
5747 
              'type' => 'Bool',
5748 
            },
5749 
            'direction' => 'in',
5750 
            'hdlType' => 'std_logic',
5751 
            'width' => 1,
5752 
          },
5753 
          'fifo_rd_valid' => {
5754 
            'attributes' => {
5755 
              'bin_pt' => 0,
5756 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
5757 
              'is_floating_block' => 1,
5758 
              'is_gateway_port' => 1,
5759 
              'must_be_hdl_vector' => 1,
5760 
              'period' => 1,
5761 
              'port_id' => 0,
5762 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
5763 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
5764 
              'timingConstraint' => 'none',
5765 
              'type' => 'Bool',
5766 
            },
5767 
            'direction' => 'in',
5768 
            'hdlType' => 'std_logic',
5769 
            'width' => 1,
5770 
          },
5771 
          'fifo_wr_count' => {
5772 
            'attributes' => {
5773 
              'bin_pt' => 0,
5774 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
5775 
              'is_floating_block' => 1,
5776 
              'is_gateway_port' => 1,
5777 
              'must_be_hdl_vector' => 1,
5778 
              'period' => 1,
5779 
              'port_id' => 0,
5780 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count/FIFO_wr_count',
5781 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count',
5782 
              'timingConstraint' => 'none',
5783 
              'type' => 'UFix_15_0',
5784 
            },
5785 
            'direction' => 'in',
5786 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5787 
            'width' => 15,
5788 
          },
5789 
          'fifo_wr_din' => {
5790 
            'attributes' => {
5791 
              'bin_pt' => 0,
5792 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
5793 
              'is_floating_block' => 1,
5794 
              'is_gateway_port' => 1,
5795 
              'must_be_hdl_vector' => 1,
5796 
              'period' => 1,
5797 
              'port_id' => 0,
5798 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
5799 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
5800 
              'timingConstraint' => 'none',
5801 
              'type' => 'UFix_72_0',
5802 
            },
5803 
            'direction' => 'out',
5804 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5805 
            'width' => 72,
5806 
          },
5807 
          'fifo_wr_en' => {
5808 
            'attributes' => {
5809 
              'bin_pt' => 0,
5810 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
5811 
              'is_floating_block' => 1,
5812 
              'is_gateway_port' => 1,
5813 
              'must_be_hdl_vector' => 1,
5814 
              'period' => 1,
5815 
              'port_id' => 0,
5816 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
5817 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
5818 
              'timingConstraint' => 'none',
5819 
              'type' => 'Bool',
5820 
            },
5821 
            'direction' => 'out',
5822 
            'hdlType' => 'std_logic',
5823 
            'width' => 1,
5824 
          },
5825 
          'fifo_wr_full' => {
5826 
            'attributes' => {
5827 
              'bin_pt' => 0,
5828 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
5829 
              'is_floating_block' => 1,
5830 
              'is_gateway_port' => 1,
5831 
              'must_be_hdl_vector' => 1,
5832 
              'period' => 1,
5833 
              'port_id' => 0,
5834 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full/FIFO_wr_full',
5835 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full',
5836 
              'timingConstraint' => 'none',
5837 
              'type' => 'Bool',
5838 
            },
5839 
            'direction' => 'in',
5840 
            'hdlType' => 'std_logic',
5841 
            'width' => 1,
5842 
          },
5843 
          'fifo_wr_pfull' => {
5844 
            'attributes' => {
5845 
              'bin_pt' => 0,
5846 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
5847 
              'is_floating_block' => 1,
5848 
              'is_gateway_port' => 1,
5849 
              'must_be_hdl_vector' => 1,
5850 
              'period' => 1,
5851 
              'port_id' => 0,
5852 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull/FIFO_wr_pfull',
5853 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull',
5854 
              'timingConstraint' => 'none',
5855 
              'type' => 'Bool',
5856 
            },
5857 
            'direction' => 'in',
5858 
            'hdlType' => 'std_logic',
5859 
            'width' => 1,
5860 
          },
5861 
          'from_register10_data_out' => {
5862 
            'attributes' => {
5863 
              'bin_pt' => 0,
5864 
              'is_floating_block' => 1,
5865 
              'must_be_hdl_vector' => 1,
5866 
              'period' => 1,
5867 
              'port_id' => 0,
5868 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
5869 
              'type' => 'UFix_1_0',
5870 
            },
5871 
            'direction' => 'in',
5872 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5873 
            'width' => 1,
5874 
          },
5875 
          'from_register11_data_out' => {
5876 
            'attributes' => {
5877 
              'bin_pt' => 0,
5878 
              'is_floating_block' => 1,
5879 
              'must_be_hdl_vector' => 1,
5880 
              'period' => 1,
5881 
              'port_id' => 0,
5882 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
5883 
              'type' => 'UFix_32_0',
5884 
            },
5885 
            'direction' => 'in',
5886 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5887 
            'width' => 32,
5888 
          },
5889 
          'from_register12_data_out' => {
5890 
            'attributes' => {
5891 
              'bin_pt' => 0,
5892 
              'is_floating_block' => 1,
5893 
              'must_be_hdl_vector' => 1,
5894 
              'period' => 1,
5895 
              'port_id' => 0,
5896 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
5897 
              'type' => 'UFix_1_0',
5898 
            },
5899 
            'direction' => 'in',
5900 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5901 
            'width' => 1,
5902 
          },
5903 
          'from_register13_data_out' => {
5904 
            'attributes' => {
5905 
              'bin_pt' => 0,
5906 
              'is_floating_block' => 1,
5907 
              'must_be_hdl_vector' => 1,
5908 
              'period' => 1,
5909 
              'port_id' => 0,
5910 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
5911 
              'type' => 'UFix_32_0',
5912 
            },
5913 
            'direction' => 'in',
5914 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5915 
            'width' => 32,
5916 
          },
5917 
          'from_register14_data_out' => {
5918 
            'attributes' => {
5919 
              'bin_pt' => 0,
5920 
              'is_floating_block' => 1,
5921 
              'must_be_hdl_vector' => 1,
5922 
              'period' => 1,
5923 
              'port_id' => 0,
5924 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
5925 
              'type' => 'UFix_1_0',
5926 
            },
5927 
            'direction' => 'in',
5928 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5929 
            'width' => 1,
5930 
          },
5931 
          'from_register15_data_out' => {
5932 
            'attributes' => {
5933 
              'bin_pt' => 0,
5934 
              'is_floating_block' => 1,
5935 
              'must_be_hdl_vector' => 1,
5936 
              'period' => 1,
5937 
              'port_id' => 0,
5938 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
5939 
              'type' => 'UFix_1_0',
5940 
            },
5941 
            'direction' => 'in',
5942 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5943 
            'width' => 1,
5944 
          },
5945 
          'from_register16_data_out' => {
5946 
            'attributes' => {
5947 
              'bin_pt' => 0,
5948 
              'is_floating_block' => 1,
5949 
              'must_be_hdl_vector' => 1,
5950 
              'period' => 1,
5951 
              'port_id' => 0,
5952 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
5953 
              'type' => 'UFix_1_0',
5954 
            },
5955 
            'direction' => 'in',
5956 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5957 
            'width' => 1,
5958 
          },
5959 
          'from_register17_data_out' => {
5960 
            'attributes' => {
5961 
              'bin_pt' => 0,
5962 
              'is_floating_block' => 1,
5963 
              'must_be_hdl_vector' => 1,
5964 
              'period' => 1,
5965 
              'port_id' => 0,
5966 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
5967 
              'type' => 'UFix_32_0',
5968 
            },
5969 
            'direction' => 'in',
5970 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5971 
            'width' => 32,
5972 
          },
5973 
          'from_register18_data_out' => {
5974 
            'attributes' => {
5975 
              'bin_pt' => 0,
5976 
              'is_floating_block' => 1,
5977 
              'must_be_hdl_vector' => 1,
5978 
              'period' => 1,
5979 
              'port_id' => 0,
5980 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
5981 
              'type' => 'UFix_1_0',
5982 
            },
5983 
            'direction' => 'in',
5984 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5985 
            'width' => 1,
5986 
          },
5987 
          'from_register19_data_out' => {
5988 
            'attributes' => {
5989 
              'bin_pt' => 0,
5990 
              'is_floating_block' => 1,
5991 
              'must_be_hdl_vector' => 1,
5992 
              'period' => 1,
5993 
              'port_id' => 0,
5994 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
5995 
              'type' => 'UFix_32_0',
5996 
            },
5997 
            'direction' => 'in',
5998 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5999 
            'width' => 32,
6000 
          },
6001 
          'from_register1_data_out' => {
6002 
            'attributes' => {
6003 
              'bin_pt' => 0,
6004 
              'is_floating_block' => 1,
6005 
              'must_be_hdl_vector' => 1,
6006 
              'period' => 1,
6007 
              'port_id' => 0,
6008 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
6009 
              'type' => 'UFix_32_0',
6010 
            },
6011 
            'direction' => 'in',
6012 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6013 
            'width' => 32,
6014 
          },
6015 
          'from_register20_data_out' => {
6016 
            'attributes' => {
6017 
              'bin_pt' => 0,
6018 
              'is_floating_block' => 1,
6019 
              'must_be_hdl_vector' => 1,
6020 
              'period' => 1,
6021 
              'port_id' => 0,
6022 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
6023 
              'type' => 'UFix_32_0',
6024 
            },
6025 
            'direction' => 'in',
6026 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6027 
            'width' => 32,
6028 
          },
6029 
          'from_register21_data_out' => {
6030 
            'attributes' => {
6031 
              'bin_pt' => 0,
6032 
              'is_floating_block' => 1,
6033 
              'must_be_hdl_vector' => 1,
6034 
              'period' => 1,
6035 
              'port_id' => 0,
6036 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
6037 
              'type' => 'UFix_1_0',
6038 
            },
6039 
            'direction' => 'in',
6040 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6041 
            'width' => 1,
6042 
          },
6043 
          'from_register22_data_out' => {
6044 
            'attributes' => {
6045 
              'bin_pt' => 0,
6046 
              'is_floating_block' => 1,
6047 
              'must_be_hdl_vector' => 1,
6048 
              'period' => 1,
6049 
              'port_id' => 0,
6050 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
6051 
              'type' => 'UFix_32_0',
6052 
            },
6053 
            'direction' => 'in',
6054 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6055 
            'width' => 32,
6056 
          },
6057 
          'from_register23_data_out' => {
6058 
            'attributes' => {
6059 
              'bin_pt' => 0,
6060 
              'is_floating_block' => 1,
6061 
              'must_be_hdl_vector' => 1,
6062 
              'period' => 1,
6063 
              'port_id' => 0,
6064 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
6065 
              'type' => 'UFix_1_0',
6066 
            },
6067 
            'direction' => 'in',
6068 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6069 
            'width' => 1,
6070 
          },
6071 
          'from_register24_data_out' => {
6072 
            'attributes' => {
6073 
              'bin_pt' => 0,
6074 
              'is_floating_block' => 1,
6075 
              'must_be_hdl_vector' => 1,
6076 
              'period' => 1,
6077 
              'port_id' => 0,
6078 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
6079 
              'type' => 'UFix_32_0',
6080 
            },
6081 
            'direction' => 'in',
6082 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6083 
            'width' => 32,
6084 
          },
6085 
          'from_register25_data_out' => {
6086 
            'attributes' => {
6087 
              'bin_pt' => 0,
6088 
              'is_floating_block' => 1,
6089 
              'must_be_hdl_vector' => 1,
6090 
              'period' => 1,
6091 
              'port_id' => 0,
6092 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
6093 
              'type' => 'UFix_1_0',
6094 
            },
6095 
            'direction' => 'in',
6096 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6097 
            'width' => 1,
6098 
          },
6099 
          'from_register26_data_out' => {
6100 
            'attributes' => {
6101 
              'bin_pt' => 0,
6102 
              'is_floating_block' => 1,
6103 
              'must_be_hdl_vector' => 1,
6104 
              'period' => 1,
6105 
              'port_id' => 0,
6106 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
6107 
              'type' => 'UFix_32_0',
6108 
            },
6109 
            'direction' => 'in',
6110 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6111 
            'width' => 32,
6112 
          },
6113 
          'from_register27_data_out' => {
6114 
            'attributes' => {
6115 
              'bin_pt' => 0,
6116 
              'is_floating_block' => 1,
6117 
              'must_be_hdl_vector' => 1,
6118 
              'period' => 1,
6119 
              'port_id' => 0,
6120 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
6121 
              'type' => 'UFix_1_0',
6122 
            },
6123 
            'direction' => 'in',
6124 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6125 
            'width' => 1,
6126 
          },
6127 
          'from_register28_data_out' => {
6128 
            'attributes' => {
6129 
              'bin_pt' => 0,
6130 
              'is_floating_block' => 1,
6131 
              'must_be_hdl_vector' => 1,
6132 
              'period' => 1,
6133 
              'port_id' => 0,
6134 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
6135 
              'type' => 'UFix_32_0',
6136 
            },
6137 
            'direction' => 'in',
6138 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6139 
            'width' => 32,
6140 
          },
6141 
          'from_register29_data_out' => {
6142 
            'attributes' => {
6143 
              'bin_pt' => 0,
6144 
              'is_floating_block' => 1,
6145 
              'must_be_hdl_vector' => 1,
6146 
              'period' => 1,
6147 
              'port_id' => 0,
6148 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
6149 
              'type' => 'UFix_1_0',
6150 
            },
6151 
            'direction' => 'in',
6152 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6153 
            'width' => 1,
6154 
          },
6155 
          'from_register2_data_out' => {
6156 
            'attributes' => {
6157 
              'bin_pt' => 0,
6158 
              'is_floating_block' => 1,
6159 
              'must_be_hdl_vector' => 1,
6160 
              'period' => 1,
6161 
              'port_id' => 0,
6162 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
6163 
              'type' => 'UFix_32_0',
6164 
            },
6165 
            'direction' => 'in',
6166 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6167 
            'width' => 32,
6168 
          },
6169 
          'from_register30_data_out' => {
6170 
            'attributes' => {
6171 
              'bin_pt' => 0,
6172 
              'is_floating_block' => 1,
6173 
              'must_be_hdl_vector' => 1,
6174 
              'period' => 1,
6175 
              'port_id' => 0,
6176 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
6177 
              'type' => 'UFix_32_0',
6178 
            },
6179 
            'direction' => 'in',
6180 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6181 
            'width' => 32,
6182 
          },
6183 
          'from_register31_data_out' => {
6184 
            'attributes' => {
6185 
              'bin_pt' => 0,
6186 
              'is_floating_block' => 1,
6187 
              'must_be_hdl_vector' => 1,
6188 
              'period' => 1,
6189 
              'port_id' => 0,
6190 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
6191 
              'type' => 'UFix_1_0',
6192 
            },
6193 
            'direction' => 'in',
6194 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6195 
            'width' => 1,
6196 
          },
6197 
          'from_register32_data_out' => {
6198 
            'attributes' => {
6199 
              'bin_pt' => 0,
6200 
              'is_floating_block' => 1,
6201 
              'must_be_hdl_vector' => 1,
6202 
              'period' => 1,
6203 
              'port_id' => 0,
6204 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
6205 
              'type' => 'UFix_32_0',
6206 
            },
6207 
            'direction' => 'in',
6208 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6209 
            'width' => 32,
6210 
          },
6211 
          'from_register33_data_out' => {
6212 
            'attributes' => {
6213 
              'bin_pt' => 0,
6214 
              'is_floating_block' => 1,
6215 
              'must_be_hdl_vector' => 1,
6216 
              'period' => 1,
6217 
              'port_id' => 0,
6218 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
6219 
              'type' => 'UFix_1_0',
6220 
            },
6221 
            'direction' => 'in',
6222 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6223 
            'width' => 1,
6224 
          },
6225 
          'from_register3_data_out' => {
6226 
            'attributes' => {
6227 
              'bin_pt' => 0,
6228 
              'is_floating_block' => 1,
6229 
              'must_be_hdl_vector' => 1,
6230 
              'period' => 1,
6231 
              'port_id' => 0,
6232 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
6233 
              'type' => 'UFix_32_0',
6234 
            },
6235 
            'direction' => 'in',
6236 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6237 
            'width' => 32,
6238 
          },
6239 
          'from_register4_data_out' => {
6240 
            'attributes' => {
6241 
              'bin_pt' => 0,
6242 
              'is_floating_block' => 1,
6243 
              'must_be_hdl_vector' => 1,
6244 
              'period' => 1,
6245 
              'port_id' => 0,
6246 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
6247 
              'type' => 'UFix_1_0',
6248 
            },
6249 
            'direction' => 'in',
6250 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6251 
            'width' => 1,
6252 
          },
6253 
          'from_register5_data_out' => {
6254 
            'attributes' => {
6255 
              'bin_pt' => 0,
6256 
              'is_floating_block' => 1,
6257 
              'must_be_hdl_vector' => 1,
6258 
              'period' => 1,
6259 
              'port_id' => 0,
6260 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
6261 
              'type' => 'UFix_32_0',
6262 
            },
6263 
            'direction' => 'in',
6264 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6265 
            'width' => 32,
6266 
          },
6267 
          'from_register6_data_out' => {
6268 
            'attributes' => {
6269 
              'bin_pt' => 0,
6270 
              'is_floating_block' => 1,
6271 
              'must_be_hdl_vector' => 1,
6272 
              'period' => 1,
6273 
              'port_id' => 0,
6274 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
6275 
              'type' => 'UFix_1_0',
6276 
            },
6277 
            'direction' => 'in',
6278 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6279 
            'width' => 1,
6280 
          },
6281 
          'from_register7_data_out' => {
6282 
            'attributes' => {
6283 
              'bin_pt' => 0,
6284 
              'is_floating_block' => 1,
6285 
              'must_be_hdl_vector' => 1,
6286 
              'period' => 1,
6287 
              'port_id' => 0,
6288 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
6289 
              'type' => 'UFix_32_0',
6290 
            },
6291 
            'direction' => 'in',
6292 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6293 
            'width' => 32,
6294 
          },
6295 
          'from_register8_data_out' => {
6296 
            'attributes' => {
6297 
              'bin_pt' => 0,
6298 
              'is_floating_block' => 1,
6299 
              'must_be_hdl_vector' => 1,
6300 
              'period' => 1,
6301 
              'port_id' => 0,
6302 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
6303 
              'type' => 'UFix_1_0',
6304 
            },
6305 
            'direction' => 'in',
6306 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6307 
            'width' => 1,
6308 
          },
6309 
          'from_register9_data_out' => {
6310 
            'attributes' => {
6311 
              'bin_pt' => 0,
6312 
              'is_floating_block' => 1,
6313 
              'must_be_hdl_vector' => 1,
6314 
              'period' => 1,
6315 
              'port_id' => 0,
6316 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
6317 
              'type' => 'UFix_32_0',
6318 
            },
6319 
            'direction' => 'in',
6320 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6321 
            'width' => 32,
6322 
          },
6323 
          'from_register_data_out' => {
6324 
            'attributes' => {
6325 
              'bin_pt' => 0,
6326 
              'is_floating_block' => 1,
6327 
              'must_be_hdl_vector' => 1,
6328 
              'period' => 1,
6329 
              'port_id' => 0,
6330 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
6331 
              'type' => 'UFix_32_0',
6332 
            },
6333 
            'direction' => 'in',
6334 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6335 
            'width' => 32,
6336 
          },
6337 
          'rst_i' => {
6338 
            'attributes' => {
6339 
              'bin_pt' => 0,
6340 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
6341 
              'is_floating_block' => 1,
6342 
              'is_gateway_port' => 1,
6343 
              'must_be_hdl_vector' => 1,
6344 
              'period' => 1,
6345 
              'port_id' => 0,
6346 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
6347 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
6348 
              'timingConstraint' => 'none',
6349 
              'type' => 'Bool',
6350 
            },
6351 
            'direction' => 'in',
6352 
            'hdlType' => 'std_logic',
6353 
            'width' => 1,
6354 
          },
6355 
          'rst_o' => {
6356 
            'attributes' => {
6357 
              'bin_pt' => 0,
6358 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
6359 
              'is_floating_block' => 1,
6360 
              'is_gateway_port' => 1,
6361 
              'must_be_hdl_vector' => 1,
6362 
              'period' => 1,
6363 
              'port_id' => 0,
6364 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
6365 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
6366 
              'timingConstraint' => 'none',
6367 
              'type' => 'Bool',
6368 
            },
6369 
            'direction' => 'out',
6370 
            'hdlType' => 'std_logic',
6371 
            'width' => 1,
6372 
          },
6373 
          'to_register10_ce' => {
6374 
            'attributes' => {
6375 
              'domain' => '',
6376 
              'group' => 1,
6377 
              'isCe' => 1,
6378 
              'is_floating_block' => 1,
6379 
              'period' => 1,
6380 
              'type' => 'logic',
6381 
            },
6382 
            'direction' => 'out',
6383 
            'hdlType' => 'std_logic',
6384 
            'width' => 1,
6385 
          },
6386 
          'to_register10_clk' => {
6387 
            'attributes' => {
6388 
              'domain' => '',
6389 
              'group' => 1,
6390 
              'isClk' => 1,
6391 
              'is_floating_block' => 1,
6392 
              'period' => 1,
6393 
              'type' => 'logic',
6394 
            },
6395 
            'direction' => 'out',
6396 
            'hdlType' => 'std_logic',
6397 
            'width' => 1,
6398 
          },
6399 
          'to_register10_clr' => {
6400 
            'attributes' => {
6401 
              'domain' => '',
6402 
              'group' => 1,
6403 
              'isClr' => 1,
6404 
              'is_floating_block' => 1,
6405 
              'period' => 1,
6406 
              'type' => 'logic',
6407 
              'valid_bit_used' => 0,
6408 
            },
6409 
            'direction' => 'out',
6410 
            'hdlType' => 'std_logic',
6411 
            'width' => 1,
6412 
          },
6413 
          'to_register10_data_in' => {
6414 
            'attributes' => {
6415 
              'bin_pt' => 0,
6416 
              'is_floating_block' => 1,
6417 
              'must_be_hdl_vector' => 1,
6418 
              'period' => 1,
6419 
              'port_id' => 0,
6420 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
6421 
              'type' => 'Bool',
6422 
            },
6423 
            'direction' => 'out',
6424 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6425 
            'width' => 1,
6426 
          },
6427 
          'to_register10_dout' => {
6428 
            'attributes' => {
6429 
              'bin_pt' => 0,
6430 
              'is_floating_block' => 1,
6431 
              'must_be_hdl_vector' => 1,
6432 
              'period' => 1,
6433 
              'port_id' => 0,
6434 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
6435 
              'type' => 'Bool',
6436 
            },
6437 
            'direction' => 'in',
6438 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6439 
            'width' => 1,
6440 
          },
6441 
          'to_register10_en' => {
6442 
            'attributes' => {
6443 
              'bin_pt' => 0,
6444 
              'is_floating_block' => 1,
6445 
              'must_be_hdl_vector' => 1,
6446 
              'period' => 1,
6447 
              'port_id' => 1,
6448 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
6449 
              'type' => 'Bool',
6450 
            },
6451 
            'direction' => 'out',
6452 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6453 
            'width' => 1,
6454 
          },
6455 
          'to_register11_ce' => {
6456 
            'attributes' => {
6457 
              'domain' => '',
6458 
              'group' => 1,
6459 
              'isCe' => 1,
6460 
              'is_floating_block' => 1,
6461 
              'period' => 1,
6462 
              'type' => 'logic',
6463 
            },
6464 
            'direction' => 'out',
6465 
            'hdlType' => 'std_logic',
6466 
            'width' => 1,
6467 
          },
6468 
          'to_register11_clk' => {
6469 
            'attributes' => {
6470 
              'domain' => '',
6471 
              'group' => 1,
6472 
              'isClk' => 1,
6473 
              'is_floating_block' => 1,
6474 
              'period' => 1,
6475 
              'type' => 'logic',
6476 
            },
6477 
            'direction' => 'out',
6478 
            'hdlType' => 'std_logic',
6479 
            'width' => 1,
6480 
          },
6481 
          'to_register11_clr' => {
6482 
            'attributes' => {
6483 
              'domain' => '',
6484 
              'group' => 1,
6485 
              'isClr' => 1,
6486 
              'is_floating_block' => 1,
6487 
              'period' => 1,
6488 
              'type' => 'logic',
6489 
              'valid_bit_used' => 0,
6490 
            },
6491 
            'direction' => 'out',
6492 
            'hdlType' => 'std_logic',
6493 
            'width' => 1,
6494 
          },
6495 
          'to_register11_data_in' => {
6496 
            'attributes' => {
6497 
              'bin_pt' => 0,
6498 
              'is_floating_block' => 1,
6499 
              'must_be_hdl_vector' => 1,
6500 
              'period' => 1,
6501 
              'port_id' => 0,
6502 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
6503 
              'type' => 'Bool',
6504 
            },
6505 
            'direction' => 'out',
6506 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6507 
            'width' => 1,
6508 
          },
6509 
          'to_register11_dout' => {
6510 
            'attributes' => {
6511 
              'bin_pt' => 0,
6512 
              'is_floating_block' => 1,
6513 
              'must_be_hdl_vector' => 1,
6514 
              'period' => 1,
6515 
              'port_id' => 0,
6516 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
6517 
              'type' => 'Bool',
6518 
            },
6519 
            'direction' => 'in',
6520 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6521 
            'width' => 1,
6522 
          },
6523 
          'to_register11_en' => {
6524 
            'attributes' => {
6525 
              'bin_pt' => 0,
6526 
              'is_floating_block' => 1,
6527 
              'must_be_hdl_vector' => 1,
6528 
              'period' => 1,
6529 
              'port_id' => 1,
6530 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
6531 
              'type' => 'Bool',
6532 
            },
6533 
            'direction' => 'out',
6534 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6535 
            'width' => 1,
6536 
          },
6537 
          'to_register12_ce' => {
6538 
            'attributes' => {
6539 
              'domain' => '',
6540 
              'group' => 1,
6541 
              'isCe' => 1,
6542 
              'is_floating_block' => 1,
6543 
              'period' => 1,
6544 
              'type' => 'logic',
6545 
            },
6546 
            'direction' => 'out',
6547 
            'hdlType' => 'std_logic',
6548 
            'width' => 1,
6549 
          },
6550 
          'to_register12_clk' => {
6551 
            'attributes' => {
6552 
              'domain' => '',
6553 
              'group' => 1,
6554 
              'isClk' => 1,
6555 
              'is_floating_block' => 1,
6556 
              'period' => 1,
6557 
              'type' => 'logic',
6558 
            },
6559 
            'direction' => 'out',
6560 
            'hdlType' => 'std_logic',
6561 
            'width' => 1,
6562 
          },
6563 
          'to_register12_clr' => {
6564 
            'attributes' => {
6565 
              'domain' => '',
6566 
              'group' => 1,
6567 
              'isClr' => 1,
6568 
              'is_floating_block' => 1,
6569 
              'period' => 1,
6570 
              'type' => 'logic',
6571 
              'valid_bit_used' => 0,
6572 
            },
6573 
            'direction' => 'out',
6574 
            'hdlType' => 'std_logic',
6575 
            'width' => 1,
6576 
          },
6577 
          'to_register12_data_in' => {
6578 
            'attributes' => {
6579 
              'bin_pt' => 0,
6580 
              'is_floating_block' => 1,
6581 
              'must_be_hdl_vector' => 1,
6582 
              'period' => 1,
6583 
              'port_id' => 0,
6584 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
6585 
              'type' => 'Bool',
6586 
            },
6587 
            'direction' => 'out',
6588 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6589 
            'width' => 1,
6590 
          },
6591 
          'to_register12_dout' => {
6592 
            'attributes' => {
6593 
              'bin_pt' => 0,
6594 
              'is_floating_block' => 1,
6595 
              'must_be_hdl_vector' => 1,
6596 
              'period' => 1,
6597 
              'port_id' => 0,
6598 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
6599 
              'type' => 'Bool',
6600 
            },
6601 
            'direction' => 'in',
6602 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6603 
            'width' => 1,
6604 
          },
6605 
          'to_register12_en' => {
6606 
            'attributes' => {
6607 
              'bin_pt' => 0,
6608 
              'is_floating_block' => 1,
6609 
              'must_be_hdl_vector' => 1,
6610 
              'period' => 1,
6611 
              'port_id' => 1,
6612 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
6613 
              'type' => 'Bool',
6614 
            },
6615 
            'direction' => 'out',
6616 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6617 
            'width' => 1,
6618 
          },
6619 
          'to_register13_ce' => {
6620 
            'attributes' => {
6621 
              'domain' => '',
6622 
              'group' => 1,
6623 
              'isCe' => 1,
6624 
              'is_floating_block' => 1,
6625 
              'period' => 1,
6626 
              'type' => 'logic',
6627 
            },
6628 
            'direction' => 'out',
6629 
            'hdlType' => 'std_logic',
6630 
            'width' => 1,
6631 
          },
6632 
          'to_register13_clk' => {
6633 
            'attributes' => {
6634 
              'domain' => '',
6635 
              'group' => 1,
6636 
              'isClk' => 1,
6637 
              'is_floating_block' => 1,
6638 
              'period' => 1,
6639 
              'type' => 'logic',
6640 
            },
6641 
            'direction' => 'out',
6642 
            'hdlType' => 'std_logic',
6643 
            'width' => 1,
6644 
          },
6645 
          'to_register13_clr' => {
6646 
            'attributes' => {
6647 
              'domain' => '',
6648 
              'group' => 1,
6649 
              'isClr' => 1,
6650 
              'is_floating_block' => 1,
6651 
              'period' => 1,
6652 
              'type' => 'logic',
6653 
              'valid_bit_used' => 0,
6654 
            },
6655 
            'direction' => 'out',
6656 
            'hdlType' => 'std_logic',
6657 
            'width' => 1,
6658 
          },
6659 
          'to_register13_data_in' => {
6660 
            'attributes' => {
6661 
              'bin_pt' => 0,
6662 
              'is_floating_block' => 1,
6663 
              'must_be_hdl_vector' => 1,
6664 
              'period' => 1,
6665 
              'port_id' => 0,
6666 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
6667 
              'type' => 'UFix_32_0',
6668 
            },
6669 
            'direction' => 'out',
6670 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6671 
            'width' => 32,
6672 
          },
6673 
          'to_register13_dout' => {
6674 
            'attributes' => {
6675 
              'bin_pt' => 0,
6676 
              'is_floating_block' => 1,
6677 
              'must_be_hdl_vector' => 1,
6678 
              'period' => 1,
6679 
              'port_id' => 0,
6680 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
6681 
              'type' => 'UFix_32_0',
6682 
            },
6683 
            'direction' => 'in',
6684 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6685 
            'width' => 32,
6686 
          },
6687 
          'to_register13_en' => {
6688 
            'attributes' => {
6689 
              'bin_pt' => 0,
6690 
              'is_floating_block' => 1,
6691 
              'must_be_hdl_vector' => 1,
6692 
              'period' => 1,
6693 
              'port_id' => 1,
6694 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
6695 
              'type' => 'Bool',
6696 
            },
6697 
            'direction' => 'out',
6698 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6699 
            'width' => 1,
6700 
          },
6701 
          'to_register14_ce' => {
6702 
            'attributes' => {
6703 
              'domain' => '',
6704 
              'group' => 1,
6705 
              'isCe' => 1,
6706 
              'is_floating_block' => 1,
6707 
              'period' => 1,
6708 
              'type' => 'logic',
6709 
            },
6710 
            'direction' => 'out',
6711 
            'hdlType' => 'std_logic',
6712 
            'width' => 1,
6713 
          },
6714 
          'to_register14_clk' => {
6715 
            'attributes' => {
6716 
              'domain' => '',
6717 
              'group' => 1,
6718 
              'isClk' => 1,
6719 
              'is_floating_block' => 1,
6720 
              'period' => 1,
6721 
              'type' => 'logic',
6722 
            },
6723 
            'direction' => 'out',
6724 
            'hdlType' => 'std_logic',
6725 
            'width' => 1,
6726 
          },
6727 
          'to_register14_clr' => {
6728 
            'attributes' => {
6729 
              'domain' => '',
6730 
              'group' => 1,
6731 
              'isClr' => 1,
6732 
              'is_floating_block' => 1,
6733 
              'period' => 1,
6734 
              'type' => 'logic',
6735 
              'valid_bit_used' => 0,
6736 
            },
6737 
            'direction' => 'out',
6738 
            'hdlType' => 'std_logic',
6739 
            'width' => 1,
6740 
          },
6741 
          'to_register14_data_in' => {
6742 
            'attributes' => {
6743 
              'bin_pt' => 0,
6744 
              'is_floating_block' => 1,
6745 
              'must_be_hdl_vector' => 1,
6746 
              'period' => 1,
6747 
              'port_id' => 0,
6748 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
6749 
              'type' => 'Bool',
6750 
            },
6751 
            'direction' => 'out',
6752 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6753 
            'width' => 1,
6754 
          },
6755 
          'to_register14_dout' => {
6756 
            'attributes' => {
6757 
              'bin_pt' => 0,
6758 
              'is_floating_block' => 1,
6759 
              'must_be_hdl_vector' => 1,
6760 
              'period' => 1,
6761 
              'port_id' => 0,
6762 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
6763 
              'type' => 'Bool',
6764 
            },
6765 
            'direction' => 'in',
6766 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6767 
            'width' => 1,
6768 
          },
6769 
          'to_register14_en' => {
6770 
            'attributes' => {
6771 
              'bin_pt' => 0,
6772 
              'is_floating_block' => 1,
6773 
              'must_be_hdl_vector' => 1,
6774 
              'period' => 1,
6775 
              'port_id' => 1,
6776 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
6777 
              'type' => 'Bool',
6778 
            },
6779 
            'direction' => 'out',
6780 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6781 
            'width' => 1,
6782 
          },
6783 
          'to_register15_ce' => {
6784 
            'attributes' => {
6785 
              'domain' => '',
6786 
              'group' => 1,
6787 
              'isCe' => 1,
6788 
              'is_floating_block' => 1,
6789 
              'period' => 1,
6790 
              'type' => 'logic',
6791 
            },
6792 
            'direction' => 'out',
6793 
            'hdlType' => 'std_logic',
6794 
            'width' => 1,
6795 
          },
6796 
          'to_register15_clk' => {
6797 
            'attributes' => {
6798 
              'domain' => '',
6799 
              'group' => 1,
6800 
              'isClk' => 1,
6801 
              'is_floating_block' => 1,
6802 
              'period' => 1,
6803 
              'type' => 'logic',
6804 
            },
6805 
            'direction' => 'out',
6806 
            'hdlType' => 'std_logic',
6807 
            'width' => 1,
6808 
          },
6809 
          'to_register15_clr' => {
6810 
            'attributes' => {
6811 
              'domain' => '',
6812 
              'group' => 1,
6813 
              'isClr' => 1,
6814 
              'is_floating_block' => 1,
6815 
              'period' => 1,
6816 
              'type' => 'logic',
6817 
              'valid_bit_used' => 0,
6818 
            },
6819 
            'direction' => 'out',
6820 
            'hdlType' => 'std_logic',
6821 
            'width' => 1,
6822 
          },
6823 
          'to_register15_data_in' => {
6824 
            'attributes' => {
6825 
              'bin_pt' => 0,
6826 
              'is_floating_block' => 1,
6827 
              'must_be_hdl_vector' => 1,
6828 
              'period' => 1,
6829 
              'port_id' => 0,
6830 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
6831 
              'type' => 'UFix_32_0',
6832 
            },
6833 
            'direction' => 'out',
6834 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6835 
            'width' => 32,
6836 
          },
6837 
          'to_register15_dout' => {
6838 
            'attributes' => {
6839 
              'bin_pt' => 0,
6840 
              'is_floating_block' => 1,
6841 
              'must_be_hdl_vector' => 1,
6842 
              'period' => 1,
6843 
              'port_id' => 0,
6844 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
6845 
              'type' => 'UFix_32_0',
6846 
            },
6847 
            'direction' => 'in',
6848 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6849 
            'width' => 32,
6850 
          },
6851 
          'to_register15_en' => {
6852 
            'attributes' => {
6853 
              'bin_pt' => 0,
6854 
              'is_floating_block' => 1,
6855 
              'must_be_hdl_vector' => 1,
6856 
              'period' => 1,
6857 
              'port_id' => 1,
6858 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
6859 
              'type' => 'Bool',
6860 
            },
6861 
            'direction' => 'out',
6862 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6863 
            'width' => 1,
6864 
          },
6865 
          'to_register16_ce' => {
6866 
            'attributes' => {
6867 
              'domain' => '',
6868 
              'group' => 1,
6869 
              'isCe' => 1,
6870 
              'is_floating_block' => 1,
6871 
              'period' => 1,
6872 
              'type' => 'logic',
6873 
            },
6874 
            'direction' => 'out',
6875 
            'hdlType' => 'std_logic',
6876 
            'width' => 1,
6877 
          },
6878 
          'to_register16_clk' => {
6879 
            'attributes' => {
6880 
              'domain' => '',
6881 
              'group' => 1,
6882 
              'isClk' => 1,
6883 
              'is_floating_block' => 1,
6884 
              'period' => 1,
6885 
              'type' => 'logic',
6886 
            },
6887 
            'direction' => 'out',
6888 
            'hdlType' => 'std_logic',
6889 
            'width' => 1,
6890 
          },
6891 
          'to_register16_clr' => {
6892 
            'attributes' => {
6893 
              'domain' => '',
6894 
              'group' => 1,
6895 
              'isClr' => 1,
6896 
              'is_floating_block' => 1,
6897 
              'period' => 1,
6898 
              'type' => 'logic',
6899 
              'valid_bit_used' => 0,
6900 
            },
6901 
            'direction' => 'out',
6902 
            'hdlType' => 'std_logic',
6903 
            'width' => 1,
6904 
          },
6905 
          'to_register16_data_in' => {
6906 
            'attributes' => {
6907 
              'bin_pt' => 0,
6908 
              'is_floating_block' => 1,
6909 
              'must_be_hdl_vector' => 1,
6910 
              'period' => 1,
6911 
              'port_id' => 0,
6912 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
6913 
              'type' => 'Bool',
6914 
            },
6915 
            'direction' => 'out',
6916 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6917 
            'width' => 1,
6918 
          },
6919 
          'to_register16_dout' => {
6920 
            'attributes' => {
6921 
              'bin_pt' => 0,
6922 
              'is_floating_block' => 1,
6923 
              'must_be_hdl_vector' => 1,
6924 
              'period' => 1,
6925 
              'port_id' => 0,
6926 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
6927 
              'type' => 'Bool',
6928 
            },
6929 
            'direction' => 'in',
6930 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6931 
            'width' => 1,
6932 
          },
6933 
          'to_register16_en' => {
6934 
            'attributes' => {
6935 
              'bin_pt' => 0,
6936 
              'is_floating_block' => 1,
6937 
              'must_be_hdl_vector' => 1,
6938 
              'period' => 1,
6939 
              'port_id' => 1,
6940 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
6941 
              'type' => 'Bool',
6942 
            },
6943 
            'direction' => 'out',
6944 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6945 
            'width' => 1,
6946 
          },
6947 
          'to_register17_ce' => {
6948 
            'attributes' => {
6949 
              'domain' => '',
6950 
              'group' => 1,
6951 
              'isCe' => 1,
6952 
              'is_floating_block' => 1,
6953 
              'period' => 1,
6954 
              'type' => 'logic',
6955 
            },
6956 
            'direction' => 'out',
6957 
            'hdlType' => 'std_logic',
6958 
            'width' => 1,
6959 
          },
6960 
          'to_register17_clk' => {
6961 
            'attributes' => {
6962 
              'domain' => '',
6963 
              'group' => 1,
6964 
              'isClk' => 1,
6965 
              'is_floating_block' => 1,
6966 
              'period' => 1,
6967 
              'type' => 'logic',
6968 
            },
6969 
            'direction' => 'out',
6970 
            'hdlType' => 'std_logic',
6971 
            'width' => 1,
6972 
          },
6973 
          'to_register17_clr' => {
6974 
            'attributes' => {
6975 
              'domain' => '',
6976 
              'group' => 1,
6977 
              'isClr' => 1,
6978 
              'is_floating_block' => 1,
6979 
              'period' => 1,
6980 
              'type' => 'logic',
6981 
              'valid_bit_used' => 0,
6982 
            },
6983 
            'direction' => 'out',
6984 
            'hdlType' => 'std_logic',
6985 
            'width' => 1,
6986 
          },
6987 
          'to_register17_data_in' => {
6988 
            'attributes' => {
6989 
              'bin_pt' => 0,
6990 
              'is_floating_block' => 1,
6991 
              'must_be_hdl_vector' => 1,
6992 
              'period' => 1,
6993 
              'port_id' => 0,
6994 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
6995 
              'type' => 'UFix_32_0',
6996 
            },
6997 
            'direction' => 'out',
6998 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6999 
            'width' => 32,
7000 
          },
7001 
          'to_register17_dout' => {
7002 
            'attributes' => {
7003 
              'bin_pt' => 0,
7004 
              'is_floating_block' => 1,
7005 
              'must_be_hdl_vector' => 1,
7006 
              'period' => 1,
7007 
              'port_id' => 0,
7008 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
7009 
              'type' => 'UFix_32_0',
7010 
            },
7011 
            'direction' => 'in',
7012 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7013 
            'width' => 32,
7014 
          },
7015 
          'to_register17_en' => {
7016 
            'attributes' => {
7017 
              'bin_pt' => 0,
7018 
              'is_floating_block' => 1,
7019 
              'must_be_hdl_vector' => 1,
7020 
              'period' => 1,
7021 
              'port_id' => 1,
7022 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
7023 
              'type' => 'Bool',
7024 
            },
7025 
            'direction' => 'out',
7026 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7027 
            'width' => 1,
7028 
          },
7029 
          'to_register18_ce' => {
7030 
            'attributes' => {
7031 
              'domain' => '',
7032 
              'group' => 1,
7033 
              'isCe' => 1,
7034 
              'is_floating_block' => 1,
7035 
              'period' => 1,
7036 
              'type' => 'logic',
7037 
            },
7038 
            'direction' => 'out',
7039 
            'hdlType' => 'std_logic',
7040 
            'width' => 1,
7041 
          },
7042 
          'to_register18_clk' => {
7043 
            'attributes' => {
7044 
              'domain' => '',
7045 
              'group' => 1,
7046 
              'isClk' => 1,
7047 
              'is_floating_block' => 1,
7048 
              'period' => 1,
7049 
              'type' => 'logic',
7050 
            },
7051 
            'direction' => 'out',
7052 
            'hdlType' => 'std_logic',
7053 
            'width' => 1,
7054 
          },
7055 
          'to_register18_clr' => {
7056 
            'attributes' => {
7057 
              'domain' => '',
7058 
              'group' => 1,
7059 
              'isClr' => 1,
7060 
              'is_floating_block' => 1,
7061 
              'period' => 1,
7062 
              'type' => 'logic',
7063 
              'valid_bit_used' => 0,
7064 
            },
7065 
            'direction' => 'out',
7066 
            'hdlType' => 'std_logic',
7067 
            'width' => 1,
7068 
          },
7069 
          'to_register18_data_in' => {
7070 
            'attributes' => {
7071 
              'bin_pt' => 0,
7072 
              'is_floating_block' => 1,
7073 
              'must_be_hdl_vector' => 1,
7074 
              'period' => 1,
7075 
              'port_id' => 0,
7076 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
7077 
              'type' => 'Bool',
7078 
            },
7079 
            'direction' => 'out',
7080 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7081 
            'width' => 1,
7082 
          },
7083 
          'to_register18_dout' => {
7084 
            'attributes' => {
7085 
              'bin_pt' => 0,
7086 
              'is_floating_block' => 1,
7087 
              'must_be_hdl_vector' => 1,
7088 
              'period' => 1,
7089 
              'port_id' => 0,
7090 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
7091 
              'type' => 'Bool',
7092 
            },
7093 
            'direction' => 'in',
7094 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7095 
            'width' => 1,
7096 
          },
7097 
          'to_register18_en' => {
7098 
            'attributes' => {
7099 
              'bin_pt' => 0,
7100 
              'is_floating_block' => 1,
7101 
              'must_be_hdl_vector' => 1,
7102 
              'period' => 1,
7103 
              'port_id' => 1,
7104 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
7105 
              'type' => 'Bool',
7106 
            },
7107 
            'direction' => 'out',
7108 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7109 
            'width' => 1,
7110 
          },
7111 
          'to_register19_ce' => {
7112 
            'attributes' => {
7113 
              'domain' => '',
7114 
              'group' => 1,
7115 
              'isCe' => 1,
7116 
              'is_floating_block' => 1,
7117 
              'period' => 1,
7118 
              'type' => 'logic',
7119 
            },
7120 
            'direction' => 'out',
7121 
            'hdlType' => 'std_logic',
7122 
            'width' => 1,
7123 
          },
7124 
          'to_register19_clk' => {
7125 
            'attributes' => {
7126 
              'domain' => '',
7127 
              'group' => 1,
7128 
              'isClk' => 1,
7129 
              'is_floating_block' => 1,
7130 
              'period' => 1,
7131 
              'type' => 'logic',
7132 
            },
7133 
            'direction' => 'out',
7134 
            'hdlType' => 'std_logic',
7135 
            'width' => 1,
7136 
          },
7137 
          'to_register19_clr' => {
7138 
            'attributes' => {
7139 
              'domain' => '',
7140 
              'group' => 1,
7141 
              'isClr' => 1,
7142 
              'is_floating_block' => 1,
7143 
              'period' => 1,
7144 
              'type' => 'logic',
7145 
              'valid_bit_used' => 0,
7146 
            },
7147 
            'direction' => 'out',
7148 
            'hdlType' => 'std_logic',
7149 
            'width' => 1,
7150 
          },
7151 
          'to_register19_data_in' => {
7152 
            'attributes' => {
7153 
              'bin_pt' => 0,
7154 
              'is_floating_block' => 1,
7155 
              'must_be_hdl_vector' => 1,
7156 
              'period' => 1,
7157 
              'port_id' => 0,
7158 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
7159 
              'type' => 'UFix_32_0',
7160 
            },
7161 
            'direction' => 'out',
7162 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7163 
            'width' => 32,
7164 
          },
7165 
          'to_register19_dout' => {
7166 
            'attributes' => {
7167 
              'bin_pt' => 0,
7168 
              'is_floating_block' => 1,
7169 
              'must_be_hdl_vector' => 1,
7170 
              'period' => 1,
7171 
              'port_id' => 0,
7172 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
7173 
              'type' => 'UFix_32_0',
7174 
            },
7175 
            'direction' => 'in',
7176 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7177 
            'width' => 32,
7178 
          },
7179 
          'to_register19_en' => {
7180 
            'attributes' => {
7181 
              'bin_pt' => 0,
7182 
              'is_floating_block' => 1,
7183 
              'must_be_hdl_vector' => 1,
7184 
              'period' => 1,
7185 
              'port_id' => 1,
7186 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
7187 
              'type' => 'Bool',
7188 
            },
7189 
            'direction' => 'out',
7190 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7191 
            'width' => 1,
7192 
          },
7193 
          'to_register1_ce' => {
7194 
            'attributes' => {
7195 
              'domain' => '',
7196 
              'group' => 1,
7197 
              'isCe' => 1,
7198 
              'is_floating_block' => 1,
7199 
              'period' => 1,
7200 
              'type' => 'logic',
7201 
            },
7202 
            'direction' => 'out',
7203 
            'hdlType' => 'std_logic',
7204 
            'width' => 1,
7205 
          },
7206 
          'to_register1_clk' => {
7207 
            'attributes' => {
7208 
              'domain' => '',
7209 
              'group' => 1,
7210 
              'isClk' => 1,
7211 
              'is_floating_block' => 1,
7212 
              'period' => 1,
7213 
              'type' => 'logic',
7214 
            },
7215 
            'direction' => 'out',
7216 
            'hdlType' => 'std_logic',
7217 
            'width' => 1,
7218 
          },
7219 
          'to_register1_clr' => {
7220 
            'attributes' => {
7221 
              'domain' => '',
7222 
              'group' => 1,
7223 
              'isClr' => 1,
7224 
              'is_floating_block' => 1,
7225 
              'period' => 1,
7226 
              'type' => 'logic',
7227 
              'valid_bit_used' => 0,
7228 
            },
7229 
            'direction' => 'out',
7230 
            'hdlType' => 'std_logic',
7231 
            'width' => 1,
7232 
          },
7233 
          'to_register1_data_in' => {
7234 
            'attributes' => {
7235 
              'bin_pt' => 0,
7236 
              'is_floating_block' => 1,
7237 
              'must_be_hdl_vector' => 1,
7238 
              'period' => 1,
7239 
              'port_id' => 0,
7240 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
7241 
              'type' => 'Bool',
7242 
            },
7243 
            'direction' => 'out',
7244 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7245 
            'width' => 1,
7246 
          },
7247 
          'to_register1_dout' => {
7248 
            'attributes' => {
7249 
              'bin_pt' => 0,
7250 
              'is_floating_block' => 1,
7251 
              'must_be_hdl_vector' => 1,
7252 
              'period' => 1,
7253 
              'port_id' => 0,
7254 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
7255 
              'type' => 'Bool',
7256 
            },
7257 
            'direction' => 'in',
7258 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7259 
            'width' => 1,
7260 
          },
7261 
          'to_register1_en' => {
7262 
            'attributes' => {
7263 
              'bin_pt' => 0,
7264 
              'is_floating_block' => 1,
7265 
              'must_be_hdl_vector' => 1,
7266 
              'period' => 1,
7267 
              'port_id' => 1,
7268 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
7269 
              'type' => 'Bool',
7270 
            },
7271 
            'direction' => 'out',
7272 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7273 
            'width' => 1,
7274 
          },
7275 
          'to_register20_ce' => {
7276 
            'attributes' => {
7277 
              'domain' => '',
7278 
              'group' => 1,
7279 
              'isCe' => 1,
7280 
              'is_floating_block' => 1,
7281 
              'period' => 1,
7282 
              'type' => 'logic',
7283 
            },
7284 
            'direction' => 'out',
7285 
            'hdlType' => 'std_logic',
7286 
            'width' => 1,
7287 
          },
7288 
          'to_register20_clk' => {
7289 
            'attributes' => {
7290 
              'domain' => '',
7291 
              'group' => 1,
7292 
              'isClk' => 1,
7293 
              'is_floating_block' => 1,
7294 
              'period' => 1,
7295 
              'type' => 'logic',
7296 
            },
7297 
            'direction' => 'out',
7298 
            'hdlType' => 'std_logic',
7299 
            'width' => 1,
7300 
          },
7301 
          'to_register20_clr' => {
7302 
            'attributes' => {
7303 
              'domain' => '',
7304 
              'group' => 1,
7305 
              'isClr' => 1,
7306 
              'is_floating_block' => 1,
7307 
              'period' => 1,
7308 
              'type' => 'logic',
7309 
              'valid_bit_used' => 0,
7310 
            },
7311 
            'direction' => 'out',
7312 
            'hdlType' => 'std_logic',
7313 
            'width' => 1,
7314 
          },
7315 
          'to_register20_data_in' => {
7316 
            'attributes' => {
7317 
              'bin_pt' => 0,
7318 
              'is_floating_block' => 1,
7319 
              'must_be_hdl_vector' => 1,
7320 
              'period' => 1,
7321 
              'port_id' => 0,
7322 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
7323 
              'type' => 'Bool',
7324 
            },
7325 
            'direction' => 'out',
7326 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7327 
            'width' => 1,
7328 
          },
7329 
          'to_register20_dout' => {
7330 
            'attributes' => {
7331 
              'bin_pt' => 0,
7332 
              'is_floating_block' => 1,
7333 
              'must_be_hdl_vector' => 1,
7334 
              'period' => 1,
7335 
              'port_id' => 0,
7336 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
7337 
              'type' => 'Bool',
7338 
            },
7339 
            'direction' => 'in',
7340 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7341 
            'width' => 1,
7342 
          },
7343 
          'to_register20_en' => {
7344 
            'attributes' => {
7345 
              'bin_pt' => 0,
7346 
              'is_floating_block' => 1,
7347 
              'must_be_hdl_vector' => 1,
7348 
              'period' => 1,
7349 
              'port_id' => 1,
7350 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
7351 
              'type' => 'Bool',
7352 
            },
7353 
            'direction' => 'out',
7354 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7355 
            'width' => 1,
7356 
          },
7357 
          'to_register21_ce' => {
7358 
            'attributes' => {
7359 
              'domain' => '',
7360 
              'group' => 1,
7361 
              'isCe' => 1,
7362 
              'is_floating_block' => 1,
7363 
              'period' => 1,
7364 
              'type' => 'logic',
7365 
            },
7366 
            'direction' => 'out',
7367 
            'hdlType' => 'std_logic',
7368 
            'width' => 1,
7369 
          },
7370 
          'to_register21_clk' => {
7371 
            'attributes' => {
7372 
              'domain' => '',
7373 
              'group' => 1,
7374 
              'isClk' => 1,
7375 
              'is_floating_block' => 1,
7376 
              'period' => 1,
7377 
              'type' => 'logic',
7378 
            },
7379 
            'direction' => 'out',
7380 
            'hdlType' => 'std_logic',
7381 
            'width' => 1,
7382 
          },
7383 
          'to_register21_clr' => {
7384 
            'attributes' => {
7385 
              'domain' => '',
7386 
              'group' => 1,
7387 
              'isClr' => 1,
7388 
              'is_floating_block' => 1,
7389 
              'period' => 1,
7390 
              'type' => 'logic',
7391 
              'valid_bit_used' => 0,
7392 
            },
7393 
            'direction' => 'out',
7394 
            'hdlType' => 'std_logic',
7395 
            'width' => 1,
7396 
          },
7397 
          'to_register21_data_in' => {
7398 
            'attributes' => {
7399 
              'bin_pt' => 0,
7400 
              'is_floating_block' => 1,
7401 
              'must_be_hdl_vector' => 1,
7402 
              'period' => 1,
7403 
              'port_id' => 0,
7404 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
7405 
              'type' => 'UFix_32_0',
7406 
            },
7407 
            'direction' => 'out',
7408 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7409 
            'width' => 32,
7410 
          },
7411 
          'to_register21_dout' => {
7412 
            'attributes' => {
7413 
              'bin_pt' => 0,
7414 
              'is_floating_block' => 1,
7415 
              'must_be_hdl_vector' => 1,
7416 
              'period' => 1,
7417 
              'port_id' => 0,
7418 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
7419 
              'type' => 'UFix_32_0',
7420 
            },
7421 
            'direction' => 'in',
7422 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7423 
            'width' => 32,
7424 
          },
7425 
          'to_register21_en' => {
7426 
            'attributes' => {
7427 
              'bin_pt' => 0,
7428 
              'is_floating_block' => 1,
7429 
              'must_be_hdl_vector' => 1,
7430 
              'period' => 1,
7431 
              'port_id' => 1,
7432 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
7433 
              'type' => 'Bool',
7434 
            },
7435 
            'direction' => 'out',
7436 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7437 
            'width' => 1,
7438 
          },
7439 
          'to_register22_ce' => {
7440 
            'attributes' => {
7441 
              'domain' => '',
7442 
              'group' => 1,
7443 
              'isCe' => 1,
7444 
              'is_floating_block' => 1,
7445 
              'period' => 1,
7446 
              'type' => 'logic',
7447 
            },
7448 
            'direction' => 'out',
7449 
            'hdlType' => 'std_logic',
7450 
            'width' => 1,
7451 
          },
7452 
          'to_register22_clk' => {
7453 
            'attributes' => {
7454 
              'domain' => '',
7455 
              'group' => 1,
7456 
              'isClk' => 1,
7457 
              'is_floating_block' => 1,
7458 
              'period' => 1,
7459 
              'type' => 'logic',
7460 
            },
7461 
            'direction' => 'out',
7462 
            'hdlType' => 'std_logic',
7463 
            'width' => 1,
7464 
          },
7465 
          'to_register22_clr' => {
7466 
            'attributes' => {
7467 
              'domain' => '',
7468 
              'group' => 1,
7469 
              'isClr' => 1,
7470 
              'is_floating_block' => 1,
7471 
              'period' => 1,
7472 
              'type' => 'logic',
7473 
              'valid_bit_used' => 0,
7474 
            },
7475 
            'direction' => 'out',
7476 
            'hdlType' => 'std_logic',
7477 
            'width' => 1,
7478 
          },
7479 
          'to_register22_data_in' => {
7480 
            'attributes' => {
7481 
              'bin_pt' => 0,
7482 
              'is_floating_block' => 1,
7483 
              'must_be_hdl_vector' => 1,
7484 
              'period' => 1,
7485 
              'port_id' => 0,
7486 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
7487 
              'type' => 'Bool',
7488 
            },
7489 
            'direction' => 'out',
7490 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7491 
            'width' => 1,
7492 
          },
7493 
          'to_register22_dout' => {
7494 
            'attributes' => {
7495 
              'bin_pt' => 0,
7496 
              'is_floating_block' => 1,
7497 
              'must_be_hdl_vector' => 1,
7498 
              'period' => 1,
7499 
              'port_id' => 0,
7500 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
7501 
              'type' => 'Bool',
7502 
            },
7503 
            'direction' => 'in',
7504 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7505 
            'width' => 1,
7506 
          },
7507 
          'to_register22_en' => {
7508 
            'attributes' => {
7509 
              'bin_pt' => 0,
7510 
              'is_floating_block' => 1,
7511 
              'must_be_hdl_vector' => 1,
7512 
              'period' => 1,
7513 
              'port_id' => 1,
7514 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
7515 
              'type' => 'Bool',
7516 
            },
7517 
            'direction' => 'out',
7518 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7519 
            'width' => 1,
7520 
          },
7521 
          'to_register23_ce' => {
7522 
            'attributes' => {
7523 
              'domain' => '',
7524 
              'group' => 1,
7525 
              'isCe' => 1,
7526 
              'is_floating_block' => 1,
7527 
              'period' => 1,
7528 
              'type' => 'logic',
7529 
            },
7530 
            'direction' => 'out',
7531 
            'hdlType' => 'std_logic',
7532 
            'width' => 1,
7533 
          },
7534 
          'to_register23_clk' => {
7535 
            'attributes' => {
7536 
              'domain' => '',
7537 
              'group' => 1,
7538 
              'isClk' => 1,
7539 
              'is_floating_block' => 1,
7540 
              'period' => 1,
7541 
              'type' => 'logic',
7542 
            },
7543 
            'direction' => 'out',
7544 
            'hdlType' => 'std_logic',
7545 
            'width' => 1,
7546 
          },
7547 
          'to_register23_clr' => {
7548 
            'attributes' => {
7549 
              'domain' => '',
7550 
              'group' => 1,
7551 
              'isClr' => 1,
7552 
              'is_floating_block' => 1,
7553 
              'period' => 1,
7554 
              'type' => 'logic',
7555 
              'valid_bit_used' => 0,
7556 
            },
7557 
            'direction' => 'out',
7558 
            'hdlType' => 'std_logic',
7559 
            'width' => 1,
7560 
          },
7561 
          'to_register23_data_in' => {
7562 
            'attributes' => {
7563 
              'bin_pt' => 0,
7564 
              'is_floating_block' => 1,
7565 
              'must_be_hdl_vector' => 1,
7566 
              'period' => 1,
7567 
              'port_id' => 0,
7568 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
7569 
              'type' => 'UFix_32_0',
7570 
            },
7571 
            'direction' => 'out',
7572 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7573 
            'width' => 32,
7574 
          },
7575 
          'to_register23_dout' => {
7576 
            'attributes' => {
7577 
              'bin_pt' => 0,
7578 
              'is_floating_block' => 1,
7579 
              'must_be_hdl_vector' => 1,
7580 
              'period' => 1,
7581 
              'port_id' => 0,
7582 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
7583 
              'type' => 'UFix_32_0',
7584 
            },
7585 
            'direction' => 'in',
7586 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7587 
            'width' => 32,
7588 
          },
7589 
          'to_register23_en' => {
7590 
            'attributes' => {
7591 
              'bin_pt' => 0,
7592 
              'is_floating_block' => 1,
7593 
              'must_be_hdl_vector' => 1,
7594 
              'period' => 1,
7595 
              'port_id' => 1,
7596 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
7597 
              'type' => 'Bool',
7598 
            },
7599 
            'direction' => 'out',
7600 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7601 
            'width' => 1,
7602 
          },
7603 
          'to_register24_ce' => {
7604 
            'attributes' => {
7605 
              'domain' => '',
7606 
              'group' => 1,
7607 
              'isCe' => 1,
7608 
              'is_floating_block' => 1,
7609 
              'period' => 1,
7610 
              'type' => 'logic',
7611 
            },
7612 
            'direction' => 'out',
7613 
            'hdlType' => 'std_logic',
7614 
            'width' => 1,
7615 
          },
7616 
          'to_register24_clk' => {
7617 
            'attributes' => {
7618 
              'domain' => '',
7619 
              'group' => 1,
7620 
              'isClk' => 1,
7621 
              'is_floating_block' => 1,
7622 
              'period' => 1,
7623 
              'type' => 'logic',
7624 
            },
7625 
            'direction' => 'out',
7626 
            'hdlType' => 'std_logic',
7627 
            'width' => 1,
7628 
          },
7629 
          'to_register24_clr' => {
7630 
            'attributes' => {
7631 
              'domain' => '',
7632 
              'group' => 1,
7633 
              'isClr' => 1,
7634 
              'is_floating_block' => 1,
7635 
              'period' => 1,
7636 
              'type' => 'logic',
7637 
              'valid_bit_used' => 0,
7638 
            },
7639 
            'direction' => 'out',
7640 
            'hdlType' => 'std_logic',
7641 
            'width' => 1,
7642 
          },
7643 
          'to_register24_data_in' => {
7644 
            'attributes' => {
7645 
              'bin_pt' => 0,
7646 
              'is_floating_block' => 1,
7647 
              'must_be_hdl_vector' => 1,
7648 
              'period' => 1,
7649 
              'port_id' => 0,
7650 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
7651 
              'type' => 'Bool',
7652 
            },
7653 
            'direction' => 'out',
7654 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7655 
            'width' => 1,
7656 
          },
7657 
          'to_register24_dout' => {
7658 
            'attributes' => {
7659 
              'bin_pt' => 0,
7660 
              'is_floating_block' => 1,
7661 
              'must_be_hdl_vector' => 1,
7662 
              'period' => 1,
7663 
              'port_id' => 0,
7664 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
7665 
              'type' => 'Bool',
7666 
            },
7667 
            'direction' => 'in',
7668 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7669 
            'width' => 1,
7670 
          },
7671 
          'to_register24_en' => {
7672 
            'attributes' => {
7673 
              'bin_pt' => 0,
7674 
              'is_floating_block' => 1,
7675 
              'must_be_hdl_vector' => 1,
7676 
              'period' => 1,
7677 
              'port_id' => 1,
7678 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
7679 
              'type' => 'Bool',
7680 
            },
7681 
            'direction' => 'out',
7682 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7683 
            'width' => 1,
7684 
          },
7685 
          'to_register25_ce' => {
7686 
            'attributes' => {
7687 
              'domain' => '',
7688 
              'group' => 1,
7689 
              'isCe' => 1,
7690 
              'is_floating_block' => 1,
7691 
              'period' => 1,
7692 
              'type' => 'logic',
7693 
            },
7694 
            'direction' => 'out',
7695 
            'hdlType' => 'std_logic',
7696 
            'width' => 1,
7697 
          },
7698 
          'to_register25_clk' => {
7699 
            'attributes' => {
7700 
              'domain' => '',
7701 
              'group' => 1,
7702 
              'isClk' => 1,
7703 
              'is_floating_block' => 1,
7704 
              'period' => 1,
7705 
              'type' => 'logic',
7706 
            },
7707 
            'direction' => 'out',
7708 
            'hdlType' => 'std_logic',
7709 
            'width' => 1,
7710 
          },
7711 
          'to_register25_clr' => {
7712 
            'attributes' => {
7713 
              'domain' => '',
7714 
              'group' => 1,
7715 
              'isClr' => 1,
7716 
              'is_floating_block' => 1,
7717 
              'period' => 1,
7718 
              'type' => 'logic',
7719 
              'valid_bit_used' => 0,
7720 
            },
7721 
            'direction' => 'out',
7722 
            'hdlType' => 'std_logic',
7723 
            'width' => 1,
7724 
          },
7725 
          'to_register25_data_in' => {
7726 
            'attributes' => {
7727 
              'bin_pt' => 0,
7728 
              'is_floating_block' => 1,
7729 
              'must_be_hdl_vector' => 1,
7730 
              'period' => 1,
7731 
              'port_id' => 0,
7732 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
7733 
              'type' => 'UFix_32_0',
7734 
            },
7735 
            'direction' => 'out',
7736 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7737 
            'width' => 32,
7738 
          },
7739 
          'to_register25_dout' => {
7740 
            'attributes' => {
7741 
              'bin_pt' => 0,
7742 
              'is_floating_block' => 1,
7743 
              'must_be_hdl_vector' => 1,
7744 
              'period' => 1,
7745 
              'port_id' => 0,
7746 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
7747 
              'type' => 'UFix_32_0',
7748 
            },
7749 
            'direction' => 'in',
7750 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7751 
            'width' => 32,
7752 
          },
7753 
          'to_register25_en' => {
7754 
            'attributes' => {
7755 
              'bin_pt' => 0,
7756 
              'is_floating_block' => 1,
7757 
              'must_be_hdl_vector' => 1,
7758 
              'period' => 1,
7759 
              'port_id' => 1,
7760 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
7761 
              'type' => 'Bool',
7762 
            },
7763 
            'direction' => 'out',
7764 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7765 
            'width' => 1,
7766 
          },
7767 
          'to_register26_ce' => {
7768 
            'attributes' => {
7769 
              'domain' => '',
7770 
              'group' => 1,
7771 
              'isCe' => 1,
7772 
              'is_floating_block' => 1,
7773 
              'period' => 1,
7774 
              'type' => 'logic',
7775 
            },
7776 
            'direction' => 'out',
7777 
            'hdlType' => 'std_logic',
7778 
            'width' => 1,
7779 
          },
7780 
          'to_register26_clk' => {
7781 
            'attributes' => {
7782 
              'domain' => '',
7783 
              'group' => 1,
7784 
              'isClk' => 1,
7785 
              'is_floating_block' => 1,
7786 
              'period' => 1,
7787 
              'type' => 'logic',
7788 
            },
7789 
            'direction' => 'out',
7790 
            'hdlType' => 'std_logic',
7791 
            'width' => 1,
7792 
          },
7793 
          'to_register26_clr' => {
7794 
            'attributes' => {
7795 
              'domain' => '',
7796 
              'group' => 1,
7797 
              'isClr' => 1,
7798 
              'is_floating_block' => 1,
7799 
              'period' => 1,
7800 
              'type' => 'logic',
7801 
              'valid_bit_used' => 0,
7802 
            },
7803 
            'direction' => 'out',
7804 
            'hdlType' => 'std_logic',
7805 
            'width' => 1,
7806 
          },
7807 
          'to_register26_data_in' => {
7808 
            'attributes' => {
7809 
              'bin_pt' => 0,
7810 
              'is_floating_block' => 1,
7811 
              'must_be_hdl_vector' => 1,
7812 
              'period' => 1,
7813 
              'port_id' => 0,
7814 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
7815 
              'type' => 'Bool',
7816 
            },
7817 
            'direction' => 'out',
7818 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7819 
            'width' => 1,
7820 
          },
7821 
          'to_register26_dout' => {
7822 
            'attributes' => {
7823 
              'bin_pt' => 0,
7824 
              'is_floating_block' => 1,
7825 
              'must_be_hdl_vector' => 1,
7826 
              'period' => 1,
7827 
              'port_id' => 0,
7828 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
7829 
              'type' => 'Bool',
7830 
            },
7831 
            'direction' => 'in',
7832 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7833 
            'width' => 1,
7834 
          },
7835 
          'to_register26_en' => {
7836 
            'attributes' => {
7837 
              'bin_pt' => 0,
7838 
              'is_floating_block' => 1,
7839 
              'must_be_hdl_vector' => 1,
7840 
              'period' => 1,
7841 
              'port_id' => 1,
7842 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
7843 
              'type' => 'Bool',
7844 
            },
7845 
            'direction' => 'out',
7846 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7847 
            'width' => 1,
7848 
          },
7849 
          'to_register27_ce' => {
7850 
            'attributes' => {
7851 
              'domain' => '',
7852 
              'group' => 1,
7853 
              'isCe' => 1,
7854 
              'is_floating_block' => 1,
7855 
              'period' => 1,
7856 
              'type' => 'logic',
7857 
            },
7858 
            'direction' => 'out',
7859 
            'hdlType' => 'std_logic',
7860 
            'width' => 1,
7861 
          },
7862 
          'to_register27_clk' => {
7863 
            'attributes' => {
7864 
              'domain' => '',
7865 
              'group' => 1,
7866 
              'isClk' => 1,
7867 
              'is_floating_block' => 1,
7868 
              'period' => 1,
7869 
              'type' => 'logic',
7870 
            },
7871 
            'direction' => 'out',
7872 
            'hdlType' => 'std_logic',
7873 
            'width' => 1,
7874 
          },
7875 
          'to_register27_clr' => {
7876 
            'attributes' => {
7877 
              'domain' => '',
7878 
              'group' => 1,
7879 
              'isClr' => 1,
7880 
              'is_floating_block' => 1,
7881 
              'period' => 1,
7882 
              'type' => 'logic',
7883 
              'valid_bit_used' => 0,
7884 
            },
7885 
            'direction' => 'out',
7886 
            'hdlType' => 'std_logic',
7887 
            'width' => 1,
7888 
          },
7889 
          'to_register27_data_in' => {
7890 
            'attributes' => {
7891 
              'bin_pt' => 0,
7892 
              'is_floating_block' => 1,
7893 
              'must_be_hdl_vector' => 1,
7894 
              'period' => 1,
7895 
              'port_id' => 0,
7896 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
7897 
              'type' => 'UFix_32_0',
7898 
            },
7899 
            'direction' => 'out',
7900 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7901 
            'width' => 32,
7902 
          },
7903 
          'to_register27_dout' => {
7904 
            'attributes' => {
7905 
              'bin_pt' => 0,
7906 
              'is_floating_block' => 1,
7907 
              'must_be_hdl_vector' => 1,
7908 
              'period' => 1,
7909 
              'port_id' => 0,
7910 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
7911 
              'type' => 'UFix_32_0',
7912 
            },
7913 
            'direction' => 'in',
7914 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7915 
            'width' => 32,
7916 
          },
7917 
          'to_register27_en' => {
7918 
            'attributes' => {
7919 
              'bin_pt' => 0,
7920 
              'is_floating_block' => 1,
7921 
              'must_be_hdl_vector' => 1,
7922 
              'period' => 1,
7923 
              'port_id' => 1,
7924 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
7925 
              'type' => 'Bool',
7926 
            },
7927 
            'direction' => 'out',
7928 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7929 
            'width' => 1,
7930 
          },
7931 
          'to_register2_ce' => {
7932 
            'attributes' => {
7933 
              'domain' => '',
7934 
              'group' => 1,
7935 
              'isCe' => 1,
7936 
              'is_floating_block' => 1,
7937 
              'period' => 1,
7938 
              'type' => 'logic',
7939 
            },
7940 
            'direction' => 'out',
7941 
            'hdlType' => 'std_logic',
7942 
            'width' => 1,
7943 
          },
7944 
          'to_register2_clk' => {
7945 
            'attributes' => {
7946 
              'domain' => '',
7947 
              'group' => 1,
7948 
              'isClk' => 1,
7949 
              'is_floating_block' => 1,
7950 
              'period' => 1,
7951 
              'type' => 'logic',
7952 
            },
7953 
            'direction' => 'out',
7954 
            'hdlType' => 'std_logic',
7955 
            'width' => 1,
7956 
          },
7957 
          'to_register2_clr' => {
7958 
            'attributes' => {
7959 
              'domain' => '',
7960 
              'group' => 1,
7961 
              'isClr' => 1,
7962 
              'is_floating_block' => 1,
7963 
              'period' => 1,
7964 
              'type' => 'logic',
7965 
              'valid_bit_used' => 0,
7966 
            },
7967 
            'direction' => 'out',
7968 
            'hdlType' => 'std_logic',
7969 
            'width' => 1,
7970 
          },
7971 
          'to_register2_data_in' => {
7972 
            'attributes' => {
7973 
              'bin_pt' => 0,
7974 
              'is_floating_block' => 1,
7975 
              'must_be_hdl_vector' => 1,
7976 
              'period' => 1,
7977 
              'port_id' => 0,
7978 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
7979 
              'type' => 'UFix_32_0',
7980 
            },
7981 
            'direction' => 'out',
7982 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7983 
            'width' => 32,
7984 
          },
7985 
          'to_register2_dout' => {
7986 
            'attributes' => {
7987 
              'bin_pt' => 0,
7988 
              'is_floating_block' => 1,
7989 
              'must_be_hdl_vector' => 1,
7990 
              'period' => 1,
7991 
              'port_id' => 0,
7992 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
7993 
              'type' => 'UFix_32_0',
7994 
            },
7995 
            'direction' => 'in',
7996 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7997 
            'width' => 32,
7998 
          },
7999 
          'to_register2_en' => {
8000 
            'attributes' => {
8001 
              'bin_pt' => 0,
8002 
              'is_floating_block' => 1,
8003 
              'must_be_hdl_vector' => 1,
8004 
              'period' => 1,
8005 
              'port_id' => 1,
8006 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
8007 
              'type' => 'Bool',
8008 
            },
8009 
            'direction' => 'out',
8010 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8011 
            'width' => 1,
8012 
          },
8013 
          'to_register3_ce' => {
8014 
            'attributes' => {
8015 
              'domain' => '',
8016 
              'group' => 1,
8017 
              'isCe' => 1,
8018 
              'is_floating_block' => 1,
8019 
              'period' => 1,
8020 
              'type' => 'logic',
8021 
            },
8022 
            'direction' => 'out',
8023 
            'hdlType' => 'std_logic',
8024 
            'width' => 1,
8025 
          },
8026 
          'to_register3_clk' => {
8027 
            'attributes' => {
8028 
              'domain' => '',
8029 
              'group' => 1,
8030 
              'isClk' => 1,
8031 
              'is_floating_block' => 1,
8032 
              'period' => 1,
8033 
              'type' => 'logic',
8034 
            },
8035 
            'direction' => 'out',
8036 
            'hdlType' => 'std_logic',
8037 
            'width' => 1,
8038 
          },
8039 
          'to_register3_clr' => {
8040 
            'attributes' => {
8041 
              'domain' => '',
8042 
              'group' => 1,
8043 
              'isClr' => 1,
8044 
              'is_floating_block' => 1,
8045 
              'period' => 1,
8046 
              'type' => 'logic',
8047 
              'valid_bit_used' => 0,
8048 
            },
8049 
            'direction' => 'out',
8050 
            'hdlType' => 'std_logic',
8051 
            'width' => 1,
8052 
          },
8053 
          'to_register3_data_in' => {
8054 
            'attributes' => {
8055 
              'bin_pt' => 0,
8056 
              'is_floating_block' => 1,
8057 
              'must_be_hdl_vector' => 1,
8058 
              'period' => 1,
8059 
              'port_id' => 0,
8060 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
8061 
              'type' => 'UFix_32_0',
8062 
            },
8063 
            'direction' => 'out',
8064 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8065 
            'width' => 32,
8066 
          },
8067 
          'to_register3_dout' => {
8068 
            'attributes' => {
8069 
              'bin_pt' => 0,
8070 
              'is_floating_block' => 1,
8071 
              'must_be_hdl_vector' => 1,
8072 
              'period' => 1,
8073 
              'port_id' => 0,
8074 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
8075 
              'type' => 'UFix_32_0',
8076 
            },
8077 
            'direction' => 'in',
8078 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8079 
            'width' => 32,
8080 
          },
8081 
          'to_register3_en' => {
8082 
            'attributes' => {
8083 
              'bin_pt' => 0,
8084 
              'is_floating_block' => 1,
8085 
              'must_be_hdl_vector' => 1,
8086 
              'period' => 1,
8087 
              'port_id' => 1,
8088 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
8089 
              'type' => 'Bool',
8090 
            },
8091 
            'direction' => 'out',
8092 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8093 
            'width' => 1,
8094 
          },
8095 
          'to_register4_ce' => {
8096 
            'attributes' => {
8097 
              'domain' => '',
8098 
              'group' => 1,
8099 
              'isCe' => 1,
8100 
              'is_floating_block' => 1,
8101 
              'period' => 1,
8102 
              'type' => 'logic',
8103 
            },
8104 
            'direction' => 'out',
8105 
            'hdlType' => 'std_logic',
8106 
            'width' => 1,
8107 
          },
8108 
          'to_register4_clk' => {
8109 
            'attributes' => {
8110 
              'domain' => '',
8111 
              'group' => 1,
8112 
              'isClk' => 1,
8113 
              'is_floating_block' => 1,
8114 
              'period' => 1,
8115 
              'type' => 'logic',
8116 
            },
8117 
            'direction' => 'out',
8118 
            'hdlType' => 'std_logic',
8119 
            'width' => 1,
8120 
          },
8121 
          'to_register4_clr' => {
8122 
            'attributes' => {
8123 
              'domain' => '',
8124 
              'group' => 1,
8125 
              'isClr' => 1,
8126 
              'is_floating_block' => 1,
8127 
              'period' => 1,
8128 
              'type' => 'logic',
8129 
              'valid_bit_used' => 0,
8130 
            },
8131 
            'direction' => 'out',
8132 
            'hdlType' => 'std_logic',
8133 
            'width' => 1,
8134 
          },
8135 
          'to_register4_data_in' => {
8136 
            'attributes' => {
8137 
              'bin_pt' => 0,
8138 
              'is_floating_block' => 1,
8139 
              'must_be_hdl_vector' => 1,
8140 
              'period' => 1,
8141 
              'port_id' => 0,
8142 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
8143 
              'type' => 'Bool',
8144 
            },
8145 
            'direction' => 'out',
8146 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8147 
            'width' => 1,
8148 
          },
8149 
          'to_register4_dout' => {
8150 
            'attributes' => {
8151 
              'bin_pt' => 0,
8152 
              'is_floating_block' => 1,
8153 
              'must_be_hdl_vector' => 1,
8154 
              'period' => 1,
8155 
              'port_id' => 0,
8156 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
8157 
              'type' => 'Bool',
8158 
            },
8159 
            'direction' => 'in',
8160 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8161 
            'width' => 1,
8162 
          },
8163 
          'to_register4_en' => {
8164 
            'attributes' => {
8165 
              'bin_pt' => 0,
8166 
              'is_floating_block' => 1,
8167 
              'must_be_hdl_vector' => 1,
8168 
              'period' => 1,
8169 
              'port_id' => 1,
8170 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
8171 
              'type' => 'Bool',
8172 
            },
8173 
            'direction' => 'out',
8174 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8175 
            'width' => 1,
8176 
          },
8177 
          'to_register5_ce' => {
8178 
            'attributes' => {
8179 
              'domain' => '',
8180 
              'group' => 1,
8181 
              'isCe' => 1,
8182 
              'is_floating_block' => 1,
8183 
              'period' => 1,
8184 
              'type' => 'logic',
8185 
            },
8186 
            'direction' => 'out',
8187 
            'hdlType' => 'std_logic',
8188 
            'width' => 1,
8189 
          },
8190 
          'to_register5_clk' => {
8191 
            'attributes' => {
8192 
              'domain' => '',
8193 
              'group' => 1,
8194 
              'isClk' => 1,
8195 
              'is_floating_block' => 1,
8196 
              'period' => 1,
8197 
              'type' => 'logic',
8198 
            },
8199 
            'direction' => 'out',
8200 
            'hdlType' => 'std_logic',
8201 
            'width' => 1,
8202 
          },
8203 
          'to_register5_clr' => {
8204 
            'attributes' => {
8205 
              'domain' => '',
8206 
              'group' => 1,
8207 
              'isClr' => 1,
8208 
              'is_floating_block' => 1,
8209 
              'period' => 1,
8210 
              'type' => 'logic',
8211 
              'valid_bit_used' => 0,
8212 
            },
8213 
            'direction' => 'out',
8214 
            'hdlType' => 'std_logic',
8215 
            'width' => 1,
8216 
          },
8217 
          'to_register5_data_in' => {
8218 
            'attributes' => {
8219 
              'bin_pt' => 0,
8220 
              'is_floating_block' => 1,
8221 
              'must_be_hdl_vector' => 1,
8222 
              'period' => 1,
8223 
              'port_id' => 0,
8224 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
8225 
              'type' => 'Bool',
8226 
            },
8227 
            'direction' => 'out',
8228 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8229 
            'width' => 1,
8230 
          },
8231 
          'to_register5_dout' => {
8232 
            'attributes' => {
8233 
              'bin_pt' => 0,
8234 
              'is_floating_block' => 1,
8235 
              'must_be_hdl_vector' => 1,
8236 
              'period' => 1,
8237 
              'port_id' => 0,
8238 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
8239 
              'type' => 'Bool',
8240 
            },
8241 
            'direction' => 'in',
8242 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8243 
            'width' => 1,
8244 
          },
8245 
          'to_register5_en' => {
8246 
            'attributes' => {
8247 
              'bin_pt' => 0,
8248 
              'is_floating_block' => 1,
8249 
              'must_be_hdl_vector' => 1,
8250 
              'period' => 1,
8251 
              'port_id' => 1,
8252 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
8253 
              'type' => 'Bool',
8254 
            },
8255 
            'direction' => 'out',
8256 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8257 
            'width' => 1,
8258 
          },
8259 
          'to_register6_ce' => {
8260 
            'attributes' => {
8261 
              'domain' => '',
8262 
              'group' => 1,
8263 
              'isCe' => 1,
8264 
              'is_floating_block' => 1,
8265 
              'period' => 1,
8266 
              'type' => 'logic',
8267 
            },
8268 
            'direction' => 'out',
8269 
            'hdlType' => 'std_logic',
8270 
            'width' => 1,
8271 
          },
8272 
          'to_register6_clk' => {
8273 
            'attributes' => {
8274 
              'domain' => '',
8275 
              'group' => 1,
8276 
              'isClk' => 1,
8277 
              'is_floating_block' => 1,
8278 
              'period' => 1,
8279 
              'type' => 'logic',
8280 
            },
8281 
            'direction' => 'out',
8282 
            'hdlType' => 'std_logic',
8283 
            'width' => 1,
8284 
          },
8285 
          'to_register6_clr' => {
8286 
            'attributes' => {
8287 
              'domain' => '',
8288 
              'group' => 1,
8289 
              'isClr' => 1,
8290 
              'is_floating_block' => 1,
8291 
              'period' => 1,
8292 
              'type' => 'logic',
8293 
              'valid_bit_used' => 0,
8294 
            },
8295 
            'direction' => 'out',
8296 
            'hdlType' => 'std_logic',
8297 
            'width' => 1,
8298 
          },
8299 
          'to_register6_data_in' => {
8300 
            'attributes' => {
8301 
              'bin_pt' => 0,
8302 
              'is_floating_block' => 1,
8303 
              'must_be_hdl_vector' => 1,
8304 
              'period' => 1,
8305 
              'port_id' => 0,
8306 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
8307 
              'type' => 'UFix_32_0',
8308 
            },
8309 
            'direction' => 'out',
8310 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8311 
            'width' => 32,
8312 
          },
8313 
          'to_register6_dout' => {
8314 
            'attributes' => {
8315 
              'bin_pt' => 0,
8316 
              'is_floating_block' => 1,
8317 
              'must_be_hdl_vector' => 1,
8318 
              'period' => 1,
8319 
              'port_id' => 0,
8320 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
8321 
              'type' => 'UFix_32_0',
8322 
            },
8323 
            'direction' => 'in',
8324 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8325 
            'width' => 32,
8326 
          },
8327 
          'to_register6_en' => {
8328 
            'attributes' => {
8329 
              'bin_pt' => 0,
8330 
              'is_floating_block' => 1,
8331 
              'must_be_hdl_vector' => 1,
8332 
              'period' => 1,
8333 
              'port_id' => 1,
8334 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
8335 
              'type' => 'Bool',
8336 
            },
8337 
            'direction' => 'out',
8338 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8339 
            'width' => 1,
8340 
          },
8341 
          'to_register7_ce' => {
8342 
            'attributes' => {
8343 
              'domain' => '',
8344 
              'group' => 1,
8345 
              'isCe' => 1,
8346 
              'is_floating_block' => 1,
8347 
              'period' => 1,
8348 
              'type' => 'logic',
8349 
            },
8350 
            'direction' => 'out',
8351 
            'hdlType' => 'std_logic',
8352 
            'width' => 1,
8353 
          },
8354 
          'to_register7_clk' => {
8355 
            'attributes' => {
8356 
              'domain' => '',
8357 
              'group' => 1,
8358 
              'isClk' => 1,
8359 
              'is_floating_block' => 1,
8360 
              'period' => 1,
8361 
              'type' => 'logic',
8362 
            },
8363 
            'direction' => 'out',
8364 
            'hdlType' => 'std_logic',
8365 
            'width' => 1,
8366 
          },
8367 
          'to_register7_clr' => {
8368 
            'attributes' => {
8369 
              'domain' => '',
8370 
              'group' => 1,
8371 
              'isClr' => 1,
8372 
              'is_floating_block' => 1,
8373 
              'period' => 1,
8374 
              'type' => 'logic',
8375 
              'valid_bit_used' => 0,
8376 
            },
8377 
            'direction' => 'out',
8378 
            'hdlType' => 'std_logic',
8379 
            'width' => 1,
8380 
          },
8381 
          'to_register7_data_in' => {
8382 
            'attributes' => {
8383 
              'bin_pt' => 0,
8384 
              'is_floating_block' => 1,
8385 
              'must_be_hdl_vector' => 1,
8386 
              'period' => 1,
8387 
              'port_id' => 0,
8388 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
8389 
              'type' => 'Bool',
8390 
            },
8391 
            'direction' => 'out',
8392 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8393 
            'width' => 1,
8394 
          },
8395 
          'to_register7_dout' => {
8396 
            'attributes' => {
8397 
              'bin_pt' => 0,
8398 
              'is_floating_block' => 1,
8399 
              'must_be_hdl_vector' => 1,
8400 
              'period' => 1,
8401 
              'port_id' => 0,
8402 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
8403 
              'type' => 'Bool',
8404 
            },
8405 
            'direction' => 'in',
8406 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8407 
            'width' => 1,
8408 
          },
8409 
          'to_register7_en' => {
8410 
            'attributes' => {
8411 
              'bin_pt' => 0,
8412 
              'is_floating_block' => 1,
8413 
              'must_be_hdl_vector' => 1,
8414 
              'period' => 1,
8415 
              'port_id' => 1,
8416 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
8417 
              'type' => 'Bool',
8418 
            },
8419 
            'direction' => 'out',
8420 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8421 
            'width' => 1,
8422 
          },
8423 
          'to_register8_ce' => {
8424 
            'attributes' => {
8425 
              'domain' => '',
8426 
              'group' => 1,
8427 
              'isCe' => 1,
8428 
              'is_floating_block' => 1,
8429 
              'period' => 1,
8430 
              'type' => 'logic',
8431 
            },
8432 
            'direction' => 'out',
8433 
            'hdlType' => 'std_logic',
8434 
            'width' => 1,
8435 
          },
8436 
          'to_register8_clk' => {
8437 
            'attributes' => {
8438 
              'domain' => '',
8439 
              'group' => 1,
8440 
              'isClk' => 1,
8441 
              'is_floating_block' => 1,
8442 
              'period' => 1,
8443 
              'type' => 'logic',
8444 
            },
8445 
            'direction' => 'out',
8446 
            'hdlType' => 'std_logic',
8447 
            'width' => 1,
8448 
          },
8449 
          'to_register8_clr' => {
8450 
            'attributes' => {
8451 
              'domain' => '',
8452 
              'group' => 1,
8453 
              'isClr' => 1,
8454 
              'is_floating_block' => 1,
8455 
              'period' => 1,
8456 
              'type' => 'logic',
8457 
              'valid_bit_used' => 0,
8458 
            },
8459 
            'direction' => 'out',
8460 
            'hdlType' => 'std_logic',
8461 
            'width' => 1,
8462 
          },
8463 
          'to_register8_data_in' => {
8464 
            'attributes' => {
8465 
              'bin_pt' => 0,
8466 
              'is_floating_block' => 1,
8467 
              'must_be_hdl_vector' => 1,
8468 
              'period' => 1,
8469 
              'port_id' => 0,
8470 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
8471 
              'type' => 'UFix_32_0',
8472 
            },
8473 
            'direction' => 'out',
8474 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8475 
            'width' => 32,
8476 
          },
8477 
          'to_register8_dout' => {
8478 
            'attributes' => {
8479 
              'bin_pt' => 0,
8480 
              'is_floating_block' => 1,
8481 
              'must_be_hdl_vector' => 1,
8482 
              'period' => 1,
8483 
              'port_id' => 0,
8484 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
8485 
              'type' => 'UFix_32_0',
8486 
            },
8487 
            'direction' => 'in',
8488 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8489 
            'width' => 32,
8490 
          },
8491 
          'to_register8_en' => {
8492 
            'attributes' => {
8493 
              'bin_pt' => 0,
8494 
              'is_floating_block' => 1,
8495 
              'must_be_hdl_vector' => 1,
8496 
              'period' => 1,
8497 
              'port_id' => 1,
8498 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
8499 
              'type' => 'Bool',
8500 
            },
8501 
            'direction' => 'out',
8502 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8503 
            'width' => 1,
8504 
          },
8505 
          'to_register9_ce' => {
8506 
            'attributes' => {
8507 
              'domain' => '',
8508 
              'group' => 1,
8509 
              'isCe' => 1,
8510 
              'is_floating_block' => 1,
8511 
              'period' => 1,
8512 
              'type' => 'logic',
8513 
            },
8514 
            'direction' => 'out',
8515 
            'hdlType' => 'std_logic',
8516 
            'width' => 1,
8517 
          },
8518 
          'to_register9_clk' => {
8519 
            'attributes' => {
8520 
              'domain' => '',
8521 
              'group' => 1,
8522 
              'isClk' => 1,
8523 
              'is_floating_block' => 1,
8524 
              'period' => 1,
8525 
              'type' => 'logic',
8526 
            },
8527 
            'direction' => 'out',
8528 
            'hdlType' => 'std_logic',
8529 
            'width' => 1,
8530 
          },
8531 
          'to_register9_clr' => {
8532 
            'attributes' => {
8533 
              'domain' => '',
8534 
              'group' => 1,
8535 
              'isClr' => 1,
8536 
              'is_floating_block' => 1,
8537 
              'period' => 1,
8538 
              'type' => 'logic',
8539 
              'valid_bit_used' => 0,
8540 
            },
8541 
            'direction' => 'out',
8542 
            'hdlType' => 'std_logic',
8543 
            'width' => 1,
8544 
          },
8545 
          'to_register9_data_in' => {
8546 
            'attributes' => {
8547 
              'bin_pt' => 0,
8548 
              'is_floating_block' => 1,
8549 
              'must_be_hdl_vector' => 1,
8550 
              'period' => 1,
8551 
              'port_id' => 0,
8552 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
8553 
              'type' => 'UFix_32_0',
8554 
            },
8555 
            'direction' => 'out',
8556 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8557 
            'width' => 32,
8558 
          },
8559 
          'to_register9_dout' => {
8560 
            'attributes' => {
8561 
              'bin_pt' => 0,
8562 
              'is_floating_block' => 1,
8563 
              'must_be_hdl_vector' => 1,
8564 
              'period' => 1,
8565 
              'port_id' => 0,
8566 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
8567 
              'type' => 'UFix_32_0',
8568 
            },
8569 
            'direction' => 'in',
8570 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8571 
            'width' => 32,
8572 
          },
8573 
          'to_register9_en' => {
8574 
            'attributes' => {
8575 
              'bin_pt' => 0,
8576 
              'is_floating_block' => 1,
8577 
              'must_be_hdl_vector' => 1,
8578 
              'period' => 1,
8579 
              'port_id' => 1,
8580 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
8581 
              'type' => 'Bool',
8582 
            },
8583 
            'direction' => 'out',
8584 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8585 
            'width' => 1,
8586 
          },
8587 
          'to_register_ce' => {
8588 
            'attributes' => {
8589 
              'domain' => '',
8590 
              'group' => 1,
8591 
              'isCe' => 1,
8592 
              'is_floating_block' => 1,
8593 
              'period' => 1,
8594 
              'type' => 'logic',
8595 
            },
8596 
            'direction' => 'out',
8597 
            'hdlType' => 'std_logic',
8598 
            'width' => 1,
8599 
          },
8600 
          'to_register_clk' => {
8601 
            'attributes' => {
8602 
              'domain' => '',
8603 
              'group' => 1,
8604 
              'isClk' => 1,
8605 
              'is_floating_block' => 1,
8606 
              'period' => 1,
8607 
              'type' => 'logic',
8608 
            },
8609 
            'direction' => 'out',
8610 
            'hdlType' => 'std_logic',
8611 
            'width' => 1,
8612 
          },
8613 
          'to_register_clr' => {
8614 
            'attributes' => {
8615 
              'domain' => '',
8616 
              'group' => 1,
8617 
              'isClr' => 1,
8618 
              'is_floating_block' => 1,
8619 
              'period' => 1,
8620 
              'type' => 'logic',
8621 
              'valid_bit_used' => 0,
8622 
            },
8623 
            'direction' => 'out',
8624 
            'hdlType' => 'std_logic',
8625 
            'width' => 1,
8626 
          },
8627 
          'to_register_data_in' => {
8628 
            'attributes' => {
8629 
              'bin_pt' => 0,
8630 
              'is_floating_block' => 1,
8631 
              'must_be_hdl_vector' => 1,
8632 
              'period' => 1,
8633 
              'port_id' => 0,
8634 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
8635 
              'type' => 'UFix_32_0',
8636 
            },
8637 
            'direction' => 'out',
8638 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8639 
            'width' => 32,
8640 
          },
8641 
          'to_register_dout' => {
8642 
            'attributes' => {
8643 
              'bin_pt' => 0,
8644 
              'is_floating_block' => 1,
8645 
              'must_be_hdl_vector' => 1,
8646 
              'period' => 1,
8647 
              'port_id' => 0,
8648 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
8649 
              'type' => 'UFix_32_0',
8650 
            },
8651 
            'direction' => 'in',
8652 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8653 
            'width' => 32,
8654 
          },
8655 
          'to_register_en' => {
8656 
            'attributes' => {
8657 
              'bin_pt' => 0,
8658 
              'is_floating_block' => 1,
8659 
              'must_be_hdl_vector' => 1,
8660 
              'period' => 1,
8661 
              'port_id' => 1,
8662 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
8663 
              'type' => 'Bool',
8664 
            },
8665 
            'direction' => 'out',
8666 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8667 
            'width' => 1,
8668 
          },
8669 
          'user_int_1o' => {
8670 
            'attributes' => {
8671 
              'bin_pt' => 0,
8672 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
8673 
              'is_floating_block' => 1,
8674 
              'is_gateway_port' => 1,
8675 
              'must_be_hdl_vector' => 1,
8676 
              'period' => 1,
8677 
              'port_id' => 0,
8678 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
8679 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
8680 
              'timingConstraint' => 'none',
8681 
              'type' => 'Bool',
8682 
            },
8683 
            'direction' => 'out',
8684 
            'hdlType' => 'std_logic',
8685 
            'width' => 1,
8686 
          },
8687 
          'user_int_2o' => {
8688 
            'attributes' => {
8689 
              'bin_pt' => 0,
8690 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
8691 
              'is_floating_block' => 1,
8692 
              'is_gateway_port' => 1,
8693 
              'must_be_hdl_vector' => 1,
8694 
              'period' => 1,
8695 
              'port_id' => 0,
8696 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
8697 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
8698 
              'timingConstraint' => 'none',
8699 
              'type' => 'Bool',
8700 
            },
8701 
            'direction' => 'out',
8702 
            'hdlType' => 'std_logic',
8703 
            'width' => 1,
8704 
          },
8705 
          'user_int_3o' => {
8706 
            'attributes' => {
8707 
              'bin_pt' => 0,
8708 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
8709 
              'is_floating_block' => 1,
8710 
              'is_gateway_port' => 1,
8711 
              'must_be_hdl_vector' => 1,
8712 
              'period' => 1,
8713 
              'port_id' => 0,
8714 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
8715 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
8716 
              'timingConstraint' => 'none',
8717 
              'type' => 'Bool',
8718 
            },
8719 
            'direction' => 'out',
8720 
            'hdlType' => 'std_logic',
8721 
            'width' => 1,
8722 
          },
8723 
        },
8724 
        'subblocks' => {
8725 
          'default_clock_driver_x0' => {
8726 
            'connections' => {
8727 
              'ce_1' => 'ce_1_sg_x0',
8728 
              'clk_1' => 'clk_1_sg_x0',
8729 
              'sysce' => [
8730 
                'constant',
8731 
                '\'1\'',
8732 
              ],
8733 
              'sysce_clr' => [
8734 
                'constant',
8735 
                '\'0\'',
8736 
              ],
8737 
              'sysclk' => 'clkNet',
8738 
            },
8739 
            'entity' => {
8740 
              'attributes' => {
8741 
                'domain' => 'default',
8742 
                'hdlArchAttributes' => [
8743 
                  [
8744 
                    'syn_noprune',
8745 
                    'boolean',
8746 
                    'true',
8747 
                  ],
8748 
                  [
8749 
                    'optimize_primitives',
8750 
                    'boolean',
8751 
                    'false',
8752 
                  ],
8753 
                  [
8754 
                    'dont_touch',
8755 
                    'boolean',
8756 
                    'true',
8757 
                  ],
8758 
                ],
8759 
                'hdlEntityAttributes' => [
8760 
                ],
8761 
                'isClkDriver' => 1,
8762 
              },
8763 
              'entityName' => 'default_clock_driver',
8764 
              'ports' => {
8765 
                'ce_1' => {
8766 
                  'attributes' => {
8767 
                    'domain' => 'default',
8768 
                    'group' => 1,
8769 
                    'isCe' => 1,
8770 
                    'period' => 1,
8771 
                    'type' => 'logic',
8772 
                  },
8773 
                  'direction' => 'out',
8774 
                  'hdlType' => 'std_logic',
8775 
                  'width' => 1,
8776 
                },
8777 
                'clk_1' => {
8778 
                  'attributes' => {
8779 
                    'domain' => 'default',
8780 
                    'group' => 1,
8781 
                    'isClk' => 1,
8782 
                    'period' => 1,
8783 
                    'type' => 'logic',
8784 
                  },
8785 
                  'direction' => 'out',
8786 
                  'hdlType' => 'std_logic',
8787 
                  'width' => 1,
8788 
                },
8789 
                'sysce' => {
8790 
                  'attributes' => {
8791 
                    'group' => 6,
8792 
                    'isCe' => 1,
8793 
                    'period' => 1,
8794 
                  },
8795 
                  'direction' => 'in',
8796 
                  'hdlType' => 'std_logic',
8797 
                  'width' => 1,
8798 
                },
8799 
                'sysce_clr' => {
8800 
                  'attributes' => {
8801 
                    'group' => 6,
8802 
                    'isClr' => 1,
8803 
                    'period' => 1,
8804 
                  },
8805 
                  'direction' => 'in',
8806 
                  'hdlType' => 'std_logic',
8807 
                  'width' => 1,
8808 
                },
8809 
                'sysclk' => {
8810 
                  'attributes' => {
8811 
                    'group' => 6,
8812 
                    'isClk' => 1,
8813 
                    'period' => 1,
8814 
                  },
8815 
                  'direction' => 'in',
8816 
                  'hdlType' => 'std_logic',
8817 
                  'width' => 1,
8818 
                },
8819 
              },
8820 
            },
8821 
            'entityName' => 'default_clock_driver',
8822 
          },
8823 
          'persistentdff_inst' => {
8824 
            'connections' => {
8825 
              'clk' => 'clkNet',
8826 
              'd' => 'persistentdff_inst_q',
8827 
              'q' => 'persistentdff_inst_q',
8828 
            },
8829 
            'entity' => {
8830 
              'attributes' => {
8831 
                'entityAlreadyNetlisted' => 1,
8832 
                'hdlCompAttributes' => [
8833 
                  [
8834 
                    'syn_black_box',
8835 
                    'boolean',
8836 
                    'true',
8837 
                  ],
8838 
                  [
8839 
                    'box_type',
8840 
                    'string',
8841 
                    '"black_box"',
8842 
                  ],
8843 
                ],
8844 
                'is_persistent_dff' => 1,
8845 
                'needsComponentDeclaration' => 1,
8846 
              },
8847 
              'entityName' => 'xlpersistentdff',
8848 
              'ports' => {
8849 
                'clk' => {
8850 
                  'direction' => 'in',
8851 
                  'hdlType' => 'std_logic',
8852 
                  'width' => 1,
8853 
                },
8854 
                'd' => {
8855 
                  'direction' => 'in',
8856 
                  'hdlType' => 'std_logic',
8857 
                  'width' => 1,
8858 
                },
8859 
                'q' => {
8860 
                  'direction' => 'out',
8861 
                  'hdlType' => 'std_logic',
8862 
                  'width' => 1,
8863 
                },
8864 
              },
8865 
            },
8866 
            'entityName' => 'xlpersistentdff',
8867 
          },
8868 
          'user_logic_x0' => {
8869 
            'connections' => {
8870 
              'bram_rd_addr' => 'bram_rd_addr_net',
8871 
              'bram_rd_dout' => 'bram_rd_dout_net',
8872 
              'bram_wr_addr' => 'bram_wr_addr_net',
8873 
              'bram_wr_din' => 'bram_wr_din_net',
8874 
              'bram_wr_en' => 'bram_wr_en_net',
8875 
              'ce_1' => 'ce_1_sg_x0',
8876 
              'clk_1' => 'clk_1_sg_x0',
8877 
              'data_in' => 'data_in_net',
8878 
              'data_in_x0' => 'data_in_x0_net',
8879 
              'data_in_x1' => 'data_in_x1_net',
8880 
              'data_in_x10' => 'data_in_x10_net',
8881 
              'data_in_x11' => 'data_in_x11_net',
8882 
              'data_in_x12' => 'data_in_x12_net',
8883 
              'data_in_x13' => 'data_in_x13_net',
8884 
              'data_in_x14' => 'data_in_x14_net',
8885 
              'data_in_x15' => 'data_in_x15_net',
8886 
              'data_in_x16' => 'data_in_x16_net',
8887 
              'data_in_x17' => 'data_in_x17_net',
8888 
              'data_in_x18' => 'data_in_x18_net',
8889 
              'data_in_x19' => 'data_in_x19_net',
8890 
              'data_in_x2' => 'data_in_x2_net',
8891 
              'data_in_x20' => 'data_in_x20_net',
8892 
              'data_in_x21' => 'data_in_x21_net',
8893 
              'data_in_x22' => 'data_in_x22_net',
8894 
              'data_in_x23' => 'data_in_x23_net',
8895 
              'data_in_x24' => 'data_in_x24_net',
8896 
              'data_in_x25' => 'data_in_x25_net',
8897 
              'data_in_x26' => 'data_in_x26_net',
8898 
              'data_in_x3' => 'data_in_x3_net',
8899 
              'data_in_x4' => 'data_in_x4_net',
8900 
              'data_in_x5' => 'data_in_x5_net',
8901 
              'data_in_x6' => 'data_in_x6_net',
8902 
              'data_in_x7' => 'data_in_x7_net',
8903 
              'data_in_x8' => 'data_in_x8_net',
8904 
              'data_in_x9' => 'data_in_x9_net',
8905 
              'data_out_x1' => 'data_out_x1_net',
8906 
              'data_out_x12' => 'data_out_x12_net',
8907 
              'data_out_x13' => 'data_out_x13_net',
8908 
              'data_out_x14' => 'data_out_x14_net',
8909 
              'data_out_x15' => 'data_out_x15_net',
8910 
              'data_out_x16' => 'data_out_x16_net',
8911 
              'data_out_x17' => 'data_out_x17_net',
8912 
              'data_out_x18' => 'data_out_x18_net',
8913 
              'data_out_x19' => 'data_out_x19_net',
8914 
              'data_out_x2' => 'data_out_x2_net',
8915 
              'data_out_x20' => 'data_out_x20_net',
8916 
              'data_out_x21' => 'data_out_x21_net',
8917 
              'data_out_x22' => 'data_out_x22_net',
8918 
              'data_out_x23' => 'data_out_x23_net',
8919 
              'data_out_x24' => 'data_out_x24_net',
8920 
              'data_out_x25' => 'data_out_x25_net',
8921 
              'data_out_x26' => 'data_out_x26_net',
8922 
              'data_out_x27' => 'data_out_x27_net',
8923 
              'data_out_x28' => 'data_out_x28_net',
8924 
              'data_out_x29' => 'data_out_x29_net',
8925 
              'data_out_x3' => 'data_out_x3_net',
8926 
              'data_out_x30' => 'data_out_x30_net',
8927 
              'data_out_x31' => 'data_out_x31_net',
8928 
              'data_out_x32' => 'data_out_x32_net',
8929 
              'data_out_x4' => 'data_out_x4_net',
8930 
              'data_out_x5' => 'data_out_x5_net',
8931 
              'data_out_x8' => 'data_out_x8_net',
8932 
              'data_out_x9' => 'data_out_x9_net',
8933 
              'en' => 'constant6_op_net_x0',
8934 
              'en_x0' => 'constant6_op_net_x1',
8935 
              'en_x1' => 'constant6_op_net_x2',
8936 
              'en_x10' => 'constant6_op_net_x11',
8937 
              'en_x11' => 'constant6_op_net_x12',
8938 
              'en_x12' => 'constant6_op_net_x13',
8939 
              'en_x13' => 'constant6_op_net_x14',
8940 
              'en_x14' => 'constant6_op_net_x15',
8941 
              'en_x15' => 'constant6_op_net_x16',
8942 
              'en_x16' => 'constant6_op_net_x17',
8943 
              'en_x17' => 'constant6_op_net_x18',
8944 
              'en_x18' => 'constant6_op_net_x19',
8945 
              'en_x19' => 'constant6_op_net_x20',
8946 
              'en_x2' => 'constant6_op_net_x3',
8947 
              'en_x20' => 'constant6_op_net_x21',
8948 
              'en_x21' => 'constant6_op_net_x22',
8949 
              'en_x22' => 'constant6_op_net_x23',
8950 
              'en_x23' => 'constant6_op_net_x24',
8951 
              'en_x24' => 'constant6_op_net_x25',
8952 
              'en_x25' => 'constant6_op_net_x26',
8953 
              'en_x26' => 'constant6_op_net_x27',
8954 
              'en_x3' => 'constant6_op_net_x4',
8955 
              'en_x4' => 'constant6_op_net_x5',
8956 
              'en_x5' => 'constant6_op_net_x6',
8957 
              'en_x6' => 'constant6_op_net_x7',
8958 
              'en_x7' => 'constant6_op_net_x8',
8959 
              'en_x8' => 'constant6_op_net_x9',
8960 
              'en_x9' => 'constant6_op_net_x10',
8961 
              'fifo_rd_count_x0' => 'fifo_rd_count_net',
8962 
              'fifo_rd_dout' => 'fifo_rd_dout_net',
8963 
              'fifo_rd_empty' => 'fifo_rd_empty_net',
8964 
              'fifo_rd_en_x1' => 'fifo_rd_en_net',
8965 
              'fifo_rd_pempty_x0' => 'fifo_rd_pempty_net',
8966 
              'fifo_rd_valid' => 'fifo_rd_valid_net',
8967 
              'fifo_wr_count_x0' => 'fifo_wr_count_net',
8968 
              'fifo_wr_din' => 'fifo_wr_din_net',
8969 
              'fifo_wr_en_x0' => 'fifo_wr_en_net',
8970 
              'fifo_wr_full_x0' => 'fifo_wr_full_net',
8971 
              'fifo_wr_pfull_x0' => 'fifo_wr_pfull_net',
8972 
              'rst_i' => 'rst_i_net',
8973 
              'rst_o' => 'rst_o_net',
8974 
              'user_int_1o' => 'user_int_1o_net',
8975 
              'user_int_2o' => 'user_int_2o_net',
8976 
              'user_int_3o' => 'user_int_3o_net',
8977 
            },
8978 
            'entity' => {
8979 
              'attributes' => {
8980 
                'entityAlreadyNetlisted' => 1,
8981 
                'hdlKind' => 'vhdl',
8982 
                'isDesign' => 1,
8983 
                'simulinkName' => 'USER_LOGIC',
8984 
              },
8985 
              'entityName' => 'user_logic',
8986 
              'ports' => {
8987 
                'bram_rd_addr' => {
8988 
                  'attributes' => {
8989 
                    'bin_pt' => 0,
8990 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
8991 
                    'is_floating_block' => 1,
8992 
                    'is_gateway_port' => 1,
8993 
                    'must_be_hdl_vector' => 1,
8994 
                    'period' => 1,
8995 
                    'port_id' => 15,
8996 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_addr',
8997 
                    'source_block' => 'USER_LOGIC',
8998 
                    'timingConstraint' => 'none',
8999 
                    'type' => 'UFix_12_0',
9000 
                  },
9001 
                  'direction' => 'out',
9002 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
9003 
                  'width' => 12,
9004 
                },
9005 
                'bram_rd_dout' => {
9006 
                  'attributes' => {
9007 
                    'bin_pt' => 0,
9008 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
9009 
                    'is_floating_block' => 1,
9010 
                    'is_gateway_port' => 1,
9011 
                    'must_be_hdl_vector' => 1,
9012 
                    'period' => 1,
9013 
                    'port_id' => 0,
9014 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_dout',
9015 
                    'source_block' => 'USER_LOGIC',
9016 
                    'timingConstraint' => 'none',
9017 
                    'type' => 'UFix_64_0',
9018 
                  },
9019 
                  'direction' => 'in',
9020 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
9021 
                  'width' => 64,
9022 
                },
9023 
                'bram_wr_addr' => {
9024 
                  'attributes' => {
9025 
                    'bin_pt' => 0,
9026 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
9027 
                    'is_floating_block' => 1,
9028 
                    'is_gateway_port' => 1,
9029 
                    'must_be_hdl_vector' => 1,
9030 
                    'period' => 1,
9031 
                    'port_id' => 16,
9032 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_addr',
9033 
                    'source_block' => 'USER_LOGIC',
9034 
                    'timingConstraint' => 'none',
9035 
                    'type' => 'UFix_12_0',
9036 
                  },
9037 
                  'direction' => 'out',
9038 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
9039 
                  'width' => 12,
9040 
                },
9041 
                'bram_wr_din' => {
9042 
                  'attributes' => {
9043 
                    'bin_pt' => 0,
9044 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
9045 
                    'is_floating_block' => 1,
9046 
                    'is_gateway_port' => 1,
9047 
                    'must_be_hdl_vector' => 1,
9048 
                    'period' => 1,
9049 
                    'port_id' => 18,
9050 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_din',
9051 
                    'source_block' => 'USER_LOGIC',
9052 
                    'timingConstraint' => 'none',
9053 
                    'type' => 'UFix_64_0',
9054 
                  },
9055 
                  'direction' => 'out',
9056 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
9057 
                  'width' => 64,
9058 
                },
9059 
                'bram_wr_en' => {
9060 
                  'attributes' => {
9061 
                    'bin_pt' => 0,
9062 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
9063 
                    'is_floating_block' => 1,
9064 
                    'is_gateway_port' => 1,
9065 
                    'must_be_hdl_vector' => 1,
9066 
                    'period' => 1,
9067 
                    'port_id' => 23,
9068 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_en',
9069 
                    'source_block' => 'USER_LOGIC',
9070 
                    'timingConstraint' => 'none',
9071 
                    'type' => 'UFix_8_0',
9072 
                  },
9073 
                  'direction' => 'out',
9074 
                  'hdlType' => 'std_logic_vector(7 downto 0)',
9075 
                  'width' => 8,
9076 
                },
9077 
                'ce_1' => {
9078 
                  'attributes' => {
9079 
                    'domain' => '',
9080 
                    'group' => 1,
9081 
                    'isCe' => 1,
9082 
                    'is_subsys_port' => 1,
9083 
                    'period' => 1,
9084 
                    'subsys_port_index' => 0,
9085 
                    'type' => 'logic',
9086 
                  },
9087 
                  'direction' => 'in',
9088 
                  'hdlType' => 'std_logic',
9089 
                  'width' => 1,
9090 
                },
9091 
                'clk_1' => {
9092 
                  'attributes' => {
9093 
                    'domain' => '',
9094 
                    'group' => 1,
9095 
                    'isClk' => 1,
9096 
                    'is_subsys_port' => 1,
9097 
                    'period' => 1,
9098 
                    'subsys_port_index' => 0,
9099 
                    'type' => 'logic',
9100 
                  },
9101 
                  'direction' => 'in',
9102 
                  'hdlType' => 'std_logic',
9103 
                  'width' => 1,
9104 
                },
9105 
                'data_in' => {
9106 
                  'attributes' => {
9107 
                    'bin_pt' => 0,
9108 
                    'is_floating_block' => 1,
9109 
                    'must_be_hdl_vector' => 1,
9110 
                    'period' => 1,
9111 
                    'port_id' => 17,
9112 
                    'simulinkName' => 'USER_LOGIC/tx_en_in2',
9113 
                    'type' => 'UFix_32_0',
9114 
                  },
9115 
                  'direction' => 'out',
9116 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9117 
                  'width' => 32,
9118 
                },
9119 
                'data_in_x0' => {
9120 
                  'attributes' => {
9121 
                    'bin_pt' => 0,
9122 
                    'is_floating_block' => 1,
9123 
                    'must_be_hdl_vector' => 1,
9124 
                    'period' => 1,
9125 
                    'port_id' => 1,
9126 
                    'simulinkName' => 'USER_LOGIC/tx_en_in1',
9127 
                    'type' => 'Bool',
9128 
                  },
9129 
                  'direction' => 'out',
9130 
                  'hdlType' => 'std_logic',
9131 
                  'width' => 1,
9132 
                },
9133 
                'data_in_x1' => {
9134 
                  'attributes' => {
9135 
                    'bin_pt' => 0,
9136 
                    'is_floating_block' => 1,
9137 
                    'must_be_hdl_vector' => 1,
9138 
                    'period' => 1,
9139 
                    'port_id' => 36,
9140 
                    'simulinkName' => 'USER_LOGIC/tx_en_in96',
9141 
                    'type' => 'Bool',
9142 
                  },
9143 
                  'direction' => 'out',
9144 
                  'hdlType' => 'std_logic',
9145 
                  'width' => 1,
9146 
                },
9147 
                'data_in_x10' => {
9148 
                  'attributes' => {
9149 
                    'bin_pt' => 0,
9150 
                    'is_floating_block' => 1,
9151 
                    'must_be_hdl_vector' => 1,
9152 
                    'period' => 1,
9153 
                    'port_id' => 33,
9154 
                    'simulinkName' => 'USER_LOGIC/tx_en_in91',
9155 
                    'type' => 'UFix_32_0',
9156 
                  },
9157 
                  'direction' => 'out',
9158 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9159 
                  'width' => 32,
9160 
                },
9161 
                'data_in_x11' => {
9162 
                  'attributes' => {
9163 
                    'bin_pt' => 0,
9164 
                    'is_floating_block' => 1,
9165 
                    'must_be_hdl_vector' => 1,
9166 
                    'period' => 1,
9167 
                    'port_id' => 21,
9168 
                    'simulinkName' => 'USER_LOGIC/tx_en_in33',
9169 
                    'type' => 'UFix_32_0',
9170 
                  },
9171 
                  'direction' => 'out',
9172 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9173 
                  'width' => 32,
9174 
                },
9175 
                'data_in_x12' => {
9176 
                  'attributes' => {
9177 
                    'bin_pt' => 0,
9178 
                    'is_floating_block' => 1,
9179 
                    'must_be_hdl_vector' => 1,
9180 
                    'period' => 1,
9181 
                    'port_id' => 6,
9182 
                    'simulinkName' => 'USER_LOGIC/tx_en_in113',
9183 
                    'type' => 'Bool',
9184 
                  },
9185 
                  'direction' => 'out',
9186 
                  'hdlType' => 'std_logic',
9187 
                  'width' => 1,
9188 
                },
9189 
                'data_in_x13' => {
9190 
                  'attributes' => {
9191 
                    'bin_pt' => 0,
9192 
                    'is_floating_block' => 1,
9193 
                    'must_be_hdl_vector' => 1,
9194 
                    'period' => 1,
9195 
                    'port_id' => 8,
9196 
                    'simulinkName' => 'USER_LOGIC/tx_en_in115',
9197 
                    'type' => 'UFix_32_0',
9198 
                  },
9199 
                  'direction' => 'out',
9200 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9201 
                  'width' => 32,
9202 
                },
9203 
                'data_in_x14' => {
9204 
                  'attributes' => {
9205 
                    'bin_pt' => 0,
9206 
                    'is_floating_block' => 1,
9207 
                    'must_be_hdl_vector' => 1,
9208 
                    'period' => 1,
9209 
                    'port_id' => 7,
9210 
                    'simulinkName' => 'USER_LOGIC/tx_en_in114',
9211 
                    'type' => 'Bool',
9212 
                  },
9213 
                  'direction' => 'out',
9214 
                  'hdlType' => 'std_logic',
9215 
                  'width' => 1,
9216 
                },
9217 
                'data_in_x15' => {
9218 
                  'attributes' => {
9219 
                    'bin_pt' => 0,
9220 
                    'is_floating_block' => 1,
9221 
                    'must_be_hdl_vector' => 1,
9222 
                    'period' => 1,
9223 
                    'port_id' => 9,
9224 
                    'simulinkName' => 'USER_LOGIC/tx_en_in118',
9225 
                    'type' => 'UFix_32_0',
9226 
                  },
9227 
                  'direction' => 'out',
9228 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9229 
                  'width' => 32,
9230 
                },
9231 
                'data_in_x16' => {
9232 
                  'attributes' => {
9233 
                    'bin_pt' => 0,
9234 
                    'is_floating_block' => 1,
9235 
                    'must_be_hdl_vector' => 1,
9236 
                    'period' => 1,
9237 
                    'port_id' => 10,
9238 
                    'simulinkName' => 'USER_LOGIC/tx_en_in121',
9239 
                    'type' => 'Bool',
9240 
                  },
9241 
                  'direction' => 'out',
9242 
                  'hdlType' => 'std_logic',
9243 
                  'width' => 1,
9244 
                },
9245 
                'data_in_x17' => {
9246 
                  'attributes' => {
9247 
                    'bin_pt' => 0,
9248 
                    'is_floating_block' => 1,
9249 
                    'must_be_hdl_vector' => 1,
9250 
                    'period' => 1,
9251 
                    'port_id' => 11,
9252 
                    'simulinkName' => 'USER_LOGIC/tx_en_in122',
9253 
                    'type' => 'UFix_32_0',
9254 
                  },
9255 
                  'direction' => 'out',
9256 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9257 
                  'width' => 32,
9258 
                },
9259 
                'data_in_x18' => {
9260 
                  'attributes' => {
9261 
                    'bin_pt' => 0,
9262 
                    'is_floating_block' => 1,
9263 
                    'must_be_hdl_vector' => 1,
9264 
                    'period' => 1,
9265 
                    'port_id' => 12,
9266 
                    'simulinkName' => 'USER_LOGIC/tx_en_in125',
9267 
                    'type' => 'Bool',
9268 
                  },
9269 
                  'direction' => 'out',
9270 
                  'hdlType' => 'std_logic',
9271 
                  'width' => 1,
9272 
                },
9273 
                'data_in_x19' => {
9274 
                  'attributes' => {
9275 
                    'bin_pt' => 0,
9276 
                    'is_floating_block' => 1,
9277 
                    'must_be_hdl_vector' => 1,
9278 
                    'period' => 1,
9279 
                    'port_id' => 13,
9280 
                    'simulinkName' => 'USER_LOGIC/tx_en_in126',
9281 
                    'type' => 'UFix_32_0',
9282 
                  },
9283 
                  'direction' => 'out',
9284 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9285 
                  'width' => 32,
9286 
                },
9287 
                'data_in_x2' => {
9288 
                  'attributes' => {
9289 
                    'bin_pt' => 0,
9290 
                    'is_floating_block' => 1,
9291 
                    'must_be_hdl_vector' => 1,
9292 
                    'period' => 1,
9293 
                    'port_id' => 37,
9294 
                    'simulinkName' => 'USER_LOGIC/tx_en_in97',
9295 
                    'type' => 'Bool',
9296 
                  },
9297 
                  'direction' => 'out',
9298 
                  'hdlType' => 'std_logic',
9299 
                  'width' => 1,
9300 
                },
9301 
                'data_in_x20' => {
9302 
                  'attributes' => {
9303 
                    'bin_pt' => 0,
9304 
                    'is_floating_block' => 1,
9305 
                    'must_be_hdl_vector' => 1,
9306 
                    'period' => 1,
9307 
                    'port_id' => 2,
9308 
                    'simulinkName' => 'USER_LOGIC/tx_en_in10',
9309 
                    'type' => 'UFix_32_0',
9310 
                  },
9311 
                  'direction' => 'out',
9312 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9313 
                  'width' => 32,
9314 
                },
9315 
                'data_in_x21' => {
9316 
                  'attributes' => {
9317 
                    'bin_pt' => 0,
9318 
                    'is_floating_block' => 1,
9319 
                    'must_be_hdl_vector' => 1,
9320 
                    'period' => 1,
9321 
                    'port_id' => 34,
9322 
                    'simulinkName' => 'USER_LOGIC/tx_en_in94',
9323 
                    'type' => 'Bool',
9324 
                  },
9325 
                  'direction' => 'out',
9326 
                  'hdlType' => 'std_logic',
9327 
                  'width' => 1,
9328 
                },
9329 
                'data_in_x22' => {
9330 
                  'attributes' => {
9331 
                    'bin_pt' => 0,
9332 
                    'is_floating_block' => 1,
9333 
                    'must_be_hdl_vector' => 1,
9334 
                    'period' => 1,
9335 
                    'port_id' => 29,
9336 
                    'simulinkName' => 'USER_LOGIC/tx_en_in7',
9337 
                    'type' => 'Bool',
9338 
                  },
9339 
                  'direction' => 'out',
9340 
                  'hdlType' => 'std_logic',
9341 
                  'width' => 1,
9342 
                },
9343 
                'data_in_x23' => {
9344 
                  'attributes' => {
9345 
                    'bin_pt' => 0,
9346 
                    'is_floating_block' => 1,
9347 
                    'must_be_hdl_vector' => 1,
9348 
                    'period' => 1,
9349 
                    'port_id' => 24,
9350 
                    'simulinkName' => 'USER_LOGIC/tx_en_in50',
9351 
                    'type' => 'UFix_32_0',
9352 
                  },
9353 
                  'direction' => 'out',
9354 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9355 
                  'width' => 32,
9356 
                },
9357 
                'data_in_x24' => {
9358 
                  'attributes' => {
9359 
                    'bin_pt' => 0,
9360 
                    'is_floating_block' => 1,
9361 
                    'must_be_hdl_vector' => 1,
9362 
                    'period' => 1,
9363 
                    'port_id' => 35,
9364 
                    'simulinkName' => 'USER_LOGIC/tx_en_in95',
9365 
                    'type' => 'Bool',
9366 
                  },
9367 
                  'direction' => 'out',
9368 
                  'hdlType' => 'std_logic',
9369 
                  'width' => 1,
9370 
                },
9371 
                'data_in_x25' => {
9372 
                  'attributes' => {
9373 
                    'bin_pt' => 0,
9374 
                    'is_floating_block' => 1,
9375 
                    'must_be_hdl_vector' => 1,
9376 
                    'period' => 1,
9377 
                    'port_id' => 26,
9378 
                    'simulinkName' => 'USER_LOGIC/tx_en_in53',
9379 
                    'type' => 'UFix_32_0',
9380 
                  },
9381 
                  'direction' => 'out',
9382 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9383 
                  'width' => 32,
9384 
                },
9385 
                'data_in_x26' => {
9386 
                  'attributes' => {
9387 
                    'bin_pt' => 0,
9388 
                    'is_floating_block' => 1,
9389 
                    'must_be_hdl_vector' => 1,
9390 
                    'period' => 1,
9391 
                    'port_id' => 27,
9392 
                    'simulinkName' => 'USER_LOGIC/tx_en_in54',
9393 
                    'type' => 'UFix_32_0',
9394 
                  },
9395 
                  'direction' => 'out',
9396 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9397 
                  'width' => 32,
9398 
                },
9399 
                'data_in_x3' => {
9400 
                  'attributes' => {
9401 
                    'bin_pt' => 0,
9402 
                    'is_floating_block' => 1,
9403 
                    'must_be_hdl_vector' => 1,
9404 
                    'period' => 1,
9405 
                    'port_id' => 14,
9406 
                    'simulinkName' => 'USER_LOGIC/tx_en_in13',
9407 
                    'type' => 'Bool',
9408 
                  },
9409 
                  'direction' => 'out',
9410 
                  'hdlType' => 'std_logic',
9411 
                  'width' => 1,
9412 
                },
9413 
                'data_in_x4' => {
9414 
                  'attributes' => {
9415 
                    'bin_pt' => 0,
9416 
                    'is_floating_block' => 1,
9417 
                    'must_be_hdl_vector' => 1,
9418 
                    'period' => 1,
9419 
                    'port_id' => 28,
9420 
                    'simulinkName' => 'USER_LOGIC/tx_en_in66',
9421 
                    'type' => 'UFix_32_0',
9422 
                  },
9423 
                  'direction' => 'out',
9424 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9425 
                  'width' => 32,
9426 
                },
9427 
                'data_in_x5' => {
9428 
                  'attributes' => {
9429 
                    'bin_pt' => 0,
9430 
                    'is_floating_block' => 1,
9431 
                    'must_be_hdl_vector' => 1,
9432 
                    'period' => 1,
9433 
                    'port_id' => 38,
9434 
                    'simulinkName' => 'USER_LOGIC/tx_en_in98',
9435 
                    'type' => 'Bool',
9436 
                  },
9437 
                  'direction' => 'out',
9438 
                  'hdlType' => 'std_logic',
9439 
                  'width' => 1,
9440 
                },
9441 
                'data_in_x6' => {
9442 
                  'attributes' => {
9443 
                    'bin_pt' => 0,
9444 
                    'is_floating_block' => 1,
9445 
                    'must_be_hdl_vector' => 1,
9446 
                    'period' => 1,
9447 
                    'port_id' => 31,
9448 
                    'simulinkName' => 'USER_LOGIC/tx_en_in85',
9449 
                    'type' => 'UFix_32_0',
9450 
                  },
9451 
                  'direction' => 'out',
9452 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9453 
                  'width' => 32,
9454 
                },
9455 
                'data_in_x7' => {
9456 
                  'attributes' => {
9457 
                    'bin_pt' => 0,
9458 
                    'is_floating_block' => 1,
9459 
                    'must_be_hdl_vector' => 1,
9460 
                    'period' => 1,
9461 
                    'port_id' => 39,
9462 
                    'simulinkName' => 'USER_LOGIC/tx_en_in99',
9463 
                    'type' => 'Bool',
9464 
                  },
9465 
                  'direction' => 'out',
9466 
                  'hdlType' => 'std_logic',
9467 
                  'width' => 1,
9468 
                },
9469 
                'data_in_x8' => {
9470 
                  'attributes' => {
9471 
                    'bin_pt' => 0,
9472 
                    'is_floating_block' => 1,
9473 
                    'must_be_hdl_vector' => 1,
9474 
                    'period' => 1,
9475 
                    'port_id' => 32,
9476 
                    'simulinkName' => 'USER_LOGIC/tx_en_in88',
9477 
                    'type' => 'UFix_32_0',
9478 
                  },
9479 
                  'direction' => 'out',
9480 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9481 
                  'width' => 32,
9482 
                },
9483 
                'data_in_x9' => {
9484 
                  'attributes' => {
9485 
                    'bin_pt' => 0,
9486 
                    'is_floating_block' => 1,
9487 
                    'must_be_hdl_vector' => 1,
9488 
                    'period' => 1,
9489 
                    'port_id' => 3,
9490 
                    'simulinkName' => 'USER_LOGIC/tx_en_in100',
9491 
                    'type' => 'Bool',
9492 
                  },
9493 
                  'direction' => 'out',
9494 
                  'hdlType' => 'std_logic',
9495 
                  'width' => 1,
9496 
                },
9497 
                'data_out_x1' => {
9498 
                  'attributes' => {
9499 
                    'bin_pt' => 0,
9500 
                    'is_floating_block' => 1,
9501 
                    'must_be_hdl_vector' => 1,
9502 
                    'period' => 1,
9503 
                    'port_id' => 9,
9504 
                    'simulinkName' => 'USER_LOGIC/From Register10',
9505 
                    'type' => 'UFix_1_0',
9506 
                  },
9507 
                  'direction' => 'in',
9508 
                  'hdlType' => 'std_logic',
9509 
                  'width' => 1,
9510 
                },
9511 
                'data_out_x12' => {
9512 
                  'attributes' => {
9513 
                    'bin_pt' => 0,
9514 
                    'is_floating_block' => 1,
9515 
                    'must_be_hdl_vector' => 1,
9516 
                    'period' => 1,
9517 
                    'port_id' => 16,
9518 
                    'simulinkName' => 'USER_LOGIC/From Register20',
9519 
                    'type' => 'UFix_32_0',
9520 
                  },
9521 
                  'direction' => 'in',
9522 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9523 
                  'width' => 32,
9524 
                },
9525 
                'data_out_x13' => {
9526 
                  'attributes' => {
9527 
                    'bin_pt' => 0,
9528 
                    'is_floating_block' => 1,
9529 
                    'must_be_hdl_vector' => 1,
9530 
                    'period' => 1,
9531 
                    'port_id' => 17,
9532 
                    'simulinkName' => 'USER_LOGIC/From Register21',
9533 
                    'type' => 'UFix_1_0',
9534 
                  },
9535 
                  'direction' => 'in',
9536 
                  'hdlType' => 'std_logic',
9537 
                  'width' => 1,
9538 
                },
9539 
                'data_out_x14' => {
9540 
                  'attributes' => {
9541 
                    'bin_pt' => 0,
9542 
                    'is_floating_block' => 1,
9543 
                    'must_be_hdl_vector' => 1,
9544 
                    'period' => 1,
9545 
                    'port_id' => 18,
9546 
                    'simulinkName' => 'USER_LOGIC/From Register22',
9547 
                    'type' => 'UFix_32_0',
9548 
                  },
9549 
                  'direction' => 'in',
9550 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9551 
                  'width' => 32,
9552 
                },
9553 
                'data_out_x15' => {
9554 
                  'attributes' => {
9555 
                    'bin_pt' => 0,
9556 
                    'is_floating_block' => 1,
9557 
                    'must_be_hdl_vector' => 1,
9558 
                    'period' => 1,
9559 
                    'port_id' => 19,
9560 
                    'simulinkName' => 'USER_LOGIC/From Register23',
9561 
                    'type' => 'UFix_1_0',
9562 
                  },
9563 
                  'direction' => 'in',
9564 
                  'hdlType' => 'std_logic',
9565 
                  'width' => 1,
9566 
                },
9567 
                'data_out_x16' => {
9568 
                  'attributes' => {
9569 
                    'bin_pt' => 0,
9570 
                    'is_floating_block' => 1,
9571 
                    'must_be_hdl_vector' => 1,
9572 
                    'period' => 1,
9573 
                    'port_id' => 20,
9574 
                    'simulinkName' => 'USER_LOGIC/From Register24',
9575 
                    'type' => 'UFix_32_0',
9576 
                  },
9577 
                  'direction' => 'in',
9578 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9579 
                  'width' => 32,
9580 
                },
9581 
                'data_out_x17' => {
9582 
                  'attributes' => {
9583 
                    'bin_pt' => 0,
9584 
                    'is_floating_block' => 1,
9585 
                    'must_be_hdl_vector' => 1,
9586 
                    'period' => 1,
9587 
                    'port_id' => 21,
9588 
                    'simulinkName' => 'USER_LOGIC/From Register25',
9589 
                    'type' => 'UFix_1_0',
9590 
                  },
9591 
                  'direction' => 'in',
9592 
                  'hdlType' => 'std_logic',
9593 
                  'width' => 1,
9594 
                },
9595 
                'data_out_x18' => {
9596 
                  'attributes' => {
9597 
                    'bin_pt' => 0,
9598 
                    'is_floating_block' => 1,
9599 
                    'must_be_hdl_vector' => 1,
9600 
                    'period' => 1,
9601 
                    'port_id' => 22,
9602 
                    'simulinkName' => 'USER_LOGIC/From Register26',
9603 
                    'type' => 'UFix_32_0',
9604 
                  },
9605 
                  'direction' => 'in',
9606 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9607 
                  'width' => 32,
9608 
                },
9609 
                'data_out_x19' => {
9610 
                  'attributes' => {
9611 
                    'bin_pt' => 0,
9612 
                    'is_floating_block' => 1,
9613 
                    'must_be_hdl_vector' => 1,
9614 
                    'period' => 1,
9615 
                    'port_id' => 23,
9616 
                    'simulinkName' => 'USER_LOGIC/From Register27',
9617 
                    'type' => 'UFix_1_0',
9618 
                  },
9619 
                  'direction' => 'in',
9620 
                  'hdlType' => 'std_logic',
9621 
                  'width' => 1,
9622 
                },
9623 
                'data_out_x2' => {
9624 
                  'attributes' => {
9625 
                    'bin_pt' => 0,
9626 
                    'is_floating_block' => 1,
9627 
                    'must_be_hdl_vector' => 1,
9628 
                    'period' => 1,
9629 
                    'port_id' => 10,
9630 
                    'simulinkName' => 'USER_LOGIC/From Register11',
9631 
                    'type' => 'UFix_32_0',
9632 
                  },
9633 
                  'direction' => 'in',
9634 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9635 
                  'width' => 32,
9636 
                },
9637 
                'data_out_x20' => {
9638 
                  'attributes' => {
9639 
                    'bin_pt' => 0,
9640 
                    'is_floating_block' => 1,
9641 
                    'must_be_hdl_vector' => 1,
9642 
                    'period' => 1,
9643 
                    'port_id' => 24,
9644 
                    'simulinkName' => 'USER_LOGIC/From Register28',
9645 
                    'type' => 'UFix_32_0',
9646 
                  },
9647 
                  'direction' => 'in',
9648 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9649 
                  'width' => 32,
9650 
                },
9651 
                'data_out_x21' => {
9652 
                  'attributes' => {
9653 
                    'bin_pt' => 0,
9654 
                    'is_floating_block' => 1,
9655 
                    'must_be_hdl_vector' => 1,
9656 
                    'period' => 1,
9657 
                    'port_id' => 25,
9658 
                    'simulinkName' => 'USER_LOGIC/From Register29',
9659 
                    'type' => 'UFix_1_0',
9660 
                  },
9661 
                  'direction' => 'in',
9662 
                  'hdlType' => 'std_logic',
9663 
                  'width' => 1,
9664 
                },
9665 
                'data_out_x22' => {
9666 
                  'attributes' => {
9667 
                    'bin_pt' => 0,
9668 
                    'is_floating_block' => 1,
9669 
                    'must_be_hdl_vector' => 1,
9670 
                    'period' => 1,
9671 
                    'port_id' => 26,
9672 
                    'simulinkName' => 'USER_LOGIC/From Register3',
9673 
                    'type' => 'UFix_32_0',
9674 
                  },
9675 
                  'direction' => 'in',
9676 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9677 
                  'width' => 32,
9678 
                },
9679 
                'data_out_x23' => {
9680 
                  'attributes' => {
9681 
                    'bin_pt' => 0,
9682 
                    'is_floating_block' => 1,
9683 
                    'must_be_hdl_vector' => 1,
9684 
                    'period' => 1,
9685 
                    'port_id' => 27,
9686 
                    'simulinkName' => 'USER_LOGIC/From Register30',
9687 
                    'type' => 'UFix_32_0',
9688 
                  },
9689 
                  'direction' => 'in',
9690 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9691 
                  'width' => 32,
9692 
                },
9693 
                'data_out_x24' => {
9694 
                  'attributes' => {
9695 
                    'bin_pt' => 0,
9696 
                    'is_floating_block' => 1,
9697 
                    'must_be_hdl_vector' => 1,
9698 
                    'period' => 1,
9699 
                    'port_id' => 28,
9700 
                    'simulinkName' => 'USER_LOGIC/From Register31',
9701 
                    'type' => 'UFix_1_0',
9702 
                  },
9703 
                  'direction' => 'in',
9704 
                  'hdlType' => 'std_logic',
9705 
                  'width' => 1,
9706 
                },
9707 
                'data_out_x25' => {
9708 
                  'attributes' => {
9709 
                    'bin_pt' => 0,
9710 
                    'is_floating_block' => 1,
9711 
                    'must_be_hdl_vector' => 1,
9712 
                    'period' => 1,
9713 
                    'port_id' => 29,
9714 
                    'simulinkName' => 'USER_LOGIC/From Register32',
9715 
                    'type' => 'UFix_32_0',
9716 
                  },
9717 
                  'direction' => 'in',
9718 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9719 
                  'width' => 32,
9720 
                },
9721 
                'data_out_x26' => {
9722 
                  'attributes' => {
9723 
                    'bin_pt' => 0,
9724 
                    'is_floating_block' => 1,
9725 
                    'must_be_hdl_vector' => 1,
9726 
                    'period' => 1,
9727 
                    'port_id' => 30,
9728 
                    'simulinkName' => 'USER_LOGIC/From Register33',
9729 
                    'type' => 'UFix_1_0',
9730 
                  },
9731 
                  'direction' => 'in',
9732 
                  'hdlType' => 'std_logic',
9733 
                  'width' => 1,
9734 
                },
9735 
                'data_out_x27' => {
9736 
                  'attributes' => {
9737 
                    'bin_pt' => 0,
9738 
                    'is_floating_block' => 1,
9739 
                    'must_be_hdl_vector' => 1,
9740 
                    'period' => 1,
9741 
                    'port_id' => 31,
9742 
                    'simulinkName' => 'USER_LOGIC/From Register4',
9743 
                    'type' => 'UFix_1_0',
9744 
                  },
9745 
                  'direction' => 'in',
9746 
                  'hdlType' => 'std_logic',
9747 
                  'width' => 1,
9748 
                },
9749 
                'data_out_x28' => {
9750 
                  'attributes' => {
9751 
                    'bin_pt' => 0,
9752 
                    'is_floating_block' => 1,
9753 
                    'must_be_hdl_vector' => 1,
9754 
                    'period' => 1,
9755 
                    'port_id' => 32,
9756 
                    'simulinkName' => 'USER_LOGIC/From Register5',
9757 
                    'type' => 'UFix_32_0',
9758 
                  },
9759 
                  'direction' => 'in',
9760 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9761 
                  'width' => 32,
9762 
                },
9763 
                'data_out_x29' => {
9764 
                  'attributes' => {
9765 
                    'bin_pt' => 0,
9766 
                    'is_floating_block' => 1,
9767 
                    'must_be_hdl_vector' => 1,
9768 
                    'period' => 1,
9769 
                    'port_id' => 33,
9770 
                    'simulinkName' => 'USER_LOGIC/From Register6',
9771 
                    'type' => 'UFix_1_0',
9772 
                  },
9773 
                  'direction' => 'in',
9774 
                  'hdlType' => 'std_logic',
9775 
                  'width' => 1,
9776 
                },
9777 
                'data_out_x3' => {
9778 
                  'attributes' => {
9779 
                    'bin_pt' => 0,
9780 
                    'is_floating_block' => 1,
9781 
                    'must_be_hdl_vector' => 1,
9782 
                    'period' => 1,
9783 
                    'port_id' => 11,
9784 
                    'simulinkName' => 'USER_LOGIC/From Register12',
9785 
                    'type' => 'UFix_1_0',
9786 
                  },
9787 
                  'direction' => 'in',
9788 
                  'hdlType' => 'std_logic',
9789 
                  'width' => 1,
9790 
                },
9791 
                'data_out_x30' => {
9792 
                  'attributes' => {
9793 
                    'bin_pt' => 0,
9794 
                    'is_floating_block' => 1,
9795 
                    'must_be_hdl_vector' => 1,
9796 
                    'period' => 1,
9797 
                    'port_id' => 34,
9798 
                    'simulinkName' => 'USER_LOGIC/From Register7',
9799 
                    'type' => 'UFix_32_0',
9800 
                  },
9801 
                  'direction' => 'in',
9802 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9803 
                  'width' => 32,
9804 
                },
9805 
                'data_out_x31' => {
9806 
                  'attributes' => {
9807 
                    'bin_pt' => 0,
9808 
                    'is_floating_block' => 1,
9809 
                    'must_be_hdl_vector' => 1,
9810 
                    'period' => 1,
9811 
                    'port_id' => 35,
9812 
                    'simulinkName' => 'USER_LOGIC/From Register8',
9813 
                    'type' => 'UFix_1_0',
9814 
                  },
9815 
                  'direction' => 'in',
9816 
                  'hdlType' => 'std_logic',
9817 
                  'width' => 1,
9818 
                },
9819 
                'data_out_x32' => {
9820 
                  'attributes' => {
9821 
                    'bin_pt' => 0,
9822 
                    'is_floating_block' => 1,
9823 
                    'must_be_hdl_vector' => 1,
9824 
                    'period' => 1,
9825 
                    'port_id' => 36,
9826 
                    'simulinkName' => 'USER_LOGIC/From Register9',
9827 
                    'type' => 'UFix_32_0',
9828 
                  },
9829 
                  'direction' => 'in',
9830 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9831 
                  'width' => 32,
9832 
                },
9833 
                'data_out_x4' => {
9834 
                  'attributes' => {
9835 
                    'bin_pt' => 0,
9836 
                    'is_floating_block' => 1,
9837 
                    'must_be_hdl_vector' => 1,
9838 
                    'period' => 1,
9839 
                    'port_id' => 12,
9840 
                    'simulinkName' => 'USER_LOGIC/From Register13',
9841 
                    'type' => 'UFix_32_0',
9842 
                  },
9843 
                  'direction' => 'in',
9844 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9845 
                  'width' => 32,
9846 
                },
9847 
                'data_out_x5' => {
9848 
                  'attributes' => {
9849 
                    'bin_pt' => 0,
9850 
                    'is_floating_block' => 1,
9851 
                    'must_be_hdl_vector' => 1,
9852 
                    'period' => 1,
9853 
                    'port_id' => 13,
9854 
                    'simulinkName' => 'USER_LOGIC/From Register14',
9855 
                    'type' => 'UFix_1_0',
9856 
                  },
9857 
                  'direction' => 'in',
9858 
                  'hdlType' => 'std_logic',
9859 
                  'width' => 1,
9860 
                },
9861 
                'data_out_x8' => {
9862 
                  'attributes' => {
9863 
                    'bin_pt' => 0,
9864 
                    'is_floating_block' => 1,
9865 
                    'must_be_hdl_vector' => 1,
9866 
                    'period' => 1,
9867 
                    'port_id' => 14,
9868 
                    'simulinkName' => 'USER_LOGIC/From Register17',
9869 
                    'type' => 'UFix_32_0',
9870 
                  },
9871 
                  'direction' => 'in',
9872 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9873 
                  'width' => 32,
9874 
                },
9875 
                'data_out_x9' => {
9876 
                  'attributes' => {
9877 
                    'bin_pt' => 0,
9878 
                    'is_floating_block' => 1,
9879 
                    'must_be_hdl_vector' => 1,
9880 
                    'period' => 1,
9881 
                    'port_id' => 15,
9882 
                    'simulinkName' => 'USER_LOGIC/From Register18',
9883 
                    'type' => 'UFix_1_0',
9884 
                  },
9885 
                  'direction' => 'in',
9886 
                  'hdlType' => 'std_logic',
9887 
                  'width' => 1,
9888 
                },
9889 
                'en' => {
9890 
                  'attributes' => {
9891 
                    'bin_pt' => 0,
9892 
                    'is_floating_block' => 1,
9893 
                    'must_be_hdl_vector' => 1,
9894 
                    'period' => 1,
9895 
                    'port_id' => 0,
9896 
                    'simulinkName' => 'USER_LOGIC/en',
9897 
                    'type' => 'Bool',
9898 
                  },
9899 
                  'direction' => 'out',
9900 
                  'hdlType' => 'std_logic',
9901 
                  'width' => 1,
9902 
                },
9903 
                'en_x0' => {
9904 
                  'attributes' => {
9905 
                    'bin_pt' => 0,
9906 
                    'is_floating_block' => 1,
9907 
                    'must_be_hdl_vector' => 1,
9908 
                    'period' => 1,
9909 
                    'port_id' => 0,
9910 
                    'simulinkName' => 'USER_LOGIC/en',
9911 
                    'type' => 'Bool',
9912 
                  },
9913 
                  'direction' => 'out',
9914 
                  'hdlType' => 'std_logic',
9915 
                  'width' => 1,
9916 
                },
9917 
                'en_x1' => {
9918 
                  'attributes' => {
9919 
                    'bin_pt' => 0,
9920 
                    'is_floating_block' => 1,
9921 
                    'must_be_hdl_vector' => 1,
9922 
                    'period' => 1,
9923 
                    'port_id' => 0,
9924 
                    'simulinkName' => 'USER_LOGIC/en',
9925 
                    'type' => 'Bool',
9926 
                  },
9927 
                  'direction' => 'out',
9928 
                  'hdlType' => 'std_logic',
9929 
                  'width' => 1,
9930 
                },
9931 
                'en_x10' => {
9932 
                  'attributes' => {
9933 
                    'bin_pt' => 0,
9934 
                    'is_floating_block' => 1,
9935 
                    'must_be_hdl_vector' => 1,
9936 
                    'period' => 1,
9937 
                    'port_id' => 0,
9938 
                    'simulinkName' => 'USER_LOGIC/en',
9939 
                    'type' => 'Bool',
9940 
                  },
9941 
                  'direction' => 'out',
9942 
                  'hdlType' => 'std_logic',
9943 
                  'width' => 1,
9944 
                },
9945 
                'en_x11' => {
9946 
                  'attributes' => {
9947 
                    'bin_pt' => 0,
9948 
                    'is_floating_block' => 1,
9949 
                    'must_be_hdl_vector' => 1,
9950 
                    'period' => 1,
9951 
                    'port_id' => 0,
9952 
                    'simulinkName' => 'USER_LOGIC/en',
9953 
                    'type' => 'Bool',
9954 
                  },
9955 
                  'direction' => 'out',
9956 
                  'hdlType' => 'std_logic',
9957 
                  'width' => 1,
9958 
                },
9959 
                'en_x12' => {
9960 
                  'attributes' => {
9961 
                    'bin_pt' => 0,
9962 
                    'is_floating_block' => 1,
9963 
                    'must_be_hdl_vector' => 1,
9964 
                    'period' => 1,
9965 
                    'port_id' => 0,
9966 
                    'simulinkName' => 'USER_LOGIC/en',
9967 
                    'type' => 'Bool',
9968 
                  },
9969 
                  'direction' => 'out',
9970 
                  'hdlType' => 'std_logic',
9971 
                  'width' => 1,
9972 
                },
9973 
                'en_x13' => {
9974 
                  'attributes' => {
9975 
                    'bin_pt' => 0,
9976 
                    'is_floating_block' => 1,
9977 
                    'must_be_hdl_vector' => 1,
9978 
                    'period' => 1,
9979 
                    'port_id' => 0,
9980 
                    'simulinkName' => 'USER_LOGIC/en',
9981 
                    'type' => 'Bool',
9982 
                  },
9983 
                  'direction' => 'out',
9984 
                  'hdlType' => 'std_logic',
9985 
                  'width' => 1,
9986 
                },
9987 
                'en_x14' => {
9988 
                  'attributes' => {
9989 
                    'bin_pt' => 0,
9990 
                    'is_floating_block' => 1,
9991 
                    'must_be_hdl_vector' => 1,
9992 
                    'period' => 1,
9993 
                    'port_id' => 0,
9994 
                    'simulinkName' => 'USER_LOGIC/en',
9995 
                    'type' => 'Bool',
9996 
                  },
9997 
                  'direction' => 'out',
9998 
                  'hdlType' => 'std_logic',
9999 
                  'width' => 1,
10000 
                },
10001 
                'en_x15' => {
10002 
                  'attributes' => {
10003 
                    'bin_pt' => 0,
10004 
                    'is_floating_block' => 1,
10005 
                    'must_be_hdl_vector' => 1,
10006 
                    'period' => 1,
10007 
                    'port_id' => 0,
10008 
                    'simulinkName' => 'USER_LOGIC/en',
10009 
                    'type' => 'Bool',
10010 
                  },
10011 
                  'direction' => 'out',
10012 
                  'hdlType' => 'std_logic',
10013 
                  'width' => 1,
10014 
                },
10015 
                'en_x16' => {
10016 
                  'attributes' => {
10017 
                    'bin_pt' => 0,
10018 
                    'is_floating_block' => 1,
10019 
                    'must_be_hdl_vector' => 1,
10020 
                    'period' => 1,
10021 
                    'port_id' => 0,
10022 
                    'simulinkName' => 'USER_LOGIC/en',
10023 
                    'type' => 'Bool',
10024 
                  },
10025 
                  'direction' => 'out',
10026 
                  'hdlType' => 'std_logic',
10027 
                  'width' => 1,
10028 
                },
10029 
                'en_x17' => {
10030 
                  'attributes' => {
10031 
                    'bin_pt' => 0,
10032 
                    'is_floating_block' => 1,
10033 
                    'must_be_hdl_vector' => 1,
10034 
                    'period' => 1,
10035 
                    'port_id' => 0,
10036 
                    'simulinkName' => 'USER_LOGIC/en',
10037 
                    'type' => 'Bool',
10038 
                  },
10039 
                  'direction' => 'out',
10040 
                  'hdlType' => 'std_logic',
10041 
                  'width' => 1,
10042 
                },
10043 
                'en_x18' => {
10044 
                  'attributes' => {
10045 
                    'bin_pt' => 0,
10046 
                    'is_floating_block' => 1,
10047 
                    'must_be_hdl_vector' => 1,
10048 
                    'period' => 1,
10049 
                    'port_id' => 0,
10050 
                    'simulinkName' => 'USER_LOGIC/en',
10051 
                    'type' => 'Bool',
10052 
                  },
10053 
                  'direction' => 'out',
10054 
                  'hdlType' => 'std_logic',
10055 
                  'width' => 1,
10056 
                },
10057 
                'en_x19' => {
10058 
                  'attributes' => {
10059 
                    'bin_pt' => 0,
10060 
                    'is_floating_block' => 1,
10061 
                    'must_be_hdl_vector' => 1,
10062 
                    'period' => 1,
10063 
                    'port_id' => 0,
10064 
                    'simulinkName' => 'USER_LOGIC/en',
10065 
                    'type' => 'Bool',
10066 
                  },
10067 
                  'direction' => 'out',
10068 
                  'hdlType' => 'std_logic',
10069 
                  'width' => 1,
10070 
                },
10071 
                'en_x2' => {
10072 
                  'attributes' => {
10073 
                    'bin_pt' => 0,
10074 
                    'is_floating_block' => 1,
10075 
                    'must_be_hdl_vector' => 1,
10076 
                    'period' => 1,
10077 
                    'port_id' => 0,
10078 
                    'simulinkName' => 'USER_LOGIC/en',
10079 
                    'type' => 'Bool',
10080 
                  },
10081 
                  'direction' => 'out',
10082 
                  'hdlType' => 'std_logic',
10083 
                  'width' => 1,
10084 
                },
10085 
                'en_x20' => {
10086 
                  'attributes' => {
10087 
                    'bin_pt' => 0,
10088 
                    'is_floating_block' => 1,
10089 
                    'must_be_hdl_vector' => 1,
10090 
                    'period' => 1,
10091 
                    'port_id' => 0,
10092 
                    'simulinkName' => 'USER_LOGIC/en',
10093 
                    'type' => 'Bool',
10094 
                  },
10095 
                  'direction' => 'out',
10096 
                  'hdlType' => 'std_logic',
10097 
                  'width' => 1,
10098 
                },
10099 
                'en_x21' => {
10100 
                  'attributes' => {
10101 
                    'bin_pt' => 0,
10102 
                    'is_floating_block' => 1,
10103 
                    'must_be_hdl_vector' => 1,
10104 
                    'period' => 1,
10105 
                    'port_id' => 0,
10106 
                    'simulinkName' => 'USER_LOGIC/en',
10107 
                    'type' => 'Bool',
10108 
                  },
10109 
                  'direction' => 'out',
10110 
                  'hdlType' => 'std_logic',
10111 
                  'width' => 1,
10112 
                },
10113 
                'en_x22' => {
10114 
                  'attributes' => {
10115 
                    'bin_pt' => 0,
10116 
                    'is_floating_block' => 1,
10117 
                    'must_be_hdl_vector' => 1,
10118 
                    'period' => 1,
10119 
                    'port_id' => 0,
10120 
                    'simulinkName' => 'USER_LOGIC/en',
10121 
                    'type' => 'Bool',
10122 
                  },
10123 
                  'direction' => 'out',
10124 
                  'hdlType' => 'std_logic',
10125 
                  'width' => 1,
10126 
                },
10127 
                'en_x23' => {
10128 
                  'attributes' => {
10129 
                    'bin_pt' => 0,
10130 
                    'is_floating_block' => 1,
10131 
                    'must_be_hdl_vector' => 1,
10132 
                    'period' => 1,
10133 
                    'port_id' => 0,
10134 
                    'simulinkName' => 'USER_LOGIC/en',
10135 
                    'type' => 'Bool',
10136 
                  },
10137 
                  'direction' => 'out',
10138 
                  'hdlType' => 'std_logic',
10139 
                  'width' => 1,
10140 
                },
10141 
                'en_x24' => {
10142 
                  'attributes' => {
10143 
                    'bin_pt' => 0,
10144 
                    'is_floating_block' => 1,
10145 
                    'must_be_hdl_vector' => 1,
10146 
                    'period' => 1,
10147 
                    'port_id' => 0,
10148 
                    'simulinkName' => 'USER_LOGIC/en',
10149 
                    'type' => 'Bool',
10150 
                  },
10151 
                  'direction' => 'out',
10152 
                  'hdlType' => 'std_logic',
10153 
                  'width' => 1,
10154 
                },
10155 
                'en_x25' => {
10156 
                  'attributes' => {
10157 
                    'bin_pt' => 0,
10158 
                    'is_floating_block' => 1,
10159 
                    'must_be_hdl_vector' => 1,
10160 
                    'period' => 1,
10161 
                    'port_id' => 0,
10162 
                    'simulinkName' => 'USER_LOGIC/en',
10163 
                    'type' => 'Bool',
10164 
                  },
10165 
                  'direction' => 'out',
10166 
                  'hdlType' => 'std_logic',
10167 
                  'width' => 1,
10168 
                },
10169 
                'en_x26' => {
10170 
                  'attributes' => {
10171 
                    'bin_pt' => 0,
10172 
                    'is_floating_block' => 1,
10173 
                    'must_be_hdl_vector' => 1,
10174 
                    'period' => 1,
10175 
                    'port_id' => 0,
10176 
                    'simulinkName' => 'USER_LOGIC/en',
10177 
                    'type' => 'Bool',
10178 
                  },
10179 
                  'direction' => 'out',
10180 
                  'hdlType' => 'std_logic',
10181 
                  'width' => 1,
10182 
                },
10183 
                'en_x3' => {
10184 
                  'attributes' => {
10185 
                    'bin_pt' => 0,
10186 
                    'is_floating_block' => 1,
10187 
                    'must_be_hdl_vector' => 1,
10188 
                    'period' => 1,
10189 
                    'port_id' => 0,
10190 
                    'simulinkName' => 'USER_LOGIC/en',
10191 
                    'type' => 'Bool',
10192 
                  },
10193 
                  'direction' => 'out',
10194 
                  'hdlType' => 'std_logic',
10195 
                  'width' => 1,
10196 
                },
10197 
                'en_x4' => {
10198 
                  'attributes' => {
10199 
                    'bin_pt' => 0,
10200 
                    'is_floating_block' => 1,
10201 
                    'must_be_hdl_vector' => 1,
10202 
                    'period' => 1,
10203 
                    'port_id' => 0,
10204 
                    'simulinkName' => 'USER_LOGIC/en',
10205 
                    'type' => 'Bool',
10206 
                  },
10207 
                  'direction' => 'out',
10208 
                  'hdlType' => 'std_logic',
10209 
                  'width' => 1,
10210 
                },
10211 
                'en_x5' => {
10212 
                  'attributes' => {
10213 
                    'bin_pt' => 0,
10214 
                    'is_floating_block' => 1,
10215 
                    'must_be_hdl_vector' => 1,
10216 
                    'period' => 1,
10217 
                    'port_id' => 0,
10218 
                    'simulinkName' => 'USER_LOGIC/en',
10219 
                    'type' => 'Bool',
10220 
                  },
10221 
                  'direction' => 'out',
10222 
                  'hdlType' => 'std_logic',
10223 
                  'width' => 1,
10224 
                },
10225 
                'en_x6' => {
10226 
                  'attributes' => {
10227 
                    'bin_pt' => 0,
10228 
                    'is_floating_block' => 1,
10229 
                    'must_be_hdl_vector' => 1,
10230 
                    'period' => 1,
10231 
                    'port_id' => 0,
10232 
                    'simulinkName' => 'USER_LOGIC/en',
10233 
                    'type' => 'Bool',
10234 
                  },
10235 
                  'direction' => 'out',
10236 
                  'hdlType' => 'std_logic',
10237 
                  'width' => 1,
10238 
                },
10239 
                'en_x7' => {
10240 
                  'attributes' => {
10241 
                    'bin_pt' => 0,
10242 
                    'is_floating_block' => 1,
10243 
                    'must_be_hdl_vector' => 1,
10244 
                    'period' => 1,
10245 
                    'port_id' => 0,
10246 
                    'simulinkName' => 'USER_LOGIC/en',
10247 
                    'type' => 'Bool',
10248 
                  },
10249 
                  'direction' => 'out',
10250 
                  'hdlType' => 'std_logic',
10251 
                  'width' => 1,
10252 
                },
10253 
                'en_x8' => {
10254 
                  'attributes' => {
10255 
                    'bin_pt' => 0,
10256 
                    'is_floating_block' => 1,
10257 
                    'must_be_hdl_vector' => 1,
10258 
                    'period' => 1,
10259 
                    'port_id' => 0,
10260 
                    'simulinkName' => 'USER_LOGIC/en',
10261 
                    'type' => 'Bool',
10262 
                  },
10263 
                  'direction' => 'out',
10264 
                  'hdlType' => 'std_logic',
10265 
                  'width' => 1,
10266 
                },
10267 
                'en_x9' => {
10268 
                  'attributes' => {
10269 
                    'bin_pt' => 0,
10270 
                    'is_floating_block' => 1,
10271 
                    'must_be_hdl_vector' => 1,
10272 
                    'period' => 1,
10273 
                    'port_id' => 0,
10274 
                    'simulinkName' => 'USER_LOGIC/en',
10275 
                    'type' => 'Bool',
10276 
                  },
10277 
                  'direction' => 'out',
10278 
                  'hdlType' => 'std_logic',
10279 
                  'width' => 1,
10280 
                },
10281 
                'fifo_rd_count_x0' => {
10282 
                  'attributes' => {
10283 
                    'bin_pt' => 0,
10284 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
10285 
                    'is_floating_block' => 1,
10286 
                    'is_gateway_port' => 1,
10287 
                    'must_be_hdl_vector' => 1,
10288 
                    'period' => 1,
10289 
                    'port_id' => 1,
10290 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_count',
10291 
                    'source_block' => 'USER_LOGIC',
10292 
                    'timingConstraint' => 'none',
10293 
                    'type' => 'UFix_15_0',
10294 
                  },
10295 
                  'direction' => 'in',
10296 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
10297 
                  'width' => 15,
10298 
                },
10299 
                'fifo_rd_dout' => {
10300 
                  'attributes' => {
10301 
                    'bin_pt' => 0,
10302 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
10303 
                    'is_floating_block' => 1,
10304 
                    'is_gateway_port' => 1,
10305 
                    'must_be_hdl_vector' => 1,
10306 
                    'period' => 1,
10307 
                    'port_id' => 2,
10308 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_dout',
10309 
                    'source_block' => 'USER_LOGIC',
10310 
                    'timingConstraint' => 'none',
10311 
                    'type' => 'UFix_72_0',
10312 
                  },
10313 
                  'direction' => 'in',
10314 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10315 
                  'width' => 72,
10316 
                },
10317 
                'fifo_rd_empty' => {
10318 
                  'attributes' => {
10319 
                    'bin_pt' => 0,
10320 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
10321 
                    'is_floating_block' => 1,
10322 
                    'is_gateway_port' => 1,
10323 
                    'must_be_hdl_vector' => 1,
10324 
                    'period' => 1,
10325 
                    'port_id' => 3,
10326 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_empty',
10327 
                    'source_block' => 'USER_LOGIC',
10328 
                    'timingConstraint' => 'none',
10329 
                    'type' => 'Bool',
10330 
                  },
10331 
                  'direction' => 'in',
10332 
                  'hdlType' => 'std_logic',
10333 
                  'width' => 1,
10334 
                },
10335 
                'fifo_rd_en_x1' => {
10336 
                  'attributes' => {
10337 
                    'bin_pt' => 0,
10338 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
10339 
                    'is_floating_block' => 1,
10340 
                    'is_gateway_port' => 1,
10341 
                    'must_be_hdl_vector' => 1,
10342 
                    'period' => 1,
10343 
                    'port_id' => 4,
10344 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_en',
10345 
                    'source_block' => 'USER_LOGIC',
10346 
                    'timingConstraint' => 'none',
10347 
                    'type' => 'Bool',
10348 
                  },
10349 
                  'direction' => 'out',
10350 
                  'hdlType' => 'std_logic',
10351 
                  'width' => 1,
10352 
                },
10353 
                'fifo_rd_pempty_x0' => {
10354 
                  'attributes' => {
10355 
                    'bin_pt' => 0,
10356 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
10357 
                    'is_floating_block' => 1,
10358 
                    'is_gateway_port' => 1,
10359 
                    'must_be_hdl_vector' => 1,
10360 
                    'period' => 1,
10361 
                    'port_id' => 4,
10362 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_pempty',
10363 
                    'source_block' => 'USER_LOGIC',
10364 
                    'timingConstraint' => 'none',
10365 
                    'type' => 'Bool',
10366 
                  },
10367 
                  'direction' => 'in',
10368 
                  'hdlType' => 'std_logic',
10369 
                  'width' => 1,
10370 
                },
10371 
                'fifo_rd_valid' => {
10372 
                  'attributes' => {
10373 
                    'bin_pt' => 0,
10374 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
10375 
                    'is_floating_block' => 1,
10376 
                    'is_gateway_port' => 1,
10377 
                    'must_be_hdl_vector' => 1,
10378 
                    'period' => 1,
10379 
                    'port_id' => 5,
10380 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_valid',
10381 
                    'source_block' => 'USER_LOGIC',
10382 
                    'timingConstraint' => 'none',
10383 
                    'type' => 'Bool',
10384 
                  },
10385 
                  'direction' => 'in',
10386 
                  'hdlType' => 'std_logic',
10387 
                  'width' => 1,
10388 
                },
10389 
                'fifo_wr_count_x0' => {
10390 
                  'attributes' => {
10391 
                    'bin_pt' => 0,
10392 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
10393 
                    'is_floating_block' => 1,
10394 
                    'is_gateway_port' => 1,
10395 
                    'must_be_hdl_vector' => 1,
10396 
                    'period' => 1,
10397 
                    'port_id' => 6,
10398 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_count',
10399 
                    'source_block' => 'USER_LOGIC',
10400 
                    'timingConstraint' => 'none',
10401 
                    'type' => 'UFix_15_0',
10402 
                  },
10403 
                  'direction' => 'in',
10404 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
10405 
                  'width' => 15,
10406 
                },
10407 
                'fifo_wr_din' => {
10408 
                  'attributes' => {
10409 
                    'bin_pt' => 0,
10410 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
10411 
                    'is_floating_block' => 1,
10412 
                    'is_gateway_port' => 1,
10413 
                    'must_be_hdl_vector' => 1,
10414 
                    'period' => 1,
10415 
                    'port_id' => 22,
10416 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_din',
10417 
                    'source_block' => 'USER_LOGIC',
10418 
                    'timingConstraint' => 'none',
10419 
                    'type' => 'UFix_72_0',
10420 
                  },
10421 
                  'direction' => 'out',
10422 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10423 
                  'width' => 72,
10424 
                },
10425 
                'fifo_wr_en_x0' => {
10426 
                  'attributes' => {
10427 
                    'bin_pt' => 0,
10428 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
10429 
                    'is_floating_block' => 1,
10430 
                    'is_gateway_port' => 1,
10431 
                    'must_be_hdl_vector' => 1,
10432 
                    'period' => 1,
10433 
                    'port_id' => 5,
10434 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_en',
10435 
                    'source_block' => 'USER_LOGIC',
10436 
                    'timingConstraint' => 'none',
10437 
                    'type' => 'Bool',
10438 
                  },
10439 
                  'direction' => 'out',
10440 
                  'hdlType' => 'std_logic',
10441 
                  'width' => 1,
10442 
                },
10443 
                'fifo_wr_full_x0' => {
10444 
                  'attributes' => {
10445 
                    'bin_pt' => 0,
10446 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
10447 
                    'is_floating_block' => 1,
10448 
                    'is_gateway_port' => 1,
10449 
                    'must_be_hdl_vector' => 1,
10450 
                    'period' => 1,
10451 
                    'port_id' => 7,
10452 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_full',
10453 
                    'source_block' => 'USER_LOGIC',
10454 
                    'timingConstraint' => 'none',
10455 
                    'type' => 'Bool',
10456 
                  },
10457 
                  'direction' => 'in',
10458 
                  'hdlType' => 'std_logic',
10459 
                  'width' => 1,
10460 
                },
10461 
                'fifo_wr_pfull_x0' => {
10462 
                  'attributes' => {
10463 
                    'bin_pt' => 0,
10464 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
10465 
                    'is_floating_block' => 1,
10466 
                    'is_gateway_port' => 1,
10467 
                    'must_be_hdl_vector' => 1,
10468 
                    'period' => 1,
10469 
                    'port_id' => 8,
10470 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_pfull',
10471 
                    'source_block' => 'USER_LOGIC',
10472 
                    'timingConstraint' => 'none',
10473 
                    'type' => 'Bool',
10474 
                  },
10475 
                  'direction' => 'in',
10476 
                  'hdlType' => 'std_logic',
10477 
                  'width' => 1,
10478 
                },
10479 
                'rst_i' => {
10480 
                  'attributes' => {
10481 
                    'bin_pt' => 0,
10482 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
10483 
                    'is_floating_block' => 1,
10484 
                    'is_gateway_port' => 1,
10485 
                    'must_be_hdl_vector' => 1,
10486 
                    'period' => 1,
10487 
                    'port_id' => 37,
10488 
                    'simulinkName' => 'USER_LOGIC/rst_i',
10489 
                    'source_block' => 'USER_LOGIC',
10490 
                    'timingConstraint' => 'none',
10491 
                    'type' => 'Bool',
10492 
                  },
10493 
                  'direction' => 'in',
10494 
                  'hdlType' => 'std_logic',
10495 
                  'width' => 1,
10496 
                },
10497 
                'rst_o' => {
10498 
                  'attributes' => {
10499 
                    'bin_pt' => 0,
10500 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
10501 
                    'is_floating_block' => 1,
10502 
                    'is_gateway_port' => 1,
10503 
                    'must_be_hdl_vector' => 1,
10504 
                    'period' => 1,
10505 
                    'port_id' => 19,
10506 
                    'simulinkName' => 'USER_LOGIC/rst_o',
10507 
                    'source_block' => 'USER_LOGIC',
10508 
                    'timingConstraint' => 'none',
10509 
                    'type' => 'Bool',
10510 
                  },
10511 
                  'direction' => 'out',
10512 
                  'hdlType' => 'std_logic',
10513 
                  'width' => 1,
10514 
                },
10515 
                'user_int_1o' => {
10516 
                  'attributes' => {
10517 
                    'bin_pt' => 0,
10518 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
10519 
                    'is_floating_block' => 1,
10520 
                    'is_gateway_port' => 1,
10521 
                    'must_be_hdl_vector' => 1,
10522 
                    'period' => 1,
10523 
                    'port_id' => 20,
10524 
                    'simulinkName' => 'USER_LOGIC/user_int_1o',
10525 
                    'source_block' => 'USER_LOGIC',
10526 
                    'timingConstraint' => 'none',
10527 
                    'type' => 'Bool',
10528 
                  },
10529 
                  'direction' => 'out',
10530 
                  'hdlType' => 'std_logic',
10531 
                  'width' => 1,
10532 
                },
10533 
                'user_int_2o' => {
10534 
                  'attributes' => {
10535 
                    'bin_pt' => 0,
10536 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
10537 
                    'is_floating_block' => 1,
10538 
                    'is_gateway_port' => 1,
10539 
                    'must_be_hdl_vector' => 1,
10540 
                    'period' => 1,
10541 
                    'port_id' => 30,
10542 
                    'simulinkName' => 'USER_LOGIC/user_int_2o',
10543 
                    'source_block' => 'USER_LOGIC',
10544 
                    'timingConstraint' => 'none',
10545 
                    'type' => 'Bool',
10546 
                  },
10547 
                  'direction' => 'out',
10548 
                  'hdlType' => 'std_logic',
10549 
                  'width' => 1,
10550 
                },
10551 
                'user_int_3o' => {
10552 
                  'attributes' => {
10553 
                    'bin_pt' => 0,
10554 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
10555 
                    'is_floating_block' => 1,
10556 
                    'is_gateway_port' => 1,
10557 
                    'must_be_hdl_vector' => 1,
10558 
                    'period' => 1,
10559 
                    'port_id' => 25,
10560 
                    'simulinkName' => 'USER_LOGIC/user_int_3o',
10561 
                    'source_block' => 'USER_LOGIC',
10562 
                    'timingConstraint' => 'none',
10563 
                    'type' => 'Bool',
10564 
                  },
10565 
                  'direction' => 'out',
10566 
                  'hdlType' => 'std_logic',
10567 
                  'width' => 1,
10568 
                },
10569 
              },
10570 
            },
10571 
            'entityName' => 'user_logic',
10572 
          },
10573 
        },
10574 
      },
10575 
      'entityName' => 'user_logic_cw',
10576 
    },
10577 
    'sysgen_gw_clk' => {
10578 
      'connections' => {
10579 
        'clk' => '.clk',
10580 
      },
10581 
      'entity' => {
10582 
        'attributes' => {
10583 
          'entityAlreadyNetlisted' => 1,
10584 
          'isClk' => 1,
10585 
          'isGateway' => 1,
10586 
          'is_floating_block' => 1,
10587 
        },
10588 
        'entityName' => 'sysgen_gw_clk',
10589 
        'ports' => {
10590 
          'clk' => {
10591 
            'attributes' => {
10592 
              'isClk' => 1,
10593 
            },
10594 
            'direction' => 'out',
10595 
            'hdlType' => 'std_logic',
10596 
            'width' => 1,
10597 
          },
10598 
        },
10599 
      },
10600 
      'entityName' => 'sysgen_gw_clk',
10601 
    },
10602 
    'to_register' => {
10603 
      'connections' => {
10604 
        'ce' => 'sysgen_dut.to_register_ce',
10605 
        'clk' => 'sysgen_dut.to_register_clk',
10606 
        'clr' => 'sysgen_dut.to_register_clr',
10607 
        'data_in' => 'sysgen_dut.to_register_data_in',
10608 
        'dout' => 'to_register.dout',
10609 
        'en' => 'sysgen_dut.to_register_en',
10610 
      },
10611 
      'entity' => {
10612 
        'attributes' => {
10613 
          'entityAlreadyNetlisted' => 1,
10614 
          'generics' => [
10615 
          ],
10616 
          'is_floating_block' => 1,
10617 
          'mask' => {
10618 
            'Block_Handle' => 2432.00048828125,
10619 
            'Block_handle' => 2432.00048828125,
10620 
            'MDL_Handle' => 2083.00048828125,
10621 
            'MDL_handle' => 2083.00048828125,
10622 
            'arith_type' => 1,
10623 
            'bin_pt' => 14,
10624 
            'block_config' => 'sysgen_blockset:toreg_config',
10625 
            'block_handle' => 2432.00048828125,
10626 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10627 
            'block_type' => 'toreg',
10628 
            'dbl_ovrd' => 0,
10629 
            'explicit_data_type' => 0,
10630 
            'gui_display_data_type' => 1,
10631 
            'init' => 0,
10632 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
10633 
            'mdl_handle' => 2083.00048828125,
10634 
            'model_handle' => 2083.00048828125,
10635 
            'n_bits' => 16,
10636 
            'ownership' => 1,
10637 
            'preci_type' => 1,
10638 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10639 
            'shared_memory_name' => 'register01rd',
10640 
          },
10641 
          'needs_vhdl_wrapper' => 0,
10642 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10643 
        },
10644 
        'entityName' => 'x_x33',
10645 
        'ports' => {
10646 
          'ce' => {
10647 
            'attributes' => {
10648 
              'domain' => '',
10649 
              'group' => 1,
10650 
              'isCe' => 1,
10651 
              'is_floating_block' => 1,
10652 
              'period' => 1,
10653 
              'type' => 'logic',
10654 
            },
10655 
            'direction' => 'in',
10656 
            'hdlType' => 'std_logic',
10657 
            'width' => 1,
10658 
          },
10659 
          'clk' => {
10660 
            'attributes' => {
10661 
              'domain' => '',
10662 
              'group' => 1,
10663 
              'isClk' => 1,
10664 
              'is_floating_block' => 1,
10665 
              'period' => 1,
10666 
              'type' => 'logic',
10667 
            },
10668 
            'direction' => 'in',
10669 
            'hdlType' => 'std_logic',
10670 
            'width' => 1,
10671 
          },
10672 
          'clr' => {
10673 
            'attributes' => {
10674 
              'domain' => '',
10675 
              'group' => 1,
10676 
              'isClr' => 1,
10677 
              'is_floating_block' => 1,
10678 
              'period' => 1,
10679 
              'type' => 'logic',
10680 
              'valid_bit_used' => 0,
10681 
            },
10682 
            'direction' => 'in',
10683 
            'hdlType' => 'std_logic',
10684 
            'width' => 1,
10685 
          },
10686 
          'data_in' => {
10687 
            'attributes' => {
10688 
              'bin_pt' => 0,
10689 
              'is_floating_block' => 1,
10690 
              'must_be_hdl_vector' => 1,
10691 
              'period' => 1,
10692 
              'port_id' => 0,
10693 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
10694 
              'type' => 'UFix_32_0',
10695 
            },
10696 
            'direction' => 'in',
10697 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10698 
            'width' => 32,
10699 
          },
10700 
          'dout' => {
10701 
            'attributes' => {
10702 
              'bin_pt' => 0,
10703 
              'is_floating_block' => 1,
10704 
              'must_be_hdl_vector' => 1,
10705 
              'period' => 1,
10706 
              'port_id' => 0,
10707 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
10708 
              'type' => 'UFix_32_0',
10709 
            },
10710 
            'direction' => 'out',
10711 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10712 
            'width' => 32,
10713 
          },
10714 
          'en' => {
10715 
            'attributes' => {
10716 
              'bin_pt' => 0,
10717 
              'is_floating_block' => 1,
10718 
              'must_be_hdl_vector' => 1,
10719 
              'period' => 1,
10720 
              'port_id' => 1,
10721 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
10722 
              'type' => 'Bool',
10723 
            },
10724 
            'direction' => 'in',
10725 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10726 
            'width' => 1,
10727 
          },
10728 
        },
10729 
      },
10730 
      'entityName' => 'x_x33',
10731 
    },
10732 
    'to_register1' => {
10733 
      'connections' => {
10734 
        'ce' => 'sysgen_dut.to_register1_ce',
10735 
        'clk' => 'sysgen_dut.to_register1_clk',
10736 
        'clr' => 'sysgen_dut.to_register1_clr',
10737 
        'data_in' => 'sysgen_dut.to_register1_data_in',
10738 
        'dout' => 'to_register1.dout',
10739 
        'en' => 'sysgen_dut.to_register1_en',
10740 
      },
10741 
      'entity' => {
10742 
        'attributes' => {
10743 
          'entityAlreadyNetlisted' => 1,
10744 
          'generics' => [
10745 
          ],
10746 
          'is_floating_block' => 1,
10747 
          'mask' => {
10748 
            'Block_Handle' => 2433.00048828125,
10749 
            'Block_handle' => 2433.00048828125,
10750 
            'MDL_Handle' => 2083.00048828125,
10751 
            'MDL_handle' => 2083.00048828125,
10752 
            'arith_type' => 1,
10753 
            'bin_pt' => 14,
10754 
            'block_config' => 'sysgen_blockset:toreg_config',
10755 
            'block_handle' => 2433.00048828125,
10756 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10757 
            'block_type' => 'toreg',
10758 
            'dbl_ovrd' => 0,
10759 
            'explicit_data_type' => 0,
10760 
            'gui_display_data_type' => 1,
10761 
            'init' => 0,
10762 
            'init_bit_vector' => '\'b0',
10763 
            'mdl_handle' => 2083.00048828125,
10764 
            'model_handle' => 2083.00048828125,
10765 
            'n_bits' => 16,
10766 
            'ownership' => 1,
10767 
            'preci_type' => 1,
10768 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10769 
            'shared_memory_name' => 'register01rv',
10770 
          },
10771 
          'needs_vhdl_wrapper' => 0,
10772 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10773 
        },
10774 
        'entityName' => 'x_x34',
10775 
        'ports' => {
10776 
          'ce' => {
10777 
            'attributes' => {
10778 
              'domain' => '',
10779 
              'group' => 1,
10780 
              'isCe' => 1,
10781 
              'is_floating_block' => 1,
10782 
              'period' => 1,
10783 
              'type' => 'logic',
10784 
            },
10785 
            'direction' => 'in',
10786 
            'hdlType' => 'std_logic',
10787 
            'width' => 1,
10788 
          },
10789 
          'clk' => {
10790 
            'attributes' => {
10791 
              'domain' => '',
10792 
              'group' => 1,
10793 
              'isClk' => 1,
10794 
              'is_floating_block' => 1,
10795 
              'period' => 1,
10796 
              'type' => 'logic',
10797 
            },
10798 
            'direction' => 'in',
10799 
            'hdlType' => 'std_logic',
10800 
            'width' => 1,
10801 
          },
10802 
          'clr' => {
10803 
            'attributes' => {
10804 
              'domain' => '',
10805 
              'group' => 1,
10806 
              'isClr' => 1,
10807 
              'is_floating_block' => 1,
10808 
              'period' => 1,
10809 
              'type' => 'logic',
10810 
              'valid_bit_used' => 0,
10811 
            },
10812 
            'direction' => 'in',
10813 
            'hdlType' => 'std_logic',
10814 
            'width' => 1,
10815 
          },
10816 
          'data_in' => {
10817 
            'attributes' => {
10818 
              'bin_pt' => 0,
10819 
              'is_floating_block' => 1,
10820 
              'must_be_hdl_vector' => 1,
10821 
              'period' => 1,
10822 
              'port_id' => 0,
10823 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
10824 
              'type' => 'Bool',
10825 
            },
10826 
            'direction' => 'in',
10827 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10828 
            'width' => 1,
10829 
          },
10830 
          'dout' => {
10831 
            'attributes' => {
10832 
              'bin_pt' => 0,
10833 
              'is_floating_block' => 1,
10834 
              'must_be_hdl_vector' => 1,
10835 
              'period' => 1,
10836 
              'port_id' => 0,
10837 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
10838 
              'type' => 'Bool',
10839 
            },
10840 
            'direction' => 'out',
10841 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10842 
            'width' => 1,
10843 
          },
10844 
          'en' => {
10845 
            'attributes' => {
10846 
              'bin_pt' => 0,
10847 
              'is_floating_block' => 1,
10848 
              'must_be_hdl_vector' => 1,
10849 
              'period' => 1,
10850 
              'port_id' => 1,
10851 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
10852 
              'type' => 'Bool',
10853 
            },
10854 
            'direction' => 'in',
10855 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10856 
            'width' => 1,
10857 
          },
10858 
        },
10859 
      },
10860 
      'entityName' => 'x_x34',
10861 
    },
10862 
    'to_register10' => {
10863 
      'connections' => {
10864 
        'ce' => 'sysgen_dut.to_register10_ce',
10865 
        'clk' => 'sysgen_dut.to_register10_clk',
10866 
        'clr' => 'sysgen_dut.to_register10_clr',
10867 
        'data_in' => 'sysgen_dut.to_register10_data_in',
10868 
        'dout' => 'to_register10.dout',
10869 
        'en' => 'sysgen_dut.to_register10_en',
10870 
      },
10871 
      'entity' => {
10872 
        'attributes' => {
10873 
          'entityAlreadyNetlisted' => 1,
10874 
          'generics' => [
10875 
          ],
10876 
          'is_floating_block' => 1,
10877 
          'mask' => {
10878 
            'Block_Handle' => 2434.00048828125,
10879 
            'Block_handle' => 2434.00048828125,
10880 
            'MDL_Handle' => 2083.00048828125,
10881 
            'MDL_handle' => 2083.00048828125,
10882 
            'arith_type' => 1,
10883 
            'bin_pt' => 14,
10884 
            'block_config' => 'sysgen_blockset:toreg_config',
10885 
            'block_handle' => 2434.00048828125,
10886 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10887 
            'block_type' => 'toreg',
10888 
            'dbl_ovrd' => 0,
10889 
            'explicit_data_type' => 0,
10890 
            'gui_display_data_type' => 1,
10891 
            'init' => 0,
10892 
            'init_bit_vector' => '\'b0',
10893 
            'mdl_handle' => 2083.00048828125,
10894 
            'model_handle' => 2083.00048828125,
10895 
            'n_bits' => 16,
10896 
            'ownership' => 1,
10897 
            'preci_type' => 1,
10898 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10899 
            'shared_memory_name' => 'register05rv',
10900 
          },
10901 
          'needs_vhdl_wrapper' => 0,
10902 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10903 
        },
10904 
        'entityName' => 'x_x35',
10905 
        'ports' => {
10906 
          'ce' => {
10907 
            'attributes' => {
10908 
              'domain' => '',
10909 
              'group' => 1,
10910 
              'isCe' => 1,
10911 
              'is_floating_block' => 1,
10912 
              'period' => 1,
10913 
              'type' => 'logic',
10914 
            },
10915 
            'direction' => 'in',
10916 
            'hdlType' => 'std_logic',
10917 
            'width' => 1,
10918 
          },
10919 
          'clk' => {
10920 
            'attributes' => {
10921 
              'domain' => '',
10922 
              'group' => 1,
10923 
              'isClk' => 1,
10924 
              'is_floating_block' => 1,
10925 
              'period' => 1,
10926 
              'type' => 'logic',
10927 
            },
10928 
            'direction' => 'in',
10929 
            'hdlType' => 'std_logic',
10930 
            'width' => 1,
10931 
          },
10932 
          'clr' => {
10933 
            'attributes' => {
10934 
              'domain' => '',
10935 
              'group' => 1,
10936 
              'isClr' => 1,
10937 
              'is_floating_block' => 1,
10938 
              'period' => 1,
10939 
              'type' => 'logic',
10940 
              'valid_bit_used' => 0,
10941 
            },
10942 
            'direction' => 'in',
10943 
            'hdlType' => 'std_logic',
10944 
            'width' => 1,
10945 
          },
10946 
          'data_in' => {
10947 
            'attributes' => {
10948 
              'bin_pt' => 0,
10949 
              'is_floating_block' => 1,
10950 
              'must_be_hdl_vector' => 1,
10951 
              'period' => 1,
10952 
              'port_id' => 0,
10953 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
10954 
              'type' => 'Bool',
10955 
            },
10956 
            'direction' => 'in',
10957 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10958 
            'width' => 1,
10959 
          },
10960 
          'dout' => {
10961 
            'attributes' => {
10962 
              'bin_pt' => 0,
10963 
              'is_floating_block' => 1,
10964 
              'must_be_hdl_vector' => 1,
10965 
              'period' => 1,
10966 
              'port_id' => 0,
10967 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
10968 
              'type' => 'Bool',
10969 
            },
10970 
            'direction' => 'out',
10971 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10972 
            'width' => 1,
10973 
          },
10974 
          'en' => {
10975 
            'attributes' => {
10976 
              'bin_pt' => 0,
10977 
              'is_floating_block' => 1,
10978 
              'must_be_hdl_vector' => 1,
10979 
              'period' => 1,
10980 
              'port_id' => 1,
10981 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
10982 
              'type' => 'Bool',
10983 
            },
10984 
            'direction' => 'in',
10985 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10986 
            'width' => 1,
10987 
          },
10988 
        },
10989 
      },
10990 
      'entityName' => 'x_x35',
10991 
    },
10992 
    'to_register11' => {
10993 
      'connections' => {
10994 
        'ce' => 'sysgen_dut.to_register11_ce',
10995 
        'clk' => 'sysgen_dut.to_register11_clk',
10996 
        'clr' => 'sysgen_dut.to_register11_clr',
10997 
        'data_in' => 'sysgen_dut.to_register11_data_in',
10998 
        'dout' => 'to_register11.dout',
10999 
        'en' => 'sysgen_dut.to_register11_en',
11000 
      },
11001 
      'entity' => {
11002 
        'attributes' => {
11003 
          'entityAlreadyNetlisted' => 1,
11004 
          'generics' => [
11005 
          ],
11006 
          'is_floating_block' => 1,
11007 
          'mask' => {
11008 
            'Block_Handle' => 2435.00048828125,
11009 
            'Block_handle' => 2435.00048828125,
11010 
            'MDL_Handle' => 2083.00048828125,
11011 
            'MDL_handle' => 2083.00048828125,
11012 
            'arith_type' => 1,
11013 
            'bin_pt' => 14,
11014 
            'block_config' => 'sysgen_blockset:toreg_config',
11015 
            'block_handle' => 2435.00048828125,
11016 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
11017 
            'block_type' => 'toreg',
11018 
            'dbl_ovrd' => 0,
11019 
            'explicit_data_type' => 0,
11020 
            'gui_display_data_type' => 1,
11021 
            'init' => 0,
11022 
            'init_bit_vector' => '\'b0',
11023 
            'mdl_handle' => 2083.00048828125,
11024 
            'model_handle' => 2083.00048828125,
11025 
            'n_bits' => 16,
11026 
            'ownership' => 1,
11027 
            'preci_type' => 1,
11028 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11029 
            'shared_memory_name' => 'register06rv',
11030 
          },
11031 
          'needs_vhdl_wrapper' => 0,
11032 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
11033 
        },
11034 
        'entityName' => 'x_x36',
11035 
        'ports' => {
11036 
          'ce' => {
11037 
            'attributes' => {
11038 
              'domain' => '',
11039 
              'group' => 1,
11040 
              'isCe' => 1,
11041 
              'is_floating_block' => 1,
11042 
              'period' => 1,
11043 
              'type' => 'logic',
11044 
            },
11045 
            'direction' => 'in',
11046 
            'hdlType' => 'std_logic',
11047 
            'width' => 1,
11048 
          },
11049 
          'clk' => {
11050 
            'attributes' => {
11051 
              'domain' => '',
11052 
              'group' => 1,
11053 
              'isClk' => 1,
11054 
              'is_floating_block' => 1,
11055 
              'period' => 1,
11056 
              'type' => 'logic',
11057 
            },
11058 
            'direction' => 'in',
11059 
            'hdlType' => 'std_logic',
11060 
            'width' => 1,
11061 
          },
11062 
          'clr' => {
11063 
            'attributes' => {
11064 
              'domain' => '',
11065 
              'group' => 1,
11066 
              'isClr' => 1,
11067 
              'is_floating_block' => 1,
11068 
              'period' => 1,
11069 
              'type' => 'logic',
11070 
              'valid_bit_used' => 0,
11071 
            },
11072 
            'direction' => 'in',
11073 
            'hdlType' => 'std_logic',
11074 
            'width' => 1,
11075 
          },
11076 
          'data_in' => {
11077 
            'attributes' => {
11078 
              'bin_pt' => 0,
11079 
              'is_floating_block' => 1,
11080 
              'must_be_hdl_vector' => 1,
11081 
              'period' => 1,
11082 
              'port_id' => 0,
11083 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
11084 
              'type' => 'Bool',
11085 
            },
11086 
            'direction' => 'in',
11087 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11088 
            'width' => 1,
11089 
          },
11090 
          'dout' => {
11091 
            'attributes' => {
11092 
              'bin_pt' => 0,
11093 
              'is_floating_block' => 1,
11094 
              'must_be_hdl_vector' => 1,
11095 
              'period' => 1,
11096 
              'port_id' => 0,
11097 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
11098 
              'type' => 'Bool',
11099 
            },
11100 
            'direction' => 'out',
11101 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11102 
            'width' => 1,
11103 
          },
11104 
          'en' => {
11105 
            'attributes' => {
11106 
              'bin_pt' => 0,
11107 
              'is_floating_block' => 1,
11108 
              'must_be_hdl_vector' => 1,
11109 
              'period' => 1,
11110 
              'port_id' => 1,
11111 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
11112 
              'type' => 'Bool',
11113 
            },
11114 
            'direction' => 'in',
11115 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11116 
            'width' => 1,
11117 
          },
11118 
        },
11119 
      },
11120 
      'entityName' => 'x_x36',
11121 
    },
11122 
    'to_register12' => {
11123 
      'connections' => {
11124 
        'ce' => 'sysgen_dut.to_register12_ce',
11125 
        'clk' => 'sysgen_dut.to_register12_clk',
11126 
        'clr' => 'sysgen_dut.to_register12_clr',
11127 
        'data_in' => 'sysgen_dut.to_register12_data_in',
11128 
        'dout' => 'to_register12.dout',
11129 
        'en' => 'sysgen_dut.to_register12_en',
11130 
      },
11131 
      'entity' => {
11132 
        'attributes' => {
11133 
          'entityAlreadyNetlisted' => 1,
11134 
          'generics' => [
11135 
          ],
11136 
          'is_floating_block' => 1,
11137 
          'mask' => {
11138 
            'Block_Handle' => 2436.00048828125,
11139 
            'Block_handle' => 2436.00048828125,
11140 
            'MDL_Handle' => 2083.00048828125,
11141 
            'MDL_handle' => 2083.00048828125,
11142 
            'arith_type' => 1,
11143 
            'bin_pt' => 14,
11144 
            'block_config' => 'sysgen_blockset:toreg_config',
11145 
            'block_handle' => 2436.00048828125,
11146 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
11147 
            'block_type' => 'toreg',
11148 
            'dbl_ovrd' => 0,
11149 
            'explicit_data_type' => 0,
11150 
            'gui_display_data_type' => 1,
11151 
            'init' => 0,
11152 
            'init_bit_vector' => '\'b0',
11153 
            'mdl_handle' => 2083.00048828125,
11154 
            'model_handle' => 2083.00048828125,
11155 
            'n_bits' => 16,
11156 
            'ownership' => 1,
11157 
            'preci_type' => 1,
11158 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11159 
            'shared_memory_name' => 'register07rv',
11160 
          },
11161 
          'needs_vhdl_wrapper' => 0,
11162 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
11163 
        },
11164 
        'entityName' => 'x_x37',
11165 
        'ports' => {
11166 
          'ce' => {
11167 
            'attributes' => {
11168 
              'domain' => '',
11169 
              'group' => 1,
11170 
              'isCe' => 1,
11171 
              'is_floating_block' => 1,
11172 
              'period' => 1,
11173 
              'type' => 'logic',
11174 
            },
11175 
            'direction' => 'in',
11176 
            'hdlType' => 'std_logic',
11177 
            'width' => 1,
11178 
          },
11179 
          'clk' => {
11180 
            'attributes' => {
11181 
              'domain' => '',
11182 
              'group' => 1,
11183 
              'isClk' => 1,
11184 
              'is_floating_block' => 1,
11185 
              'period' => 1,
11186 
              'type' => 'logic',
11187 
            },
11188 
            'direction' => 'in',
11189 
            'hdlType' => 'std_logic',
11190 
            'width' => 1,
11191 
          },
11192 
          'clr' => {
11193 
            'attributes' => {
11194 
              'domain' => '',
11195 
              'group' => 1,
11196 
              'isClr' => 1,
11197 
              'is_floating_block' => 1,
11198 
              'period' => 1,
11199 
              'type' => 'logic',
11200 
              'valid_bit_used' => 0,
11201 
            },
11202 
            'direction' => 'in',
11203 
            'hdlType' => 'std_logic',
11204 
            'width' => 1,
11205 
          },
11206 
          'data_in' => {
11207 
            'attributes' => {
11208 
              'bin_pt' => 0,
11209 
              'is_floating_block' => 1,
11210 
              'must_be_hdl_vector' => 1,
11211 
              'period' => 1,
11212 
              'port_id' => 0,
11213 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
11214 
              'type' => 'Bool',
11215 
            },
11216 
            'direction' => 'in',
11217 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11218 
            'width' => 1,
11219 
          },
11220 
          'dout' => {
11221 
            'attributes' => {
11222 
              'bin_pt' => 0,
11223 
              'is_floating_block' => 1,
11224 
              'must_be_hdl_vector' => 1,
11225 
              'period' => 1,
11226 
              'port_id' => 0,
11227 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
11228 
              'type' => 'Bool',
11229 
            },
11230 
            'direction' => 'out',
11231 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11232 
            'width' => 1,
11233 
          },
11234 
          'en' => {
11235 
            'attributes' => {
11236 
              'bin_pt' => 0,
11237 
              'is_floating_block' => 1,
11238 
              'must_be_hdl_vector' => 1,
11239 
              'period' => 1,
11240 
              'port_id' => 1,
11241 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
11242 
              'type' => 'Bool',
11243 
            },
11244 
            'direction' => 'in',
11245 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11246 
            'width' => 1,
11247 
          },
11248 
        },
11249 
      },
11250 
      'entityName' => 'x_x37',
11251 
    },
11252 
    'to_register13' => {
11253 
      'connections' => {
11254 
        'ce' => 'sysgen_dut.to_register13_ce',
11255 
        'clk' => 'sysgen_dut.to_register13_clk',
11256 
        'clr' => 'sysgen_dut.to_register13_clr',
11257 
        'data_in' => 'sysgen_dut.to_register13_data_in',
11258 
        'dout' => 'to_register13.dout',
11259 
        'en' => 'sysgen_dut.to_register13_en',
11260 
      },
11261 
      'entity' => {
11262 
        'attributes' => {
11263 
          'entityAlreadyNetlisted' => 1,
11264 
          'generics' => [
11265 
          ],
11266 
          'is_floating_block' => 1,
11267 
          'mask' => {
11268 
            'Block_Handle' => 2437.00048828125,
11269 
            'Block_handle' => 2437.00048828125,
11270 
            'MDL_Handle' => 2083.00048828125,
11271 
            'MDL_handle' => 2083.00048828125,
11272 
            'arith_type' => 1,
11273 
            'bin_pt' => 14,
11274 
            'block_config' => 'sysgen_blockset:toreg_config',
11275 
            'block_handle' => 2437.00048828125,
11276 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
11277 
            'block_type' => 'toreg',
11278 
            'dbl_ovrd' => 0,
11279 
            'explicit_data_type' => 0,
11280 
            'gui_display_data_type' => 1,
11281 
            'init' => 0,
11282 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11283 
            'mdl_handle' => 2083.00048828125,
11284 
            'model_handle' => 2083.00048828125,
11285 
            'n_bits' => 16,
11286 
            'ownership' => 1,
11287 
            'preci_type' => 1,
11288 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11289 
            'shared_memory_name' => 'register07rd',
11290 
          },
11291 
          'needs_vhdl_wrapper' => 0,
11292 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
11293 
        },
11294 
        'entityName' => 'x_x38',
11295 
        'ports' => {
11296 
          'ce' => {
11297 
            'attributes' => {
11298 
              'domain' => '',
11299 
              'group' => 1,
11300 
              'isCe' => 1,
11301 
              'is_floating_block' => 1,
11302 
              'period' => 1,
11303 
              'type' => 'logic',
11304 
            },
11305 
            'direction' => 'in',
11306 
            'hdlType' => 'std_logic',
11307 
            'width' => 1,
11308 
          },
11309 
          'clk' => {
11310 
            'attributes' => {
11311 
              'domain' => '',
11312 
              'group' => 1,
11313 
              'isClk' => 1,
11314 
              'is_floating_block' => 1,
11315 
              'period' => 1,
11316 
              'type' => 'logic',
11317 
            },
11318 
            'direction' => 'in',
11319 
            'hdlType' => 'std_logic',
11320 
            'width' => 1,
11321 
          },
11322 
          'clr' => {
11323 
            'attributes' => {
11324 
              'domain' => '',
11325 
              'group' => 1,
11326 
              'isClr' => 1,
11327 
              'is_floating_block' => 1,
11328 
              'period' => 1,
11329 
              'type' => 'logic',
11330 
              'valid_bit_used' => 0,
11331 
            },
11332 
            'direction' => 'in',
11333 
            'hdlType' => 'std_logic',
11334 
            'width' => 1,
11335 
          },
11336 
          'data_in' => {
11337 
            'attributes' => {
11338 
              'bin_pt' => 0,
11339 
              'is_floating_block' => 1,
11340 
              'must_be_hdl_vector' => 1,
11341 
              'period' => 1,
11342 
              'port_id' => 0,
11343 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
11344 
              'type' => 'UFix_32_0',
11345 
            },
11346 
            'direction' => 'in',
11347 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11348 
            'width' => 32,
11349 
          },
11350 
          'dout' => {
11351 
            'attributes' => {
11352 
              'bin_pt' => 0,
11353 
              'is_floating_block' => 1,
11354 
              'must_be_hdl_vector' => 1,
11355 
              'period' => 1,
11356 
              'port_id' => 0,
11357 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
11358 
              'type' => 'UFix_32_0',
11359 
            },
11360 
            'direction' => 'out',
11361 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11362 
            'width' => 32,
11363 
          },
11364 
          'en' => {
11365 
            'attributes' => {
11366 
              'bin_pt' => 0,
11367 
              'is_floating_block' => 1,
11368 
              'must_be_hdl_vector' => 1,
11369 
              'period' => 1,
11370 
              'port_id' => 1,
11371 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
11372 
              'type' => 'Bool',
11373 
            },
11374 
            'direction' => 'in',
11375 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11376 
            'width' => 1,
11377 
          },
11378 
        },
11379 
      },
11380 
      'entityName' => 'x_x38',
11381 
    },
11382 
    'to_register14' => {
11383 
      'connections' => {
11384 
        'ce' => 'sysgen_dut.to_register14_ce',
11385 
        'clk' => 'sysgen_dut.to_register14_clk',
11386 
        'clr' => 'sysgen_dut.to_register14_clr',
11387 
        'data_in' => 'sysgen_dut.to_register14_data_in',
11388 
        'dout' => 'to_register14.dout',
11389 
        'en' => 'sysgen_dut.to_register14_en',
11390 
      },
11391 
      'entity' => {
11392 
        'attributes' => {
11393 
          'entityAlreadyNetlisted' => 1,
11394 
          'generics' => [
11395 
          ],
11396 
          'is_floating_block' => 1,
11397 
          'mask' => {
11398 
            'Block_Handle' => 2438.00048828125,
11399 
            'Block_handle' => 2438.00048828125,
11400 
            'MDL_Handle' => 2083.00048828125,
11401 
            'MDL_handle' => 2083.00048828125,
11402 
            'arith_type' => 1,
11403 
            'bin_pt' => 14,
11404 
            'block_config' => 'sysgen_blockset:toreg_config',
11405 
            'block_handle' => 2438.00048828125,
11406 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11407 
            'block_type' => 'toreg',
11408 
            'dbl_ovrd' => 0,
11409 
            'explicit_data_type' => 0,
11410 
            'gui_display_data_type' => 1,
11411 
            'init' => 0,
11412 
            'init_bit_vector' => '\'b0',
11413 
            'mdl_handle' => 2083.00048828125,
11414 
            'model_handle' => 2083.00048828125,
11415 
            'n_bits' => 16,
11416 
            'ownership' => 1,
11417 
            'preci_type' => 1,
11418 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11419 
            'shared_memory_name' => 'register08rv',
11420 
          },
11421 
          'needs_vhdl_wrapper' => 0,
11422 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11423 
        },
11424 
        'entityName' => 'x_x39',
11425 
        'ports' => {
11426 
          'ce' => {
11427 
            'attributes' => {
11428 
              'domain' => '',
11429 
              'group' => 1,
11430 
              'isCe' => 1,
11431 
              'is_floating_block' => 1,
11432 
              'period' => 1,
11433 
              'type' => 'logic',
11434 
            },
11435 
            'direction' => 'in',
11436 
            'hdlType' => 'std_logic',
11437 
            'width' => 1,
11438 
          },
11439 
          'clk' => {
11440 
            'attributes' => {
11441 
              'domain' => '',
11442 
              'group' => 1,
11443 
              'isClk' => 1,
11444 
              'is_floating_block' => 1,
11445 
              'period' => 1,
11446 
              'type' => 'logic',
11447 
            },
11448 
            'direction' => 'in',
11449 
            'hdlType' => 'std_logic',
11450 
            'width' => 1,
11451 
          },
11452 
          'clr' => {
11453 
            'attributes' => {
11454 
              'domain' => '',
11455 
              'group' => 1,
11456 
              'isClr' => 1,
11457 
              'is_floating_block' => 1,
11458 
              'period' => 1,
11459 
              'type' => 'logic',
11460 
              'valid_bit_used' => 0,
11461 
            },
11462 
            'direction' => 'in',
11463 
            'hdlType' => 'std_logic',
11464 
            'width' => 1,
11465 
          },
11466 
          'data_in' => {
11467 
            'attributes' => {
11468 
              'bin_pt' => 0,
11469 
              'is_floating_block' => 1,
11470 
              'must_be_hdl_vector' => 1,
11471 
              'period' => 1,
11472 
              'port_id' => 0,
11473 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
11474 
              'type' => 'Bool',
11475 
            },
11476 
            'direction' => 'in',
11477 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11478 
            'width' => 1,
11479 
          },
11480 
          'dout' => {
11481 
            'attributes' => {
11482 
              'bin_pt' => 0,
11483 
              'is_floating_block' => 1,
11484 
              'must_be_hdl_vector' => 1,
11485 
              'period' => 1,
11486 
              'port_id' => 0,
11487 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
11488 
              'type' => 'Bool',
11489 
            },
11490 
            'direction' => 'out',
11491 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11492 
            'width' => 1,
11493 
          },
11494 
          'en' => {
11495 
            'attributes' => {
11496 
              'bin_pt' => 0,
11497 
              'is_floating_block' => 1,
11498 
              'must_be_hdl_vector' => 1,
11499 
              'period' => 1,
11500 
              'port_id' => 1,
11501 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
11502 
              'type' => 'Bool',
11503 
            },
11504 
            'direction' => 'in',
11505 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11506 
            'width' => 1,
11507 
          },
11508 
        },
11509 
      },
11510 
      'entityName' => 'x_x39',
11511 
    },
11512 
    'to_register15' => {
11513 
      'connections' => {
11514 
        'ce' => 'sysgen_dut.to_register15_ce',
11515 
        'clk' => 'sysgen_dut.to_register15_clk',
11516 
        'clr' => 'sysgen_dut.to_register15_clr',
11517 
        'data_in' => 'sysgen_dut.to_register15_data_in',
11518 
        'dout' => 'to_register15.dout',
11519 
        'en' => 'sysgen_dut.to_register15_en',
11520 
      },
11521 
      'entity' => {
11522 
        'attributes' => {
11523 
          'entityAlreadyNetlisted' => 1,
11524 
          'generics' => [
11525 
          ],
11526 
          'is_floating_block' => 1,
11527 
          'mask' => {
11528 
            'Block_Handle' => 2439.00048828125,
11529 
            'Block_handle' => 2439.00048828125,
11530 
            'MDL_Handle' => 2083.00048828125,
11531 
            'MDL_handle' => 2083.00048828125,
11532 
            'arith_type' => 1,
11533 
            'bin_pt' => 14,
11534 
            'block_config' => 'sysgen_blockset:toreg_config',
11535 
            'block_handle' => 2439.00048828125,
11536 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11537 
            'block_type' => 'toreg',
11538 
            'dbl_ovrd' => 0,
11539 
            'explicit_data_type' => 0,
11540 
            'gui_display_data_type' => 1,
11541 
            'init' => 0,
11542 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11543 
            'mdl_handle' => 2083.00048828125,
11544 
            'model_handle' => 2083.00048828125,
11545 
            'n_bits' => 16,
11546 
            'ownership' => 1,
11547 
            'preci_type' => 1,
11548 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11549 
            'shared_memory_name' => 'register08rd',
11550 
          },
11551 
          'needs_vhdl_wrapper' => 0,
11552 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11553 
        },
11554 
        'entityName' => 'x_x40',
11555 
        'ports' => {
11556 
          'ce' => {
11557 
            'attributes' => {
11558 
              'domain' => '',
11559 
              'group' => 1,
11560 
              'isCe' => 1,
11561 
              'is_floating_block' => 1,
11562 
              'period' => 1,
11563 
              'type' => 'logic',
11564 
            },
11565 
            'direction' => 'in',
11566 
            'hdlType' => 'std_logic',
11567 
            'width' => 1,
11568 
          },
11569 
          'clk' => {
11570 
            'attributes' => {
11571 
              'domain' => '',
11572 
              'group' => 1,
11573 
              'isClk' => 1,
11574 
              'is_floating_block' => 1,
11575 
              'period' => 1,
11576 
              'type' => 'logic',
11577 
            },
11578 
            'direction' => 'in',
11579 
            'hdlType' => 'std_logic',
11580 
            'width' => 1,
11581 
          },
11582 
          'clr' => {
11583 
            'attributes' => {
11584 
              'domain' => '',
11585 
              'group' => 1,
11586 
              'isClr' => 1,
11587 
              'is_floating_block' => 1,
11588 
              'period' => 1,
11589 
              'type' => 'logic',
11590 
              'valid_bit_used' => 0,
11591 
            },
11592 
            'direction' => 'in',
11593 
            'hdlType' => 'std_logic',
11594 
            'width' => 1,
11595 
          },
11596 
          'data_in' => {
11597 
            'attributes' => {
11598 
              'bin_pt' => 0,
11599 
              'is_floating_block' => 1,
11600 
              'must_be_hdl_vector' => 1,
11601 
              'period' => 1,
11602 
              'port_id' => 0,
11603 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
11604 
              'type' => 'UFix_32_0',
11605 
            },
11606 
            'direction' => 'in',
11607 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11608 
            'width' => 32,
11609 
          },
11610 
          'dout' => {
11611 
            'attributes' => {
11612 
              'bin_pt' => 0,
11613 
              'is_floating_block' => 1,
11614 
              'must_be_hdl_vector' => 1,
11615 
              'period' => 1,
11616 
              'port_id' => 0,
11617 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
11618 
              'type' => 'UFix_32_0',
11619 
            },
11620 
            'direction' => 'out',
11621 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11622 
            'width' => 32,
11623 
          },
11624 
          'en' => {
11625 
            'attributes' => {
11626 
              'bin_pt' => 0,
11627 
              'is_floating_block' => 1,
11628 
              'must_be_hdl_vector' => 1,
11629 
              'period' => 1,
11630 
              'port_id' => 1,
11631 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
11632 
              'type' => 'Bool',
11633 
            },
11634 
            'direction' => 'in',
11635 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11636 
            'width' => 1,
11637 
          },
11638 
        },
11639 
      },
11640 
      'entityName' => 'x_x40',
11641 
    },
11642 
    'to_register16' => {
11643 
      'connections' => {
11644 
        'ce' => 'sysgen_dut.to_register16_ce',
11645 
        'clk' => 'sysgen_dut.to_register16_clk',
11646 
        'clr' => 'sysgen_dut.to_register16_clr',
11647 
        'data_in' => 'sysgen_dut.to_register16_data_in',
11648 
        'dout' => 'to_register16.dout',
11649 
        'en' => 'sysgen_dut.to_register16_en',
11650 
      },
11651 
      'entity' => {
11652 
        'attributes' => {
11653 
          'entityAlreadyNetlisted' => 1,
11654 
          'generics' => [
11655 
          ],
11656 
          'is_floating_block' => 1,
11657 
          'mask' => {
11658 
            'Block_Handle' => 2440.00048828125,
11659 
            'Block_handle' => 2440.00048828125,
11660 
            'MDL_Handle' => 2083.00048828125,
11661 
            'MDL_handle' => 2083.00048828125,
11662 
            'arith_type' => 1,
11663 
            'bin_pt' => 14,
11664 
            'block_config' => 'sysgen_blockset:toreg_config',
11665 
            'block_handle' => 2440.00048828125,
11666 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11667 
            'block_type' => 'toreg',
11668 
            'dbl_ovrd' => 0,
11669 
            'explicit_data_type' => 0,
11670 
            'gui_display_data_type' => 1,
11671 
            'init' => 0,
11672 
            'init_bit_vector' => '\'b0',
11673 
            'mdl_handle' => 2083.00048828125,
11674 
            'model_handle' => 2083.00048828125,
11675 
            'n_bits' => 16,
11676 
            'ownership' => 1,
11677 
            'preci_type' => 1,
11678 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11679 
            'shared_memory_name' => 'register09rv',
11680 
          },
11681 
          'needs_vhdl_wrapper' => 0,
11682 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11683 
        },
11684 
        'entityName' => 'x_x41',
11685 
        'ports' => {
11686 
          'ce' => {
11687 
            'attributes' => {
11688 
              'domain' => '',
11689 
              'group' => 1,
11690 
              'isCe' => 1,
11691 
              'is_floating_block' => 1,
11692 
              'period' => 1,
11693 
              'type' => 'logic',
11694 
            },
11695 
            'direction' => 'in',
11696 
            'hdlType' => 'std_logic',
11697 
            'width' => 1,
11698 
          },
11699 
          'clk' => {
11700 
            'attributes' => {
11701 
              'domain' => '',
11702 
              'group' => 1,
11703 
              'isClk' => 1,
11704 
              'is_floating_block' => 1,
11705 
              'period' => 1,
11706 
              'type' => 'logic',
11707 
            },
11708 
            'direction' => 'in',
11709 
            'hdlType' => 'std_logic',
11710 
            'width' => 1,
11711 
          },
11712 
          'clr' => {
11713 
            'attributes' => {
11714 
              'domain' => '',
11715 
              'group' => 1,
11716 
              'isClr' => 1,
11717 
              'is_floating_block' => 1,
11718 
              'period' => 1,
11719 
              'type' => 'logic',
11720 
              'valid_bit_used' => 0,
11721 
            },
11722 
            'direction' => 'in',
11723 
            'hdlType' => 'std_logic',
11724 
            'width' => 1,
11725 
          },
11726 
          'data_in' => {
11727 
            'attributes' => {
11728 
              'bin_pt' => 0,
11729 
              'is_floating_block' => 1,
11730 
              'must_be_hdl_vector' => 1,
11731 
              'period' => 1,
11732 
              'port_id' => 0,
11733 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
11734 
              'type' => 'Bool',
11735 
            },
11736 
            'direction' => 'in',
11737 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11738 
            'width' => 1,
11739 
          },
11740 
          'dout' => {
11741 
            'attributes' => {
11742 
              'bin_pt' => 0,
11743 
              'is_floating_block' => 1,
11744 
              'must_be_hdl_vector' => 1,
11745 
              'period' => 1,
11746 
              'port_id' => 0,
11747 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
11748 
              'type' => 'Bool',
11749 
            },
11750 
            'direction' => 'out',
11751 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11752 
            'width' => 1,
11753 
          },
11754 
          'en' => {
11755 
            'attributes' => {
11756 
              'bin_pt' => 0,
11757 
              'is_floating_block' => 1,
11758 
              'must_be_hdl_vector' => 1,
11759 
              'period' => 1,
11760 
              'port_id' => 1,
11761 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
11762 
              'type' => 'Bool',
11763 
            },
11764 
            'direction' => 'in',
11765 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11766 
            'width' => 1,
11767 
          },
11768 
        },
11769 
      },
11770 
      'entityName' => 'x_x41',
11771 
    },
11772 
    'to_register17' => {
11773 
      'connections' => {
11774 
        'ce' => 'sysgen_dut.to_register17_ce',
11775 
        'clk' => 'sysgen_dut.to_register17_clk',
11776 
        'clr' => 'sysgen_dut.to_register17_clr',
11777 
        'data_in' => 'sysgen_dut.to_register17_data_in',
11778 
        'dout' => 'to_register17.dout',
11779 
        'en' => 'sysgen_dut.to_register17_en',
11780 
      },
11781 
      'entity' => {
11782 
        'attributes' => {
11783 
          'entityAlreadyNetlisted' => 1,
11784 
          'generics' => [
11785 
          ],
11786 
          'is_floating_block' => 1,
11787 
          'mask' => {
11788 
            'Block_Handle' => 2441.00048828125,
11789 
            'Block_handle' => 2441.00048828125,
11790 
            'MDL_Handle' => 2083.00048828125,
11791 
            'MDL_handle' => 2083.00048828125,
11792 
            'arith_type' => 1,
11793 
            'bin_pt' => 14,
11794 
            'block_config' => 'sysgen_blockset:toreg_config',
11795 
            'block_handle' => 2441.00048828125,
11796 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11797 
            'block_type' => 'toreg',
11798 
            'dbl_ovrd' => 0,
11799 
            'explicit_data_type' => 0,
11800 
            'gui_display_data_type' => 1,
11801 
            'init' => 0,
11802 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11803 
            'mdl_handle' => 2083.00048828125,
11804 
            'model_handle' => 2083.00048828125,
11805 
            'n_bits' => 16,
11806 
            'ownership' => 1,
11807 
            'preci_type' => 1,
11808 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11809 
            'shared_memory_name' => 'register09rd',
11810 
          },
11811 
          'needs_vhdl_wrapper' => 0,
11812 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11813 
        },
11814 
        'entityName' => 'x_x42',
11815 
        'ports' => {
11816 
          'ce' => {
11817 
            'attributes' => {
11818 
              'domain' => '',
11819 
              'group' => 1,
11820 
              'isCe' => 1,
11821 
              'is_floating_block' => 1,
11822 
              'period' => 1,
11823 
              'type' => 'logic',
11824 
            },
11825 
            'direction' => 'in',
11826 
            'hdlType' => 'std_logic',
11827 
            'width' => 1,
11828 
          },
11829 
          'clk' => {
11830 
            'attributes' => {
11831 
              'domain' => '',
11832 
              'group' => 1,
11833 
              'isClk' => 1,
11834 
              'is_floating_block' => 1,
11835 
              'period' => 1,
11836 
              'type' => 'logic',
11837 
            },
11838 
            'direction' => 'in',
11839 
            'hdlType' => 'std_logic',
11840 
            'width' => 1,
11841 
          },
11842 
          'clr' => {
11843 
            'attributes' => {
11844 
              'domain' => '',
11845 
              'group' => 1,
11846 
              'isClr' => 1,
11847 
              'is_floating_block' => 1,
11848 
              'period' => 1,
11849 
              'type' => 'logic',
11850 
              'valid_bit_used' => 0,
11851 
            },
11852 
            'direction' => 'in',
11853 
            'hdlType' => 'std_logic',
11854 
            'width' => 1,
11855 
          },
11856 
          'data_in' => {
11857 
            'attributes' => {
11858 
              'bin_pt' => 0,
11859 
              'is_floating_block' => 1,
11860 
              'must_be_hdl_vector' => 1,
11861 
              'period' => 1,
11862 
              'port_id' => 0,
11863 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
11864 
              'type' => 'UFix_32_0',
11865 
            },
11866 
            'direction' => 'in',
11867 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11868 
            'width' => 32,
11869 
          },
11870 
          'dout' => {
11871 
            'attributes' => {
11872 
              'bin_pt' => 0,
11873 
              'is_floating_block' => 1,
11874 
              'must_be_hdl_vector' => 1,
11875 
              'period' => 1,
11876 
              'port_id' => 0,
11877 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
11878 
              'type' => 'UFix_32_0',
11879 
            },
11880 
            'direction' => 'out',
11881 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11882 
            'width' => 32,
11883 
          },
11884 
          'en' => {
11885 
            'attributes' => {
11886 
              'bin_pt' => 0,
11887 
              'is_floating_block' => 1,
11888 
              'must_be_hdl_vector' => 1,
11889 
              'period' => 1,
11890 
              'port_id' => 1,
11891 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
11892 
              'type' => 'Bool',
11893 
            },
11894 
            'direction' => 'in',
11895 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11896 
            'width' => 1,
11897 
          },
11898 
        },
11899 
      },
11900 
      'entityName' => 'x_x42',
11901 
    },
11902 
    'to_register18' => {
11903 
      'connections' => {
11904 
        'ce' => 'sysgen_dut.to_register18_ce',
11905 
        'clk' => 'sysgen_dut.to_register18_clk',
11906 
        'clr' => 'sysgen_dut.to_register18_clr',
11907 
        'data_in' => 'sysgen_dut.to_register18_data_in',
11908 
        'dout' => 'to_register18.dout',
11909 
        'en' => 'sysgen_dut.to_register18_en',
11910 
      },
11911 
      'entity' => {
11912 
        'attributes' => {
11913 
          'entityAlreadyNetlisted' => 1,
11914 
          'generics' => [
11915 
          ],
11916 
          'is_floating_block' => 1,
11917 
          'mask' => {
11918 
            'Block_Handle' => 2442.00048828125,
11919 
            'Block_handle' => 2442.00048828125,
11920 
            'MDL_Handle' => 2083.00048828125,
11921 
            'MDL_handle' => 2083.00048828125,
11922 
            'arith_type' => 1,
11923 
            'bin_pt' => 14,
11924 
            'block_config' => 'sysgen_blockset:toreg_config',
11925 
            'block_handle' => 2442.00048828125,
11926 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11927 
            'block_type' => 'toreg',
11928 
            'dbl_ovrd' => 0,
11929 
            'explicit_data_type' => 0,
11930 
            'gui_display_data_type' => 1,
11931 
            'init' => 0,
11932 
            'init_bit_vector' => '\'b0',
11933 
            'mdl_handle' => 2083.00048828125,
11934 
            'model_handle' => 2083.00048828125,
11935 
            'n_bits' => 16,
11936 
            'ownership' => 1,
11937 
            'preci_type' => 1,
11938 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11939 
            'shared_memory_name' => 'register10rv',
11940 
          },
11941 
          'needs_vhdl_wrapper' => 0,
11942 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11943 
        },
11944 
        'entityName' => 'x_x43',
11945 
        'ports' => {
11946 
          'ce' => {
11947 
            'attributes' => {
11948 
              'domain' => '',
11949 
              'group' => 1,
11950 
              'isCe' => 1,
11951 
              'is_floating_block' => 1,
11952 
              'period' => 1,
11953 
              'type' => 'logic',
11954 
            },
11955 
            'direction' => 'in',
11956 
            'hdlType' => 'std_logic',
11957 
            'width' => 1,
11958 
          },
11959 
          'clk' => {
11960 
            'attributes' => {
11961 
              'domain' => '',
11962 
              'group' => 1,
11963 
              'isClk' => 1,
11964 
              'is_floating_block' => 1,
11965 
              'period' => 1,
11966 
              'type' => 'logic',
11967 
            },
11968 
            'direction' => 'in',
11969 
            'hdlType' => 'std_logic',
11970 
            'width' => 1,
11971 
          },
11972 
          'clr' => {
11973 
            'attributes' => {
11974 
              'domain' => '',
11975 
              'group' => 1,
11976 
              'isClr' => 1,
11977 
              'is_floating_block' => 1,
11978 
              'period' => 1,
11979 
              'type' => 'logic',
11980 
              'valid_bit_used' => 0,
11981 
            },
11982 
            'direction' => 'in',
11983 
            'hdlType' => 'std_logic',
11984 
            'width' => 1,
11985 
          },
11986 
          'data_in' => {
11987 
            'attributes' => {
11988 
              'bin_pt' => 0,
11989 
              'is_floating_block' => 1,
11990 
              'must_be_hdl_vector' => 1,
11991 
              'period' => 1,
11992 
              'port_id' => 0,
11993 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
11994 
              'type' => 'Bool',
11995 
            },
11996 
            'direction' => 'in',
11997 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11998 
            'width' => 1,
11999 
          },
12000 
          'dout' => {
12001 
            'attributes' => {
12002 
              'bin_pt' => 0,
12003 
              'is_floating_block' => 1,
12004 
              'must_be_hdl_vector' => 1,
12005 
              'period' => 1,
12006 
              'port_id' => 0,
12007 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
12008 
              'type' => 'Bool',
12009 
            },
12010 
            'direction' => 'out',
12011 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12012 
            'width' => 1,
12013 
          },
12014 
          'en' => {
12015 
            'attributes' => {
12016 
              'bin_pt' => 0,
12017 
              'is_floating_block' => 1,
12018 
              'must_be_hdl_vector' => 1,
12019 
              'period' => 1,
12020 
              'port_id' => 1,
12021 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
12022 
              'type' => 'Bool',
12023 
            },
12024 
            'direction' => 'in',
12025 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12026 
            'width' => 1,
12027 
          },
12028 
        },
12029 
      },
12030 
      'entityName' => 'x_x43',
12031 
    },
12032 
    'to_register19' => {
12033 
      'connections' => {
12034 
        'ce' => 'sysgen_dut.to_register19_ce',
12035 
        'clk' => 'sysgen_dut.to_register19_clk',
12036 
        'clr' => 'sysgen_dut.to_register19_clr',
12037 
        'data_in' => 'sysgen_dut.to_register19_data_in',
12038 
        'dout' => 'to_register19.dout',
12039 
        'en' => 'sysgen_dut.to_register19_en',
12040 
      },
12041 
      'entity' => {
12042 
        'attributes' => {
12043 
          'entityAlreadyNetlisted' => 1,
12044 
          'generics' => [
12045 
          ],
12046 
          'is_floating_block' => 1,
12047 
          'mask' => {
12048 
            'Block_Handle' => 2443.00048828125,
12049 
            'Block_handle' => 2443.00048828125,
12050 
            'MDL_Handle' => 2083.00048828125,
12051 
            'MDL_handle' => 2083.00048828125,
12052 
            'arith_type' => 1,
12053 
            'bin_pt' => 14,
12054 
            'block_config' => 'sysgen_blockset:toreg_config',
12055 
            'block_handle' => 2443.00048828125,
12056 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
12057 
            'block_type' => 'toreg',
12058 
            'dbl_ovrd' => 0,
12059 
            'explicit_data_type' => 0,
12060 
            'gui_display_data_type' => 1,
12061 
            'init' => 0,
12062 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12063 
            'mdl_handle' => 2083.00048828125,
12064 
            'model_handle' => 2083.00048828125,
12065 
            'n_bits' => 16,
12066 
            'ownership' => 1,
12067 
            'preci_type' => 1,
12068 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12069 
            'shared_memory_name' => 'register10rd',
12070 
          },
12071 
          'needs_vhdl_wrapper' => 0,
12072 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
12073 
        },
12074 
        'entityName' => 'x_x44',
12075 
        'ports' => {
12076 
          'ce' => {
12077 
            'attributes' => {
12078 
              'domain' => '',
12079 
              'group' => 1,
12080 
              'isCe' => 1,
12081 
              'is_floating_block' => 1,
12082 
              'period' => 1,
12083 
              'type' => 'logic',
12084 
            },
12085 
            'direction' => 'in',
12086 
            'hdlType' => 'std_logic',
12087 
            'width' => 1,
12088 
          },
12089 
          'clk' => {
12090 
            'attributes' => {
12091 
              'domain' => '',
12092 
              'group' => 1,
12093 
              'isClk' => 1,
12094 
              'is_floating_block' => 1,
12095 
              'period' => 1,
12096 
              'type' => 'logic',
12097 
            },
12098 
            'direction' => 'in',
12099 
            'hdlType' => 'std_logic',
12100 
            'width' => 1,
12101 
          },
12102 
          'clr' => {
12103 
            'attributes' => {
12104 
              'domain' => '',
12105 
              'group' => 1,
12106 
              'isClr' => 1,
12107 
              'is_floating_block' => 1,
12108 
              'period' => 1,
12109 
              'type' => 'logic',
12110 
              'valid_bit_used' => 0,
12111 
            },
12112 
            'direction' => 'in',
12113 
            'hdlType' => 'std_logic',
12114 
            'width' => 1,
12115 
          },
12116 
          'data_in' => {
12117 
            'attributes' => {
12118 
              'bin_pt' => 0,
12119 
              'is_floating_block' => 1,
12120 
              'must_be_hdl_vector' => 1,
12121 
              'period' => 1,
12122 
              'port_id' => 0,
12123 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
12124 
              'type' => 'UFix_32_0',
12125 
            },
12126 
            'direction' => 'in',
12127 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12128 
            'width' => 32,
12129 
          },
12130 
          'dout' => {
12131 
            'attributes' => {
12132 
              'bin_pt' => 0,
12133 
              'is_floating_block' => 1,
12134 
              'must_be_hdl_vector' => 1,
12135 
              'period' => 1,
12136 
              'port_id' => 0,
12137 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
12138 
              'type' => 'UFix_32_0',
12139 
            },
12140 
            'direction' => 'out',
12141 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12142 
            'width' => 32,
12143 
          },
12144 
          'en' => {
12145 
            'attributes' => {
12146 
              'bin_pt' => 0,
12147 
              'is_floating_block' => 1,
12148 
              'must_be_hdl_vector' => 1,
12149 
              'period' => 1,
12150 
              'port_id' => 1,
12151 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
12152 
              'type' => 'Bool',
12153 
            },
12154 
            'direction' => 'in',
12155 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12156 
            'width' => 1,
12157 
          },
12158 
        },
12159 
      },
12160 
      'entityName' => 'x_x44',
12161 
    },
12162 
    'to_register2' => {
12163 
      'connections' => {
12164 
        'ce' => 'sysgen_dut.to_register2_ce',
12165 
        'clk' => 'sysgen_dut.to_register2_clk',
12166 
        'clr' => 'sysgen_dut.to_register2_clr',
12167 
        'data_in' => 'sysgen_dut.to_register2_data_in',
12168 
        'dout' => 'to_register2.dout',
12169 
        'en' => 'sysgen_dut.to_register2_en',
12170 
      },
12171 
      'entity' => {
12172 
        'attributes' => {
12173 
          'entityAlreadyNetlisted' => 1,
12174 
          'generics' => [
12175 
          ],
12176 
          'is_floating_block' => 1,
12177 
          'mask' => {
12178 
            'Block_Handle' => 2444.00048828125,
12179 
            'Block_handle' => 2444.00048828125,
12180 
            'MDL_Handle' => 2083.00048828125,
12181 
            'MDL_handle' => 2083.00048828125,
12182 
            'arith_type' => 1,
12183 
            'bin_pt' => 14,
12184 
            'block_config' => 'sysgen_blockset:toreg_config',
12185 
            'block_handle' => 2444.00048828125,
12186 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
12187 
            'block_type' => 'toreg',
12188 
            'dbl_ovrd' => 0,
12189 
            'explicit_data_type' => 0,
12190 
            'gui_display_data_type' => 1,
12191 
            'init' => 0,
12192 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12193 
            'mdl_handle' => 2083.00048828125,
12194 
            'model_handle' => 2083.00048828125,
12195 
            'n_bits' => 16,
12196 
            'ownership' => 1,
12197 
            'preci_type' => 1,
12198 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12199 
            'shared_memory_name' => 'register02rd',
12200 
          },
12201 
          'needs_vhdl_wrapper' => 0,
12202 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
12203 
        },
12204 
        'entityName' => 'x_x45',
12205 
        'ports' => {
12206 
          'ce' => {
12207 
            'attributes' => {
12208 
              'domain' => '',
12209 
              'group' => 1,
12210 
              'isCe' => 1,
12211 
              'is_floating_block' => 1,
12212 
              'period' => 1,
12213 
              'type' => 'logic',
12214 
            },
12215 
            'direction' => 'in',
12216 
            'hdlType' => 'std_logic',
12217 
            'width' => 1,
12218 
          },
12219 
          'clk' => {
12220 
            'attributes' => {
12221 
              'domain' => '',
12222 
              'group' => 1,
12223 
              'isClk' => 1,
12224 
              'is_floating_block' => 1,
12225 
              'period' => 1,
12226 
              'type' => 'logic',
12227 
            },
12228 
            'direction' => 'in',
12229 
            'hdlType' => 'std_logic',
12230 
            'width' => 1,
12231 
          },
12232 
          'clr' => {
12233 
            'attributes' => {
12234 
              'domain' => '',
12235 
              'group' => 1,
12236 
              'isClr' => 1,
12237 
              'is_floating_block' => 1,
12238 
              'period' => 1,
12239 
              'type' => 'logic',
12240 
              'valid_bit_used' => 0,
12241 
            },
12242 
            'direction' => 'in',
12243 
            'hdlType' => 'std_logic',
12244 
            'width' => 1,
12245 
          },
12246 
          'data_in' => {
12247 
            'attributes' => {
12248 
              'bin_pt' => 0,
12249 
              'is_floating_block' => 1,
12250 
              'must_be_hdl_vector' => 1,
12251 
              'period' => 1,
12252 
              'port_id' => 0,
12253 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
12254 
              'type' => 'UFix_32_0',
12255 
            },
12256 
            'direction' => 'in',
12257 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12258 
            'width' => 32,
12259 
          },
12260 
          'dout' => {
12261 
            'attributes' => {
12262 
              'bin_pt' => 0,
12263 
              'is_floating_block' => 1,
12264 
              'must_be_hdl_vector' => 1,
12265 
              'period' => 1,
12266 
              'port_id' => 0,
12267 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
12268 
              'type' => 'UFix_32_0',
12269 
            },
12270 
            'direction' => 'out',
12271 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12272 
            'width' => 32,
12273 
          },
12274 
          'en' => {
12275 
            'attributes' => {
12276 
              'bin_pt' => 0,
12277 
              'is_floating_block' => 1,
12278 
              'must_be_hdl_vector' => 1,
12279 
              'period' => 1,
12280 
              'port_id' => 1,
12281 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
12282 
              'type' => 'Bool',
12283 
            },
12284 
            'direction' => 'in',
12285 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12286 
            'width' => 1,
12287 
          },
12288 
        },
12289 
      },
12290 
      'entityName' => 'x_x45',
12291 
    },
12292 
    'to_register20' => {
12293 
      'connections' => {
12294 
        'ce' => 'sysgen_dut.to_register20_ce',
12295 
        'clk' => 'sysgen_dut.to_register20_clk',
12296 
        'clr' => 'sysgen_dut.to_register20_clr',
12297 
        'data_in' => 'sysgen_dut.to_register20_data_in',
12298 
        'dout' => 'to_register20.dout',
12299 
        'en' => 'sysgen_dut.to_register20_en',
12300 
      },
12301 
      'entity' => {
12302 
        'attributes' => {
12303 
          'entityAlreadyNetlisted' => 1,
12304 
          'generics' => [
12305 
          ],
12306 
          'is_floating_block' => 1,
12307 
          'mask' => {
12308 
            'Block_Handle' => 2445.00048828125,
12309 
            'Block_handle' => 2445.00048828125,
12310 
            'MDL_Handle' => 2083.00048828125,
12311 
            'MDL_handle' => 2083.00048828125,
12312 
            'arith_type' => 1,
12313 
            'bin_pt' => 14,
12314 
            'block_config' => 'sysgen_blockset:toreg_config',
12315 
            'block_handle' => 2445.00048828125,
12316 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
12317 
            'block_type' => 'toreg',
12318 
            'dbl_ovrd' => 0,
12319 
            'explicit_data_type' => 0,
12320 
            'gui_display_data_type' => 1,
12321 
            'init' => 0,
12322 
            'init_bit_vector' => '\'b0',
12323 
            'mdl_handle' => 2083.00048828125,
12324 
            'model_handle' => 2083.00048828125,
12325 
            'n_bits' => 16,
12326 
            'ownership' => 1,
12327 
            'preci_type' => 1,
12328 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12329 
            'shared_memory_name' => 'register11rv',
12330 
          },
12331 
          'needs_vhdl_wrapper' => 0,
12332 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
12333 
        },
12334 
        'entityName' => 'x_x46',
12335 
        'ports' => {
12336 
          'ce' => {
12337 
            'attributes' => {
12338 
              'domain' => '',
12339 
              'group' => 1,
12340 
              'isCe' => 1,
12341 
              'is_floating_block' => 1,
12342 
              'period' => 1,
12343 
              'type' => 'logic',
12344 
            },
12345 
            'direction' => 'in',
12346 
            'hdlType' => 'std_logic',
12347 
            'width' => 1,
12348 
          },
12349 
          'clk' => {
12350 
            'attributes' => {
12351 
              'domain' => '',
12352 
              'group' => 1,
12353 
              'isClk' => 1,
12354 
              'is_floating_block' => 1,
12355 
              'period' => 1,
12356 
              'type' => 'logic',
12357 
            },
12358 
            'direction' => 'in',
12359 
            'hdlType' => 'std_logic',
12360 
            'width' => 1,
12361 
          },
12362 
          'clr' => {
12363 
            'attributes' => {
12364 
              'domain' => '',
12365 
              'group' => 1,
12366 
              'isClr' => 1,
12367 
              'is_floating_block' => 1,
12368 
              'period' => 1,
12369 
              'type' => 'logic',
12370 
              'valid_bit_used' => 0,
12371 
            },
12372 
            'direction' => 'in',
12373 
            'hdlType' => 'std_logic',
12374 
            'width' => 1,
12375 
          },
12376 
          'data_in' => {
12377 
            'attributes' => {
12378 
              'bin_pt' => 0,
12379 
              'is_floating_block' => 1,
12380 
              'must_be_hdl_vector' => 1,
12381 
              'period' => 1,
12382 
              'port_id' => 0,
12383 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
12384 
              'type' => 'Bool',
12385 
            },
12386 
            'direction' => 'in',
12387 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12388 
            'width' => 1,
12389 
          },
12390 
          'dout' => {
12391 
            'attributes' => {
12392 
              'bin_pt' => 0,
12393 
              'is_floating_block' => 1,
12394 
              'must_be_hdl_vector' => 1,
12395 
              'period' => 1,
12396 
              'port_id' => 0,
12397 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
12398 
              'type' => 'Bool',
12399 
            },
12400 
            'direction' => 'out',
12401 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12402 
            'width' => 1,
12403 
          },
12404 
          'en' => {
12405 
            'attributes' => {
12406 
              'bin_pt' => 0,
12407 
              'is_floating_block' => 1,
12408 
              'must_be_hdl_vector' => 1,
12409 
              'period' => 1,
12410 
              'port_id' => 1,
12411 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
12412 
              'type' => 'Bool',
12413 
            },
12414 
            'direction' => 'in',
12415 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12416 
            'width' => 1,
12417 
          },
12418 
        },
12419 
      },
12420 
      'entityName' => 'x_x46',
12421 
    },
12422 
    'to_register21' => {
12423 
      'connections' => {
12424 
        'ce' => 'sysgen_dut.to_register21_ce',
12425 
        'clk' => 'sysgen_dut.to_register21_clk',
12426 
        'clr' => 'sysgen_dut.to_register21_clr',
12427 
        'data_in' => 'sysgen_dut.to_register21_data_in',
12428 
        'dout' => 'to_register21.dout',
12429 
        'en' => 'sysgen_dut.to_register21_en',
12430 
      },
12431 
      'entity' => {
12432 
        'attributes' => {
12433 
          'entityAlreadyNetlisted' => 1,
12434 
          'generics' => [
12435 
          ],
12436 
          'is_floating_block' => 1,
12437 
          'mask' => {
12438 
            'Block_Handle' => 2446.00048828125,
12439 
            'Block_handle' => 2446.00048828125,
12440 
            'MDL_Handle' => 2083.00048828125,
12441 
            'MDL_handle' => 2083.00048828125,
12442 
            'arith_type' => 1,
12443 
            'bin_pt' => 14,
12444 
            'block_config' => 'sysgen_blockset:toreg_config',
12445 
            'block_handle' => 2446.00048828125,
12446 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12447 
            'block_type' => 'toreg',
12448 
            'dbl_ovrd' => 0,
12449 
            'explicit_data_type' => 0,
12450 
            'gui_display_data_type' => 1,
12451 
            'init' => 0,
12452 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12453 
            'mdl_handle' => 2083.00048828125,
12454 
            'model_handle' => 2083.00048828125,
12455 
            'n_bits' => 16,
12456 
            'ownership' => 1,
12457 
            'preci_type' => 1,
12458 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12459 
            'shared_memory_name' => 'register11rd',
12460 
          },
12461 
          'needs_vhdl_wrapper' => 0,
12462 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12463 
        },
12464 
        'entityName' => 'x_x47',
12465 
        'ports' => {
12466 
          'ce' => {
12467 
            'attributes' => {
12468 
              'domain' => '',
12469 
              'group' => 1,
12470 
              'isCe' => 1,
12471 
              'is_floating_block' => 1,
12472 
              'period' => 1,
12473 
              'type' => 'logic',
12474 
            },
12475 
            'direction' => 'in',
12476 
            'hdlType' => 'std_logic',
12477 
            'width' => 1,
12478 
          },
12479 
          'clk' => {
12480 
            'attributes' => {
12481 
              'domain' => '',
12482 
              'group' => 1,
12483 
              'isClk' => 1,
12484 
              'is_floating_block' => 1,
12485 
              'period' => 1,
12486 
              'type' => 'logic',
12487 
            },
12488 
            'direction' => 'in',
12489 
            'hdlType' => 'std_logic',
12490 
            'width' => 1,
12491 
          },
12492 
          'clr' => {
12493 
            'attributes' => {
12494 
              'domain' => '',
12495 
              'group' => 1,
12496 
              'isClr' => 1,
12497 
              'is_floating_block' => 1,
12498 
              'period' => 1,
12499 
              'type' => 'logic',
12500 
              'valid_bit_used' => 0,
12501 
            },
12502 
            'direction' => 'in',
12503 
            'hdlType' => 'std_logic',
12504 
            'width' => 1,
12505 
          },
12506 
          'data_in' => {
12507 
            'attributes' => {
12508 
              'bin_pt' => 0,
12509 
              'is_floating_block' => 1,
12510 
              'must_be_hdl_vector' => 1,
12511 
              'period' => 1,
12512 
              'port_id' => 0,
12513 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
12514 
              'type' => 'UFix_32_0',
12515 
            },
12516 
            'direction' => 'in',
12517 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12518 
            'width' => 32,
12519 
          },
12520 
          'dout' => {
12521 
            'attributes' => {
12522 
              'bin_pt' => 0,
12523 
              'is_floating_block' => 1,
12524 
              'must_be_hdl_vector' => 1,
12525 
              'period' => 1,
12526 
              'port_id' => 0,
12527 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
12528 
              'type' => 'UFix_32_0',
12529 
            },
12530 
            'direction' => 'out',
12531 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12532 
            'width' => 32,
12533 
          },
12534 
          'en' => {
12535 
            'attributes' => {
12536 
              'bin_pt' => 0,
12537 
              'is_floating_block' => 1,
12538 
              'must_be_hdl_vector' => 1,
12539 
              'period' => 1,
12540 
              'port_id' => 1,
12541 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
12542 
              'type' => 'Bool',
12543 
            },
12544 
            'direction' => 'in',
12545 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12546 
            'width' => 1,
12547 
          },
12548 
        },
12549 
      },
12550 
      'entityName' => 'x_x47',
12551 
    },
12552 
    'to_register22' => {
12553 
      'connections' => {
12554 
        'ce' => 'sysgen_dut.to_register22_ce',
12555 
        'clk' => 'sysgen_dut.to_register22_clk',
12556 
        'clr' => 'sysgen_dut.to_register22_clr',
12557 
        'data_in' => 'sysgen_dut.to_register22_data_in',
12558 
        'dout' => 'to_register22.dout',
12559 
        'en' => 'sysgen_dut.to_register22_en',
12560 
      },
12561 
      'entity' => {
12562 
        'attributes' => {
12563 
          'entityAlreadyNetlisted' => 1,
12564 
          'generics' => [
12565 
          ],
12566 
          'is_floating_block' => 1,
12567 
          'mask' => {
12568 
            'Block_Handle' => 2447.00048828125,
12569 
            'Block_handle' => 2447.00048828125,
12570 
            'MDL_Handle' => 2083.00048828125,
12571 
            'MDL_handle' => 2083.00048828125,
12572 
            'arith_type' => 1,
12573 
            'bin_pt' => 14,
12574 
            'block_config' => 'sysgen_blockset:toreg_config',
12575 
            'block_handle' => 2447.00048828125,
12576 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12577 
            'block_type' => 'toreg',
12578 
            'dbl_ovrd' => 0,
12579 
            'explicit_data_type' => 0,
12580 
            'gui_display_data_type' => 1,
12581 
            'init' => 0,
12582 
            'init_bit_vector' => '\'b0',
12583 
            'mdl_handle' => 2083.00048828125,
12584 
            'model_handle' => 2083.00048828125,
12585 
            'n_bits' => 16,
12586 
            'ownership' => 1,
12587 
            'preci_type' => 1,
12588 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12589 
            'shared_memory_name' => 'register12rv',
12590 
          },
12591 
          'needs_vhdl_wrapper' => 0,
12592 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12593 
        },
12594 
        'entityName' => 'x_x48',
12595 
        'ports' => {
12596 
          'ce' => {
12597 
            'attributes' => {
12598 
              'domain' => '',
12599 
              'group' => 1,
12600 
              'isCe' => 1,
12601 
              'is_floating_block' => 1,
12602 
              'period' => 1,
12603 
              'type' => 'logic',
12604 
            },
12605 
            'direction' => 'in',
12606 
            'hdlType' => 'std_logic',
12607 
            'width' => 1,
12608 
          },
12609 
          'clk' => {
12610 
            'attributes' => {
12611 
              'domain' => '',
12612 
              'group' => 1,
12613 
              'isClk' => 1,
12614 
              'is_floating_block' => 1,
12615 
              'period' => 1,
12616 
              'type' => 'logic',
12617 
            },
12618 
            'direction' => 'in',
12619 
            'hdlType' => 'std_logic',
12620 
            'width' => 1,
12621 
          },
12622 
          'clr' => {
12623 
            'attributes' => {
12624 
              'domain' => '',
12625 
              'group' => 1,
12626 
              'isClr' => 1,
12627 
              'is_floating_block' => 1,
12628 
              'period' => 1,
12629 
              'type' => 'logic',
12630 
              'valid_bit_used' => 0,
12631 
            },
12632 
            'direction' => 'in',
12633 
            'hdlType' => 'std_logic',
12634 
            'width' => 1,
12635 
          },
12636 
          'data_in' => {
12637 
            'attributes' => {
12638 
              'bin_pt' => 0,
12639 
              'is_floating_block' => 1,
12640 
              'must_be_hdl_vector' => 1,
12641 
              'period' => 1,
12642 
              'port_id' => 0,
12643 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
12644 
              'type' => 'Bool',
12645 
            },
12646 
            'direction' => 'in',
12647 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12648 
            'width' => 1,
12649 
          },
12650 
          'dout' => {
12651 
            'attributes' => {
12652 
              'bin_pt' => 0,
12653 
              'is_floating_block' => 1,
12654 
              'must_be_hdl_vector' => 1,
12655 
              'period' => 1,
12656 
              'port_id' => 0,
12657 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
12658 
              'type' => 'Bool',
12659 
            },
12660 
            'direction' => 'out',
12661 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12662 
            'width' => 1,
12663 
          },
12664 
          'en' => {
12665 
            'attributes' => {
12666 
              'bin_pt' => 0,
12667 
              'is_floating_block' => 1,
12668 
              'must_be_hdl_vector' => 1,
12669 
              'period' => 1,
12670 
              'port_id' => 1,
12671 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
12672 
              'type' => 'Bool',
12673 
            },
12674 
            'direction' => 'in',
12675 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12676 
            'width' => 1,
12677 
          },
12678 
        },
12679 
      },
12680 
      'entityName' => 'x_x48',
12681 
    },
12682 
    'to_register23' => {
12683 
      'connections' => {
12684 
        'ce' => 'sysgen_dut.to_register23_ce',
12685 
        'clk' => 'sysgen_dut.to_register23_clk',
12686 
        'clr' => 'sysgen_dut.to_register23_clr',
12687 
        'data_in' => 'sysgen_dut.to_register23_data_in',
12688 
        'dout' => 'to_register23.dout',
12689 
        'en' => 'sysgen_dut.to_register23_en',
12690 
      },
12691 
      'entity' => {
12692 
        'attributes' => {
12693 
          'entityAlreadyNetlisted' => 1,
12694 
          'generics' => [
12695 
          ],
12696 
          'is_floating_block' => 1,
12697 
          'mask' => {
12698 
            'Block_Handle' => 2448.00048828125,
12699 
            'Block_handle' => 2448.00048828125,
12700 
            'MDL_Handle' => 2083.00048828125,
12701 
            'MDL_handle' => 2083.00048828125,
12702 
            'arith_type' => 1,
12703 
            'bin_pt' => 14,
12704 
            'block_config' => 'sysgen_blockset:toreg_config',
12705 
            'block_handle' => 2448.00048828125,
12706 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12707 
            'block_type' => 'toreg',
12708 
            'dbl_ovrd' => 0,
12709 
            'explicit_data_type' => 0,
12710 
            'gui_display_data_type' => 1,
12711 
            'init' => 0,
12712 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12713 
            'mdl_handle' => 2083.00048828125,
12714 
            'model_handle' => 2083.00048828125,
12715 
            'n_bits' => 16,
12716 
            'ownership' => 1,
12717 
            'preci_type' => 1,
12718 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12719 
            'shared_memory_name' => 'register12rd',
12720 
          },
12721 
          'needs_vhdl_wrapper' => 0,
12722 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12723 
        },
12724 
        'entityName' => 'x_x49',
12725 
        'ports' => {
12726 
          'ce' => {
12727 
            'attributes' => {
12728 
              'domain' => '',
12729 
              'group' => 1,
12730 
              'isCe' => 1,
12731 
              'is_floating_block' => 1,
12732 
              'period' => 1,
12733 
              'type' => 'logic',
12734 
            },
12735 
            'direction' => 'in',
12736 
            'hdlType' => 'std_logic',
12737 
            'width' => 1,
12738 
          },
12739 
          'clk' => {
12740 
            'attributes' => {
12741 
              'domain' => '',
12742 
              'group' => 1,
12743 
              'isClk' => 1,
12744 
              'is_floating_block' => 1,
12745 
              'period' => 1,
12746 
              'type' => 'logic',
12747 
            },
12748 
            'direction' => 'in',
12749 
            'hdlType' => 'std_logic',
12750 
            'width' => 1,
12751 
          },
12752 
          'clr' => {
12753 
            'attributes' => {
12754 
              'domain' => '',
12755 
              'group' => 1,
12756 
              'isClr' => 1,
12757 
              'is_floating_block' => 1,
12758 
              'period' => 1,
12759 
              'type' => 'logic',
12760 
              'valid_bit_used' => 0,
12761 
            },
12762 
            'direction' => 'in',
12763 
            'hdlType' => 'std_logic',
12764 
            'width' => 1,
12765 
          },
12766 
          'data_in' => {
12767 
            'attributes' => {
12768 
              'bin_pt' => 0,
12769 
              'is_floating_block' => 1,
12770 
              'must_be_hdl_vector' => 1,
12771 
              'period' => 1,
12772 
              'port_id' => 0,
12773 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
12774 
              'type' => 'UFix_32_0',
12775 
            },
12776 
            'direction' => 'in',
12777 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12778 
            'width' => 32,
12779 
          },
12780 
          'dout' => {
12781 
            'attributes' => {
12782 
              'bin_pt' => 0,
12783 
              'is_floating_block' => 1,
12784 
              'must_be_hdl_vector' => 1,
12785 
              'period' => 1,
12786 
              'port_id' => 0,
12787 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
12788 
              'type' => 'UFix_32_0',
12789 
            },
12790 
            'direction' => 'out',
12791 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12792 
            'width' => 32,
12793 
          },
12794 
          'en' => {
12795 
            'attributes' => {
12796 
              'bin_pt' => 0,
12797 
              'is_floating_block' => 1,
12798 
              'must_be_hdl_vector' => 1,
12799 
              'period' => 1,
12800 
              'port_id' => 1,
12801 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
12802 
              'type' => 'Bool',
12803 
            },
12804 
            'direction' => 'in',
12805 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12806 
            'width' => 1,
12807 
          },
12808 
        },
12809 
      },
12810 
      'entityName' => 'x_x49',
12811 
    },
12812 
    'to_register24' => {
12813 
      'connections' => {
12814 
        'ce' => 'sysgen_dut.to_register24_ce',
12815 
        'clk' => 'sysgen_dut.to_register24_clk',
12816 
        'clr' => 'sysgen_dut.to_register24_clr',
12817 
        'data_in' => 'sysgen_dut.to_register24_data_in',
12818 
        'dout' => 'to_register24.dout',
12819 
        'en' => 'sysgen_dut.to_register24_en',
12820 
      },
12821 
      'entity' => {
12822 
        'attributes' => {
12823 
          'entityAlreadyNetlisted' => 1,
12824 
          'generics' => [
12825 
          ],
12826 
          'is_floating_block' => 1,
12827 
          'mask' => {
12828 
            'Block_Handle' => 2449.00048828125,
12829 
            'Block_handle' => 2449.00048828125,
12830 
            'MDL_Handle' => 2083.00048828125,
12831 
            'MDL_handle' => 2083.00048828125,
12832 
            'arith_type' => 1,
12833 
            'bin_pt' => 14,
12834 
            'block_config' => 'sysgen_blockset:toreg_config',
12835 
            'block_handle' => 2449.00048828125,
12836 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12837 
            'block_type' => 'toreg',
12838 
            'dbl_ovrd' => 0,
12839 
            'explicit_data_type' => 0,
12840 
            'gui_display_data_type' => 1,
12841 
            'init' => 0,
12842 
            'init_bit_vector' => '\'b0',
12843 
            'mdl_handle' => 2083.00048828125,
12844 
            'model_handle' => 2083.00048828125,
12845 
            'n_bits' => 16,
12846 
            'ownership' => 1,
12847 
            'preci_type' => 1,
12848 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12849 
            'shared_memory_name' => 'register13rv',
12850 
          },
12851 
          'needs_vhdl_wrapper' => 0,
12852 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12853 
        },
12854 
        'entityName' => 'x_x50',
12855 
        'ports' => {
12856 
          'ce' => {
12857 
            'attributes' => {
12858 
              'domain' => '',
12859 
              'group' => 1,
12860 
              'isCe' => 1,
12861 
              'is_floating_block' => 1,
12862 
              'period' => 1,
12863 
              'type' => 'logic',
12864 
            },
12865 
            'direction' => 'in',
12866 
            'hdlType' => 'std_logic',
12867 
            'width' => 1,
12868 
          },
12869 
          'clk' => {
12870 
            'attributes' => {
12871 
              'domain' => '',
12872 
              'group' => 1,
12873 
              'isClk' => 1,
12874 
              'is_floating_block' => 1,
12875 
              'period' => 1,
12876 
              'type' => 'logic',
12877 
            },
12878 
            'direction' => 'in',
12879 
            'hdlType' => 'std_logic',
12880 
            'width' => 1,
12881 
          },
12882 
          'clr' => {
12883 
            'attributes' => {
12884 
              'domain' => '',
12885 
              'group' => 1,
12886 
              'isClr' => 1,
12887 
              'is_floating_block' => 1,
12888 
              'period' => 1,
12889 
              'type' => 'logic',
12890 
              'valid_bit_used' => 0,
12891 
            },
12892 
            'direction' => 'in',
12893 
            'hdlType' => 'std_logic',
12894 
            'width' => 1,
12895 
          },
12896 
          'data_in' => {
12897 
            'attributes' => {
12898 
              'bin_pt' => 0,
12899 
              'is_floating_block' => 1,
12900 
              'must_be_hdl_vector' => 1,
12901 
              'period' => 1,
12902 
              'port_id' => 0,
12903 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
12904 
              'type' => 'Bool',
12905 
            },
12906 
            'direction' => 'in',
12907 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12908 
            'width' => 1,
12909 
          },
12910 
          'dout' => {
12911 
            'attributes' => {
12912 
              'bin_pt' => 0,
12913 
              'is_floating_block' => 1,
12914 
              'must_be_hdl_vector' => 1,
12915 
              'period' => 1,
12916 
              'port_id' => 0,
12917 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
12918 
              'type' => 'Bool',
12919 
            },
12920 
            'direction' => 'out',
12921 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12922 
            'width' => 1,
12923 
          },
12924 
          'en' => {
12925 
            'attributes' => {
12926 
              'bin_pt' => 0,
12927 
              'is_floating_block' => 1,
12928 
              'must_be_hdl_vector' => 1,
12929 
              'period' => 1,
12930 
              'port_id' => 1,
12931 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
12932 
              'type' => 'Bool',
12933 
            },
12934 
            'direction' => 'in',
12935 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12936 
            'width' => 1,
12937 
          },
12938 
        },
12939 
      },
12940 
      'entityName' => 'x_x50',
12941 
    },
12942 
    'to_register25' => {
12943 
      'connections' => {
12944 
        'ce' => 'sysgen_dut.to_register25_ce',
12945 
        'clk' => 'sysgen_dut.to_register25_clk',
12946 
        'clr' => 'sysgen_dut.to_register25_clr',
12947 
        'data_in' => 'sysgen_dut.to_register25_data_in',
12948 
        'dout' => 'to_register25.dout',
12949 
        'en' => 'sysgen_dut.to_register25_en',
12950 
      },
12951 
      'entity' => {
12952 
        'attributes' => {
12953 
          'entityAlreadyNetlisted' => 1,
12954 
          'generics' => [
12955 
          ],
12956 
          'is_floating_block' => 1,
12957 
          'mask' => {
12958 
            'Block_Handle' => 2450.00048828125,
12959 
            'Block_handle' => 2450.00048828125,
12960 
            'MDL_Handle' => 2083.00048828125,
12961 
            'MDL_handle' => 2083.00048828125,
12962 
            'arith_type' => 1,
12963 
            'bin_pt' => 14,
12964 
            'block_config' => 'sysgen_blockset:toreg_config',
12965 
            'block_handle' => 2450.00048828125,
12966 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12967 
            'block_type' => 'toreg',
12968 
            'dbl_ovrd' => 0,
12969 
            'explicit_data_type' => 0,
12970 
            'gui_display_data_type' => 1,
12971 
            'init' => 0,
12972 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12973 
            'mdl_handle' => 2083.00048828125,
12974 
            'model_handle' => 2083.00048828125,
12975 
            'n_bits' => 16,
12976 
            'ownership' => 1,
12977 
            'preci_type' => 1,
12978 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12979 
            'shared_memory_name' => 'register13rd',
12980 
          },
12981 
          'needs_vhdl_wrapper' => 0,
12982 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12983 
        },
12984 
        'entityName' => 'x_x51',
12985 
        'ports' => {
12986 
          'ce' => {
12987 
            'attributes' => {
12988 
              'domain' => '',
12989 
              'group' => 1,
12990 
              'isCe' => 1,
12991 
              'is_floating_block' => 1,
12992 
              'period' => 1,
12993 
              'type' => 'logic',
12994 
            },
12995 
            'direction' => 'in',
12996 
            'hdlType' => 'std_logic',
12997 
            'width' => 1,
12998 
          },
12999 
          'clk' => {
13000 
            'attributes' => {
13001 
              'domain' => '',
13002 
              'group' => 1,
13003 
              'isClk' => 1,
13004 
              'is_floating_block' => 1,
13005 
              'period' => 1,
13006 
              'type' => 'logic',
13007 
            },
13008 
            'direction' => 'in',
13009 
            'hdlType' => 'std_logic',
13010 
            'width' => 1,
13011 
          },
13012 
          'clr' => {
13013 
            'attributes' => {
13014 
              'domain' => '',
13015 
              'group' => 1,
13016 
              'isClr' => 1,
13017 
              'is_floating_block' => 1,
13018 
              'period' => 1,
13019 
              'type' => 'logic',
13020 
              'valid_bit_used' => 0,
13021 
            },
13022 
            'direction' => 'in',
13023 
            'hdlType' => 'std_logic',
13024 
            'width' => 1,
13025 
          },
13026 
          'data_in' => {
13027 
            'attributes' => {
13028 
              'bin_pt' => 0,
13029 
              'is_floating_block' => 1,
13030 
              'must_be_hdl_vector' => 1,
13031 
              'period' => 1,
13032 
              'port_id' => 0,
13033 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
13034 
              'type' => 'UFix_32_0',
13035 
            },
13036 
            'direction' => 'in',
13037 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13038 
            'width' => 32,
13039 
          },
13040 
          'dout' => {
13041 
            'attributes' => {
13042 
              'bin_pt' => 0,
13043 
              'is_floating_block' => 1,
13044 
              'must_be_hdl_vector' => 1,
13045 
              'period' => 1,
13046 
              'port_id' => 0,
13047 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
13048 
              'type' => 'UFix_32_0',
13049 
            },
13050 
            'direction' => 'out',
13051 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13052 
            'width' => 32,
13053 
          },
13054 
          'en' => {
13055 
            'attributes' => {
13056 
              'bin_pt' => 0,
13057 
              'is_floating_block' => 1,
13058 
              'must_be_hdl_vector' => 1,
13059 
              'period' => 1,
13060 
              'port_id' => 1,
13061 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
13062 
              'type' => 'Bool',
13063 
            },
13064 
            'direction' => 'in',
13065 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13066 
            'width' => 1,
13067 
          },
13068 
        },
13069 
      },
13070 
      'entityName' => 'x_x51',
13071 
    },
13072 
    'to_register26' => {
13073 
      'connections' => {
13074 
        'ce' => 'sysgen_dut.to_register26_ce',
13075 
        'clk' => 'sysgen_dut.to_register26_clk',
13076 
        'clr' => 'sysgen_dut.to_register26_clr',
13077 
        'data_in' => 'sysgen_dut.to_register26_data_in',
13078 
        'dout' => 'to_register26.dout',
13079 
        'en' => 'sysgen_dut.to_register26_en',
13080 
      },
13081 
      'entity' => {
13082 
        'attributes' => {
13083 
          'entityAlreadyNetlisted' => 1,
13084 
          'generics' => [
13085 
          ],
13086 
          'is_floating_block' => 1,
13087 
          'mask' => {
13088 
            'Block_Handle' => 2451.00048828125,
13089 
            'Block_handle' => 2451.00048828125,
13090 
            'MDL_Handle' => 2083.00048828125,
13091 
            'MDL_handle' => 2083.00048828125,
13092 
            'arith_type' => 1,
13093 
            'bin_pt' => 14,
13094 
            'block_config' => 'sysgen_blockset:toreg_config',
13095 
            'block_handle' => 2451.00048828125,
13096 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
13097 
            'block_type' => 'toreg',
13098 
            'dbl_ovrd' => 0,
13099 
            'explicit_data_type' => 0,
13100 
            'gui_display_data_type' => 1,
13101 
            'init' => 0,
13102 
            'init_bit_vector' => '\'b0',
13103 
            'mdl_handle' => 2083.00048828125,
13104 
            'model_handle' => 2083.00048828125,
13105 
            'n_bits' => 16,
13106 
            'ownership' => 1,
13107 
            'preci_type' => 1,
13108 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13109 
            'shared_memory_name' => 'register14rv',
13110 
          },
13111 
          'needs_vhdl_wrapper' => 0,
13112 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
13113 
        },
13114 
        'entityName' => 'x_x52',
13115 
        'ports' => {
13116 
          'ce' => {
13117 
            'attributes' => {
13118 
              'domain' => '',
13119 
              'group' => 1,
13120 
              'isCe' => 1,
13121 
              'is_floating_block' => 1,
13122 
              'period' => 1,
13123 
              'type' => 'logic',
13124 
            },
13125 
            'direction' => 'in',
13126 
            'hdlType' => 'std_logic',
13127 
            'width' => 1,
13128 
          },
13129 
          'clk' => {
13130 
            'attributes' => {
13131 
              'domain' => '',
13132 
              'group' => 1,
13133 
              'isClk' => 1,
13134 
              'is_floating_block' => 1,
13135 
              'period' => 1,
13136 
              'type' => 'logic',
13137 
            },
13138 
            'direction' => 'in',
13139 
            'hdlType' => 'std_logic',
13140 
            'width' => 1,
13141 
          },
13142 
          'clr' => {
13143 
            'attributes' => {
13144 
              'domain' => '',
13145 
              'group' => 1,
13146 
              'isClr' => 1,
13147 
              'is_floating_block' => 1,
13148 
              'period' => 1,
13149 
              'type' => 'logic',
13150 
              'valid_bit_used' => 0,
13151 
            },
13152 
            'direction' => 'in',
13153 
            'hdlType' => 'std_logic',
13154 
            'width' => 1,
13155 
          },
13156 
          'data_in' => {
13157 
            'attributes' => {
13158 
              'bin_pt' => 0,
13159 
              'is_floating_block' => 1,
13160 
              'must_be_hdl_vector' => 1,
13161 
              'period' => 1,
13162 
              'port_id' => 0,
13163 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
13164 
              'type' => 'Bool',
13165 
            },
13166 
            'direction' => 'in',
13167 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13168 
            'width' => 1,
13169 
          },
13170 
          'dout' => {
13171 
            'attributes' => {
13172 
              'bin_pt' => 0,
13173 
              'is_floating_block' => 1,
13174 
              'must_be_hdl_vector' => 1,
13175 
              'period' => 1,
13176 
              'port_id' => 0,
13177 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
13178 
              'type' => 'Bool',
13179 
            },
13180 
            'direction' => 'out',
13181 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13182 
            'width' => 1,
13183 
          },
13184 
          'en' => {
13185 
            'attributes' => {
13186 
              'bin_pt' => 0,
13187 
              'is_floating_block' => 1,
13188 
              'must_be_hdl_vector' => 1,
13189 
              'period' => 1,
13190 
              'port_id' => 1,
13191 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
13192 
              'type' => 'Bool',
13193 
            },
13194 
            'direction' => 'in',
13195 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13196 
            'width' => 1,
13197 
          },
13198 
        },
13199 
      },
13200 
      'entityName' => 'x_x52',
13201 
    },
13202 
    'to_register27' => {
13203 
      'connections' => {
13204 
        'ce' => 'sysgen_dut.to_register27_ce',
13205 
        'clk' => 'sysgen_dut.to_register27_clk',
13206 
        'clr' => 'sysgen_dut.to_register27_clr',
13207 
        'data_in' => 'sysgen_dut.to_register27_data_in',
13208 
        'dout' => 'to_register27.dout',
13209 
        'en' => 'sysgen_dut.to_register27_en',
13210 
      },
13211 
      'entity' => {
13212 
        'attributes' => {
13213 
          'entityAlreadyNetlisted' => 1,
13214 
          'generics' => [
13215 
          ],
13216 
          'is_floating_block' => 1,
13217 
          'mask' => {
13218 
            'Block_Handle' => 2452.00048828125,
13219 
            'Block_handle' => 2452.00048828125,
13220 
            'MDL_Handle' => 2083.00048828125,
13221 
            'MDL_handle' => 2083.00048828125,
13222 
            'arith_type' => 1,
13223 
            'bin_pt' => 14,
13224 
            'block_config' => 'sysgen_blockset:toreg_config',
13225 
            'block_handle' => 2452.00048828125,
13226 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
13227 
            'block_type' => 'toreg',
13228 
            'dbl_ovrd' => 0,
13229 
            'explicit_data_type' => 0,
13230 
            'gui_display_data_type' => 1,
13231 
            'init' => 0,
13232 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13233 
            'mdl_handle' => 2083.00048828125,
13234 
            'model_handle' => 2083.00048828125,
13235 
            'n_bits' => 16,
13236 
            'ownership' => 1,
13237 
            'preci_type' => 1,
13238 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13239 
            'shared_memory_name' => 'register14rd',
13240 
          },
13241 
          'needs_vhdl_wrapper' => 0,
13242 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
13243 
        },
13244 
        'entityName' => 'x_x53',
13245 
        'ports' => {
13246 
          'ce' => {
13247 
            'attributes' => {
13248 
              'domain' => '',
13249 
              'group' => 1,
13250 
              'isCe' => 1,
13251 
              'is_floating_block' => 1,
13252 
              'period' => 1,
13253 
              'type' => 'logic',
13254 
            },
13255 
            'direction' => 'in',
13256 
            'hdlType' => 'std_logic',
13257 
            'width' => 1,
13258 
          },
13259 
          'clk' => {
13260 
            'attributes' => {
13261 
              'domain' => '',
13262 
              'group' => 1,
13263 
              'isClk' => 1,
13264 
              'is_floating_block' => 1,
13265 
              'period' => 1,
13266 
              'type' => 'logic',
13267 
            },
13268 
            'direction' => 'in',
13269 
            'hdlType' => 'std_logic',
13270 
            'width' => 1,
13271 
          },
13272 
          'clr' => {
13273 
            'attributes' => {
13274 
              'domain' => '',
13275 
              'group' => 1,
13276 
              'isClr' => 1,
13277 
              'is_floating_block' => 1,
13278 
              'period' => 1,
13279 
              'type' => 'logic',
13280 
              'valid_bit_used' => 0,
13281 
            },
13282 
            'direction' => 'in',
13283 
            'hdlType' => 'std_logic',
13284 
            'width' => 1,
13285 
          },
13286 
          'data_in' => {
13287 
            'attributes' => {
13288 
              'bin_pt' => 0,
13289 
              'is_floating_block' => 1,
13290 
              'must_be_hdl_vector' => 1,
13291 
              'period' => 1,
13292 
              'port_id' => 0,
13293 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
13294 
              'type' => 'UFix_32_0',
13295 
            },
13296 
            'direction' => 'in',
13297 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13298 
            'width' => 32,
13299 
          },
13300 
          'dout' => {
13301 
            'attributes' => {
13302 
              'bin_pt' => 0,
13303 
              'is_floating_block' => 1,
13304 
              'must_be_hdl_vector' => 1,
13305 
              'period' => 1,
13306 
              'port_id' => 0,
13307 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
13308 
              'type' => 'UFix_32_0',
13309 
            },
13310 
            'direction' => 'out',
13311 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13312 
            'width' => 32,
13313 
          },
13314 
          'en' => {
13315 
            'attributes' => {
13316 
              'bin_pt' => 0,
13317 
              'is_floating_block' => 1,
13318 
              'must_be_hdl_vector' => 1,
13319 
              'period' => 1,
13320 
              'port_id' => 1,
13321 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
13322 
              'type' => 'Bool',
13323 
            },
13324 
            'direction' => 'in',
13325 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13326 
            'width' => 1,
13327 
          },
13328 
        },
13329 
      },
13330 
      'entityName' => 'x_x53',
13331 
    },
13332 
    'to_register3' => {
13333 
      'connections' => {
13334 
        'ce' => 'sysgen_dut.to_register3_ce',
13335 
        'clk' => 'sysgen_dut.to_register3_clk',
13336 
        'clr' => 'sysgen_dut.to_register3_clr',
13337 
        'data_in' => 'sysgen_dut.to_register3_data_in',
13338 
        'dout' => 'to_register3.dout',
13339 
        'en' => 'sysgen_dut.to_register3_en',
13340 
      },
13341 
      'entity' => {
13342 
        'attributes' => {
13343 
          'entityAlreadyNetlisted' => 1,
13344 
          'generics' => [
13345 
          ],
13346 
          'is_floating_block' => 1,
13347 
          'mask' => {
13348 
            'Block_Handle' => 2453.00048828125,
13349 
            'Block_handle' => 2453.00048828125,
13350 
            'MDL_Handle' => 2083.00048828125,
13351 
            'MDL_handle' => 2083.00048828125,
13352 
            'arith_type' => 1,
13353 
            'bin_pt' => 14,
13354 
            'block_config' => 'sysgen_blockset:toreg_config',
13355 
            'block_handle' => 2453.00048828125,
13356 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13357 
            'block_type' => 'toreg',
13358 
            'dbl_ovrd' => 0,
13359 
            'explicit_data_type' => 0,
13360 
            'gui_display_data_type' => 1,
13361 
            'init' => 0,
13362 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13363 
            'mdl_handle' => 2083.00048828125,
13364 
            'model_handle' => 2083.00048828125,
13365 
            'n_bits' => 16,
13366 
            'ownership' => 1,
13367 
            'preci_type' => 1,
13368 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13369 
            'shared_memory_name' => 'register03rd',
13370 
          },
13371 
          'needs_vhdl_wrapper' => 0,
13372 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13373 
        },
13374 
        'entityName' => 'x_x54',
13375 
        'ports' => {
13376 
          'ce' => {
13377 
            'attributes' => {
13378 
              'domain' => '',
13379 
              'group' => 1,
13380 
              'isCe' => 1,
13381 
              'is_floating_block' => 1,
13382 
              'period' => 1,
13383 
              'type' => 'logic',
13384 
            },
13385 
            'direction' => 'in',
13386 
            'hdlType' => 'std_logic',
13387 
            'width' => 1,
13388 
          },
13389 
          'clk' => {
13390 
            'attributes' => {
13391 
              'domain' => '',
13392 
              'group' => 1,
13393 
              'isClk' => 1,
13394 
              'is_floating_block' => 1,
13395 
              'period' => 1,
13396 
              'type' => 'logic',
13397 
            },
13398 
            'direction' => 'in',
13399 
            'hdlType' => 'std_logic',
13400 
            'width' => 1,
13401 
          },
13402 
          'clr' => {
13403 
            'attributes' => {
13404 
              'domain' => '',
13405 
              'group' => 1,
13406 
              'isClr' => 1,
13407 
              'is_floating_block' => 1,
13408 
              'period' => 1,
13409 
              'type' => 'logic',
13410 
              'valid_bit_used' => 0,
13411 
            },
13412 
            'direction' => 'in',
13413 
            'hdlType' => 'std_logic',
13414 
            'width' => 1,
13415 
          },
13416 
          'data_in' => {
13417 
            'attributes' => {
13418 
              'bin_pt' => 0,
13419 
              'is_floating_block' => 1,
13420 
              'must_be_hdl_vector' => 1,
13421 
              'period' => 1,
13422 
              'port_id' => 0,
13423 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
13424 
              'type' => 'UFix_32_0',
13425 
            },
13426 
            'direction' => 'in',
13427 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13428 
            'width' => 32,
13429 
          },
13430 
          'dout' => {
13431 
            'attributes' => {
13432 
              'bin_pt' => 0,
13433 
              'is_floating_block' => 1,
13434 
              'must_be_hdl_vector' => 1,
13435 
              'period' => 1,
13436 
              'port_id' => 0,
13437 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
13438 
              'type' => 'UFix_32_0',
13439 
            },
13440 
            'direction' => 'out',
13441 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13442 
            'width' => 32,
13443 
          },
13444 
          'en' => {
13445 
            'attributes' => {
13446 
              'bin_pt' => 0,
13447 
              'is_floating_block' => 1,
13448 
              'must_be_hdl_vector' => 1,
13449 
              'period' => 1,
13450 
              'port_id' => 1,
13451 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
13452 
              'type' => 'Bool',
13453 
            },
13454 
            'direction' => 'in',
13455 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13456 
            'width' => 1,
13457 
          },
13458 
        },
13459 
      },
13460 
      'entityName' => 'x_x54',
13461 
    },
13462 
    'to_register4' => {
13463 
      'connections' => {
13464 
        'ce' => 'sysgen_dut.to_register4_ce',
13465 
        'clk' => 'sysgen_dut.to_register4_clk',
13466 
        'clr' => 'sysgen_dut.to_register4_clr',
13467 
        'data_in' => 'sysgen_dut.to_register4_data_in',
13468 
        'dout' => 'to_register4.dout',
13469 
        'en' => 'sysgen_dut.to_register4_en',
13470 
      },
13471 
      'entity' => {
13472 
        'attributes' => {
13473 
          'entityAlreadyNetlisted' => 1,
13474 
          'generics' => [
13475 
          ],
13476 
          'is_floating_block' => 1,
13477 
          'mask' => {
13478 
            'Block_Handle' => 2454.00048828125,
13479 
            'Block_handle' => 2454.00048828125,
13480 
            'MDL_Handle' => 2083.00048828125,
13481 
            'MDL_handle' => 2083.00048828125,
13482 
            'arith_type' => 1,
13483 
            'bin_pt' => 14,
13484 
            'block_config' => 'sysgen_blockset:toreg_config',
13485 
            'block_handle' => 2454.00048828125,
13486 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13487 
            'block_type' => 'toreg',
13488 
            'dbl_ovrd' => 0,
13489 
            'explicit_data_type' => 0,
13490 
            'gui_display_data_type' => 1,
13491 
            'init' => 0,
13492 
            'init_bit_vector' => '\'b0',
13493 
            'mdl_handle' => 2083.00048828125,
13494 
            'model_handle' => 2083.00048828125,
13495 
            'n_bits' => 16,
13496 
            'ownership' => 1,
13497 
            'preci_type' => 1,
13498 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13499 
            'shared_memory_name' => 'register02rv',
13500 
          },
13501 
          'needs_vhdl_wrapper' => 0,
13502 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13503 
        },
13504 
        'entityName' => 'x_x55',
13505 
        'ports' => {
13506 
          'ce' => {
13507 
            'attributes' => {
13508 
              'domain' => '',
13509 
              'group' => 1,
13510 
              'isCe' => 1,
13511 
              'is_floating_block' => 1,
13512 
              'period' => 1,
13513 
              'type' => 'logic',
13514 
            },
13515 
            'direction' => 'in',
13516 
            'hdlType' => 'std_logic',
13517 
            'width' => 1,
13518 
          },
13519 
          'clk' => {
13520 
            'attributes' => {
13521 
              'domain' => '',
13522 
              'group' => 1,
13523 
              'isClk' => 1,
13524 
              'is_floating_block' => 1,
13525 
              'period' => 1,
13526 
              'type' => 'logic',
13527 
            },
13528 
            'direction' => 'in',
13529 
            'hdlType' => 'std_logic',
13530 
            'width' => 1,
13531 
          },
13532 
          'clr' => {
13533 
            'attributes' => {
13534 
              'domain' => '',
13535 
              'group' => 1,
13536 
              'isClr' => 1,
13537 
              'is_floating_block' => 1,
13538 
              'period' => 1,
13539 
              'type' => 'logic',
13540 
              'valid_bit_used' => 0,
13541 
            },
13542 
            'direction' => 'in',
13543 
            'hdlType' => 'std_logic',
13544 
            'width' => 1,
13545 
          },
13546 
          'data_in' => {
13547 
            'attributes' => {
13548 
              'bin_pt' => 0,
13549 
              'is_floating_block' => 1,
13550 
              'must_be_hdl_vector' => 1,
13551 
              'period' => 1,
13552 
              'port_id' => 0,
13553 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
13554 
              'type' => 'Bool',
13555 
            },
13556 
            'direction' => 'in',
13557 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13558 
            'width' => 1,
13559 
          },
13560 
          'dout' => {
13561 
            'attributes' => {
13562 
              'bin_pt' => 0,
13563 
              'is_floating_block' => 1,
13564 
              'must_be_hdl_vector' => 1,
13565 
              'period' => 1,
13566 
              'port_id' => 0,
13567 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
13568 
              'type' => 'Bool',
13569 
            },
13570 
            'direction' => 'out',
13571 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13572 
            'width' => 1,
13573 
          },
13574 
          'en' => {
13575 
            'attributes' => {
13576 
              'bin_pt' => 0,
13577 
              'is_floating_block' => 1,
13578 
              'must_be_hdl_vector' => 1,
13579 
              'period' => 1,
13580 
              'port_id' => 1,
13581 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
13582 
              'type' => 'Bool',
13583 
            },
13584 
            'direction' => 'in',
13585 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13586 
            'width' => 1,
13587 
          },
13588 
        },
13589 
      },
13590 
      'entityName' => 'x_x55',
13591 
    },
13592 
    'to_register5' => {
13593 
      'connections' => {
13594 
        'ce' => 'sysgen_dut.to_register5_ce',
13595 
        'clk' => 'sysgen_dut.to_register5_clk',
13596 
        'clr' => 'sysgen_dut.to_register5_clr',
13597 
        'data_in' => 'sysgen_dut.to_register5_data_in',
13598 
        'dout' => 'to_register5.dout',
13599 
        'en' => 'sysgen_dut.to_register5_en',
13600 
      },
13601 
      'entity' => {
13602 
        'attributes' => {
13603 
          'entityAlreadyNetlisted' => 1,
13604 
          'generics' => [
13605 
          ],
13606 
          'is_floating_block' => 1,
13607 
          'mask' => {
13608 
            'Block_Handle' => 2455.00048828125,
13609 
            'Block_handle' => 2455.00048828125,
13610 
            'MDL_Handle' => 2083.00048828125,
13611 
            'MDL_handle' => 2083.00048828125,
13612 
            'arith_type' => 1,
13613 
            'bin_pt' => 14,
13614 
            'block_config' => 'sysgen_blockset:toreg_config',
13615 
            'block_handle' => 2455.00048828125,
13616 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13617 
            'block_type' => 'toreg',
13618 
            'dbl_ovrd' => 0,
13619 
            'explicit_data_type' => 0,
13620 
            'gui_display_data_type' => 1,
13621 
            'init' => 0,
13622 
            'init_bit_vector' => '\'b0',
13623 
            'mdl_handle' => 2083.00048828125,
13624 
            'model_handle' => 2083.00048828125,
13625 
            'n_bits' => 16,
13626 
            'ownership' => 1,
13627 
            'preci_type' => 1,
13628 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13629 
            'shared_memory_name' => 'register03rv',
13630 
          },
13631 
          'needs_vhdl_wrapper' => 0,
13632 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13633 
        },
13634 
        'entityName' => 'x_x56',
13635 
        'ports' => {
13636 
          'ce' => {
13637 
            'attributes' => {
13638 
              'domain' => '',
13639 
              'group' => 1,
13640 
              'isCe' => 1,
13641 
              'is_floating_block' => 1,
13642 
              'period' => 1,
13643 
              'type' => 'logic',
13644 
            },
13645 
            'direction' => 'in',
13646 
            'hdlType' => 'std_logic',
13647 
            'width' => 1,
13648 
          },
13649 
          'clk' => {
13650 
            'attributes' => {
13651 
              'domain' => '',
13652 
              'group' => 1,
13653 
              'isClk' => 1,
13654 
              'is_floating_block' => 1,
13655 
              'period' => 1,
13656 
              'type' => 'logic',
13657 
            },
13658 
            'direction' => 'in',
13659 
            'hdlType' => 'std_logic',
13660 
            'width' => 1,
13661 
          },
13662 
          'clr' => {
13663 
            'attributes' => {
13664 
              'domain' => '',
13665 
              'group' => 1,
13666 
              'isClr' => 1,
13667 
              'is_floating_block' => 1,
13668 
              'period' => 1,
13669 
              'type' => 'logic',
13670 
              'valid_bit_used' => 0,
13671 
            },
13672 
            'direction' => 'in',
13673 
            'hdlType' => 'std_logic',
13674 
            'width' => 1,
13675 
          },
13676 
          'data_in' => {
13677 
            'attributes' => {
13678 
              'bin_pt' => 0,
13679 
              'is_floating_block' => 1,
13680 
              'must_be_hdl_vector' => 1,
13681 
              'period' => 1,
13682 
              'port_id' => 0,
13683 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
13684 
              'type' => 'Bool',
13685 
            },
13686 
            'direction' => 'in',
13687 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13688 
            'width' => 1,
13689 
          },
13690 
          'dout' => {
13691 
            'attributes' => {
13692 
              'bin_pt' => 0,
13693 
              'is_floating_block' => 1,
13694 
              'must_be_hdl_vector' => 1,
13695 
              'period' => 1,
13696 
              'port_id' => 0,
13697 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
13698 
              'type' => 'Bool',
13699 
            },
13700 
            'direction' => 'out',
13701 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13702 
            'width' => 1,
13703 
          },
13704 
          'en' => {
13705 
            'attributes' => {
13706 
              'bin_pt' => 0,
13707 
              'is_floating_block' => 1,
13708 
              'must_be_hdl_vector' => 1,
13709 
              'period' => 1,
13710 
              'port_id' => 1,
13711 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
13712 
              'type' => 'Bool',
13713 
            },
13714 
            'direction' => 'in',
13715 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13716 
            'width' => 1,
13717 
          },
13718 
        },
13719 
      },
13720 
      'entityName' => 'x_x56',
13721 
    },
13722 
    'to_register6' => {
13723 
      'connections' => {
13724 
        'ce' => 'sysgen_dut.to_register6_ce',
13725 
        'clk' => 'sysgen_dut.to_register6_clk',
13726 
        'clr' => 'sysgen_dut.to_register6_clr',
13727 
        'data_in' => 'sysgen_dut.to_register6_data_in',
13728 
        'dout' => 'to_register6.dout',
13729 
        'en' => 'sysgen_dut.to_register6_en',
13730 
      },
13731 
      'entity' => {
13732 
        'attributes' => {
13733 
          'entityAlreadyNetlisted' => 1,
13734 
          'generics' => [
13735 
          ],
13736 
          'is_floating_block' => 1,
13737 
          'mask' => {
13738 
            'Block_Handle' => 2456.00048828125,
13739 
            'Block_handle' => 2456.00048828125,
13740 
            'MDL_Handle' => 2083.00048828125,
13741 
            'MDL_handle' => 2083.00048828125,
13742 
            'arith_type' => 1,
13743 
            'bin_pt' => 14,
13744 
            'block_config' => 'sysgen_blockset:toreg_config',
13745 
            'block_handle' => 2456.00048828125,
13746 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13747 
            'block_type' => 'toreg',
13748 
            'dbl_ovrd' => 0,
13749 
            'explicit_data_type' => 0,
13750 
            'gui_display_data_type' => 1,
13751 
            'init' => 0,
13752 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13753 
            'mdl_handle' => 2083.00048828125,
13754 
            'model_handle' => 2083.00048828125,
13755 
            'n_bits' => 16,
13756 
            'ownership' => 1,
13757 
            'preci_type' => 1,
13758 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13759 
            'shared_memory_name' => 'register04rd',
13760 
          },
13761 
          'needs_vhdl_wrapper' => 0,
13762 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13763 
        },
13764 
        'entityName' => 'x_x57',
13765 
        'ports' => {
13766 
          'ce' => {
13767 
            'attributes' => {
13768 
              'domain' => '',
13769 
              'group' => 1,
13770 
              'isCe' => 1,
13771 
              'is_floating_block' => 1,
13772 
              'period' => 1,
13773 
              'type' => 'logic',
13774 
            },
13775 
            'direction' => 'in',
13776 
            'hdlType' => 'std_logic',
13777 
            'width' => 1,
13778 
          },
13779 
          'clk' => {
13780 
            'attributes' => {
13781 
              'domain' => '',
13782 
              'group' => 1,
13783 
              'isClk' => 1,
13784 
              'is_floating_block' => 1,
13785 
              'period' => 1,
13786 
              'type' => 'logic',
13787 
            },
13788 
            'direction' => 'in',
13789 
            'hdlType' => 'std_logic',
13790 
            'width' => 1,
13791 
          },
13792 
          'clr' => {
13793 
            'attributes' => {
13794 
              'domain' => '',
13795 
              'group' => 1,
13796 
              'isClr' => 1,
13797 
              'is_floating_block' => 1,
13798 
              'period' => 1,
13799 
              'type' => 'logic',
13800 
              'valid_bit_used' => 0,
13801 
            },
13802 
            'direction' => 'in',
13803 
            'hdlType' => 'std_logic',
13804 
            'width' => 1,
13805 
          },
13806 
          'data_in' => {
13807 
            'attributes' => {
13808 
              'bin_pt' => 0,
13809 
              'is_floating_block' => 1,
13810 
              'must_be_hdl_vector' => 1,
13811 
              'period' => 1,
13812 
              'port_id' => 0,
13813 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
13814 
              'type' => 'UFix_32_0',
13815 
            },
13816 
            'direction' => 'in',
13817 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13818 
            'width' => 32,
13819 
          },
13820 
          'dout' => {
13821 
            'attributes' => {
13822 
              'bin_pt' => 0,
13823 
              'is_floating_block' => 1,
13824 
              'must_be_hdl_vector' => 1,
13825 
              'period' => 1,
13826 
              'port_id' => 0,
13827 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
13828 
              'type' => 'UFix_32_0',
13829 
            },
13830 
            'direction' => 'out',
13831 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13832 
            'width' => 32,
13833 
          },
13834 
          'en' => {
13835 
            'attributes' => {
13836 
              'bin_pt' => 0,
13837 
              'is_floating_block' => 1,
13838 
              'must_be_hdl_vector' => 1,
13839 
              'period' => 1,
13840 
              'port_id' => 1,
13841 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
13842 
              'type' => 'Bool',
13843 
            },
13844 
            'direction' => 'in',
13845 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13846 
            'width' => 1,
13847 
          },
13848 
        },
13849 
      },
13850 
      'entityName' => 'x_x57',
13851 
    },
13852 
    'to_register7' => {
13853 
      'connections' => {
13854 
        'ce' => 'sysgen_dut.to_register7_ce',
13855 
        'clk' => 'sysgen_dut.to_register7_clk',
13856 
        'clr' => 'sysgen_dut.to_register7_clr',
13857 
        'data_in' => 'sysgen_dut.to_register7_data_in',
13858 
        'dout' => 'to_register7.dout',
13859 
        'en' => 'sysgen_dut.to_register7_en',
13860 
      },
13861 
      'entity' => {
13862 
        'attributes' => {
13863 
          'entityAlreadyNetlisted' => 1,
13864 
          'generics' => [
13865 
          ],
13866 
          'is_floating_block' => 1,
13867 
          'mask' => {
13868 
            'Block_Handle' => 2457.00048828125,
13869 
            'Block_handle' => 2457.00048828125,
13870 
            'MDL_Handle' => 2083.00048828125,
13871 
            'MDL_handle' => 2083.00048828125,
13872 
            'arith_type' => 1,
13873 
            'bin_pt' => 14,
13874 
            'block_config' => 'sysgen_blockset:toreg_config',
13875 
            'block_handle' => 2457.00048828125,
13876 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13877 
            'block_type' => 'toreg',
13878 
            'dbl_ovrd' => 0,
13879 
            'explicit_data_type' => 0,
13880 
            'gui_display_data_type' => 1,
13881 
            'init' => 0,
13882 
            'init_bit_vector' => '\'b0',
13883 
            'mdl_handle' => 2083.00048828125,
13884 
            'model_handle' => 2083.00048828125,
13885 
            'n_bits' => 16,
13886 
            'ownership' => 1,
13887 
            'preci_type' => 1,
13888 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13889 
            'shared_memory_name' => 'register04rv',
13890 
          },
13891 
          'needs_vhdl_wrapper' => 0,
13892 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13893 
        },
13894 
        'entityName' => 'x_x58',
13895 
        'ports' => {
13896 
          'ce' => {
13897 
            'attributes' => {
13898 
              'domain' => '',
13899 
              'group' => 1,
13900 
              'isCe' => 1,
13901 
              'is_floating_block' => 1,
13902 
              'period' => 1,
13903 
              'type' => 'logic',
13904 
            },
13905 
            'direction' => 'in',
13906 
            'hdlType' => 'std_logic',
13907 
            'width' => 1,
13908 
          },
13909 
          'clk' => {
13910 
            'attributes' => {
13911 
              'domain' => '',
13912 
              'group' => 1,
13913 
              'isClk' => 1,
13914 
              'is_floating_block' => 1,
13915 
              'period' => 1,
13916 
              'type' => 'logic',
13917 
            },
13918 
            'direction' => 'in',
13919 
            'hdlType' => 'std_logic',
13920 
            'width' => 1,
13921 
          },
13922 
          'clr' => {
13923 
            'attributes' => {
13924 
              'domain' => '',
13925 
              'group' => 1,
13926 
              'isClr' => 1,
13927 
              'is_floating_block' => 1,
13928 
              'period' => 1,
13929 
              'type' => 'logic',
13930 
              'valid_bit_used' => 0,
13931 
            },
13932 
            'direction' => 'in',
13933 
            'hdlType' => 'std_logic',
13934 
            'width' => 1,
13935 
          },
13936 
          'data_in' => {
13937 
            'attributes' => {
13938 
              'bin_pt' => 0,
13939 
              'is_floating_block' => 1,
13940 
              'must_be_hdl_vector' => 1,
13941 
              'period' => 1,
13942 
              'port_id' => 0,
13943 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
13944 
              'type' => 'Bool',
13945 
            },
13946 
            'direction' => 'in',
13947 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13948 
            'width' => 1,
13949 
          },
13950 
          'dout' => {
13951 
            'attributes' => {
13952 
              'bin_pt' => 0,
13953 
              'is_floating_block' => 1,
13954 
              'must_be_hdl_vector' => 1,
13955 
              'period' => 1,
13956 
              'port_id' => 0,
13957 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
13958 
              'type' => 'Bool',
13959 
            },
13960 
            'direction' => 'out',
13961 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13962 
            'width' => 1,
13963 
          },
13964 
          'en' => {
13965 
            'attributes' => {
13966 
              'bin_pt' => 0,
13967 
              'is_floating_block' => 1,
13968 
              'must_be_hdl_vector' => 1,
13969 
              'period' => 1,
13970 
              'port_id' => 1,
13971 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
13972 
              'type' => 'Bool',
13973 
            },
13974 
            'direction' => 'in',
13975 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13976 
            'width' => 1,
13977 
          },
13978 
        },
13979 
      },
13980 
      'entityName' => 'x_x58',
13981 
    },
13982 
    'to_register8' => {
13983 
      'connections' => {
13984 
        'ce' => 'sysgen_dut.to_register8_ce',
13985 
        'clk' => 'sysgen_dut.to_register8_clk',
13986 
        'clr' => 'sysgen_dut.to_register8_clr',
13987 
        'data_in' => 'sysgen_dut.to_register8_data_in',
13988 
        'dout' => 'to_register8.dout',
13989 
        'en' => 'sysgen_dut.to_register8_en',
13990 
      },
13991 
      'entity' => {
13992 
        'attributes' => {
13993 
          'entityAlreadyNetlisted' => 1,
13994 
          'generics' => [
13995 
          ],
13996 
          'is_floating_block' => 1,
13997 
          'mask' => {
13998 
            'Block_Handle' => 2458.00048828125,
13999 
            'Block_handle' => 2458.00048828125,
14000 
            'MDL_Handle' => 2083.00048828125,
14001 
            'MDL_handle' => 2083.00048828125,
14002 
            'arith_type' => 1,
14003 
            'bin_pt' => 14,
14004 
            'block_config' => 'sysgen_blockset:toreg_config',
14005 
            'block_handle' => 2458.00048828125,
14006 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
14007 
            'block_type' => 'toreg',
14008 
            'dbl_ovrd' => 0,
14009 
            'explicit_data_type' => 0,
14010 
            'gui_display_data_type' => 1,
14011 
            'init' => 0,
14012 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
14013 
            'mdl_handle' => 2083.00048828125,
14014 
            'model_handle' => 2083.00048828125,
14015 
            'n_bits' => 16,
14016 
            'ownership' => 1,
14017 
            'preci_type' => 1,
14018 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
14019 
            'shared_memory_name' => 'register05rd',
14020 
          },
14021 
          'needs_vhdl_wrapper' => 0,
14022 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
14023 
        },
14024 
        'entityName' => 'x_x59',
14025 
        'ports' => {
14026 
          'ce' => {
14027 
            'attributes' => {
14028 
              'domain' => '',
14029 
              'group' => 1,
14030 
              'isCe' => 1,
14031 
              'is_floating_block' => 1,
14032 
              'period' => 1,
14033 
              'type' => 'logic',
14034 
            },
14035 
            'direction' => 'in',
14036 
            'hdlType' => 'std_logic',
14037 
            'width' => 1,
14038 
          },
14039 
          'clk' => {
14040 
            'attributes' => {
14041 
              'domain' => '',
14042 
              'group' => 1,
14043 
              'isClk' => 1,
14044 
              'is_floating_block' => 1,
14045 
              'period' => 1,
14046 
              'type' => 'logic',
14047 
            },
14048 
            'direction' => 'in',
14049 
            'hdlType' => 'std_logic',
14050 
            'width' => 1,
14051 
          },
14052 
          'clr' => {
14053 
            'attributes' => {
14054 
              'domain' => '',
14055 
              'group' => 1,
14056 
              'isClr' => 1,
14057 
              'is_floating_block' => 1,
14058 
              'period' => 1,
14059 
              'type' => 'logic',
14060 
              'valid_bit_used' => 0,
14061 
            },
14062 
            'direction' => 'in',
14063 
            'hdlType' => 'std_logic',
14064 
            'width' => 1,
14065 
          },
14066 
          'data_in' => {
14067 
            'attributes' => {
14068 
              'bin_pt' => 0,
14069 
              'is_floating_block' => 1,
14070 
              'must_be_hdl_vector' => 1,
14071 
              'period' => 1,
14072 
              'port_id' => 0,
14073 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
14074 
              'type' => 'UFix_32_0',
14075 
            },
14076 
            'direction' => 'in',
14077 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14078 
            'width' => 32,
14079 
          },
14080 
          'dout' => {
14081 
            'attributes' => {
14082 
              'bin_pt' => 0,
14083 
              'is_floating_block' => 1,
14084 
              'must_be_hdl_vector' => 1,
14085 
              'period' => 1,
14086 
              'port_id' => 0,
14087 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
14088 
              'type' => 'UFix_32_0',
14089 
            },
14090 
            'direction' => 'out',
14091 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14092 
            'width' => 32,
14093 
          },
14094 
          'en' => {
14095 
            'attributes' => {
14096 
              'bin_pt' => 0,
14097 
              'is_floating_block' => 1,
14098 
              'must_be_hdl_vector' => 1,
14099 
              'period' => 1,
14100 
              'port_id' => 1,
14101 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
14102 
              'type' => 'Bool',
14103 
            },
14104 
            'direction' => 'in',
14105 
            'hdlType' => 'std_logic_vector(0 downto 0)',
14106 
            'width' => 1,
14107 
          },
14108 
        },
14109 
      },
14110 
      'entityName' => 'x_x59',
14111 
    },
14112 
    'to_register9' => {
14113 
      'connections' => {
14114 
        'ce' => 'sysgen_dut.to_register9_ce',
14115 
        'clk' => 'sysgen_dut.to_register9_clk',
14116 
        'clr' => 'sysgen_dut.to_register9_clr',
14117 
        'data_in' => 'sysgen_dut.to_register9_data_in',
14118 
        'dout' => 'to_register9.dout',
14119 
        'en' => 'sysgen_dut.to_register9_en',
14120 
      },
14121 
      'entity' => {
14122 
        'attributes' => {
14123 
          'entityAlreadyNetlisted' => 1,
14124 
          'generics' => [
14125 
          ],
14126 
          'is_floating_block' => 1,
14127 
          'mask' => {
14128 
            'Block_Handle' => 2459.00048828125,
14129 
            'Block_handle' => 2459.00048828125,
14130 
            'MDL_Handle' => 2083.00048828125,
14131 
            'MDL_handle' => 2083.00048828125,
14132 
            'arith_type' => 1,
14133 
            'bin_pt' => 14,
14134 
            'block_config' => 'sysgen_blockset:toreg_config',
14135 
            'block_handle' => 2459.00048828125,
14136 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
14137 
            'block_type' => 'toreg',
14138 
            'dbl_ovrd' => 0,
14139 
            'explicit_data_type' => 0,
14140 
            'gui_display_data_type' => 1,
14141 
            'init' => 0,
14142 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
14143 
            'mdl_handle' => 2083.00048828125,
14144 
            'model_handle' => 2083.00048828125,
14145 
            'n_bits' => 16,
14146 
            'ownership' => 1,
14147 
            'preci_type' => 1,
14148 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
14149 
            'shared_memory_name' => 'register06rd',
14150 
          },
14151 
          'needs_vhdl_wrapper' => 0,
14152 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
14153 
        },
14154 
        'entityName' => 'x_x60',
14155 
        'ports' => {
14156 
          'ce' => {
14157 
            'attributes' => {
14158 
              'domain' => '',
14159 
              'group' => 1,
14160 
              'isCe' => 1,
14161 
              'is_floating_block' => 1,
14162 
              'period' => 1,
14163 
              'type' => 'logic',
14164 
            },
14165 
            'direction' => 'in',
14166 
            'hdlType' => 'std_logic',
14167 
            'width' => 1,
14168 
          },
14169 
          'clk' => {
14170 
            'attributes' => {
14171 
              'domain' => '',
14172 
              'group' => 1,
14173 
              'isClk' => 1,
14174 
              'is_floating_block' => 1,
14175 
              'period' => 1,
14176 
              'type' => 'logic',
14177 
            },
14178 
            'direction' => 'in',
14179 
            'hdlType' => 'std_logic',
14180 
            'width' => 1,
14181 
          },
14182 
          'clr' => {
14183 
            'attributes' => {
14184 
              'domain' => '',
14185 
              'group' => 1,
14186 
              'isClr' => 1,
14187 
              'is_floating_block' => 1,
14188 
              'period' => 1,
14189 
              'type' => 'logic',
14190 
              'valid_bit_used' => 0,
14191 
            },
14192 
            'direction' => 'in',
14193 
            'hdlType' => 'std_logic',
14194 
            'width' => 1,
14195 
          },
14196 
          'data_in' => {
14197 
            'attributes' => {
14198 
              'bin_pt' => 0,
14199 
              'is_floating_block' => 1,
14200 
              'must_be_hdl_vector' => 1,
14201 
              'period' => 1,
14202 
              'port_id' => 0,
14203 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
14204 
              'type' => 'UFix_32_0',
14205 
            },
14206 
            'direction' => 'in',
14207 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14208 
            'width' => 32,
14209 
          },
14210 
          'dout' => {
14211 
            'attributes' => {
14212 
              'bin_pt' => 0,
14213 
              'is_floating_block' => 1,
14214 
              'must_be_hdl_vector' => 1,
14215 
              'period' => 1,
14216 
              'port_id' => 0,
14217 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
14218 
              'type' => 'UFix_32_0',
14219 
            },
14220 
            'direction' => 'out',
14221 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14222 
            'width' => 32,
14223 
          },
14224 
          'en' => {
14225 
            'attributes' => {
14226 
              'bin_pt' => 0,
14227 
              'is_floating_block' => 1,
14228 
              'must_be_hdl_vector' => 1,
14229 
              'period' => 1,
14230 
              'port_id' => 1,
14231 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
14232 
              'type' => 'Bool',
14233 
            },
14234 
            'direction' => 'in',
14235 
            'hdlType' => 'std_logic_vector(0 downto 0)',
14236 
            'width' => 1,
14237 
          },
14238 
        },
14239 
      },
14240 
      'entityName' => 'x_x60',
14241 
    },
14242 
    'user_int_1o' => {
14243 
      'connections' => {
14244 
        'user_int_1o' => 'sysgen_dut.user_int_1o',
14245 
      },
14246 
      'entity' => {
14247 
        'attributes' => {
14248 
          'entityAlreadyNetlisted' => 1,
14249 
          'isGateway' => 1,
14250 
          'is_floating_block' => 1,
14251 
        },
14252 
        'entityName' => 'user_int_1o',
14253 
        'ports' => {
14254 
          'user_int_1o' => {
14255 
            'attributes' => {
14256 
              'bin_pt' => 0,
14257 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
14258 
              'is_floating_block' => 1,
14259 
              'is_gateway_port' => 1,
14260 
              'must_be_hdl_vector' => 1,
14261 
              'period' => 1,
14262 
              'port_id' => 0,
14263 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
14264 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
14265 
              'timingConstraint' => 'none',
14266 
              'type' => 'Bool',
14267 
            },
14268 
            'direction' => 'in',
14269 
            'hdlType' => 'std_logic',
14270 
            'width' => 1,
14271 
          },
14272 
        },
14273 
      },
14274 
      'entityName' => 'user_int_1o',
14275 
    },
14276 
    'user_int_2o' => {
14277 
      'connections' => {
14278 
        'user_int_2o' => 'sysgen_dut.user_int_2o',
14279 
      },
14280 
      'entity' => {
14281 
        'attributes' => {
14282 
          'entityAlreadyNetlisted' => 1,
14283 
          'isGateway' => 1,
14284 
          'is_floating_block' => 1,
14285 
        },
14286 
        'entityName' => 'user_int_2o',
14287 
        'ports' => {
14288 
          'user_int_2o' => {
14289 
            'attributes' => {
14290 
              'bin_pt' => 0,
14291 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
14292 
              'is_floating_block' => 1,
14293 
              'is_gateway_port' => 1,
14294 
              'must_be_hdl_vector' => 1,
14295 
              'period' => 1,
14296 
              'port_id' => 0,
14297 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
14298 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
14299 
              'timingConstraint' => 'none',
14300 
              'type' => 'Bool',
14301 
            },
14302 
            'direction' => 'in',
14303 
            'hdlType' => 'std_logic',
14304 
            'width' => 1,
14305 
          },
14306 
        },
14307 
      },
14308 
      'entityName' => 'user_int_2o',
14309 
    },
14310 
    'user_int_3o' => {
14311 
      'connections' => {
14312 
        'user_int_3o' => 'sysgen_dut.user_int_3o',
14313 
      },
14314 
      'entity' => {
14315 
        'attributes' => {
14316 
          'entityAlreadyNetlisted' => 1,
14317 
          'isGateway' => 1,
14318 
          'is_floating_block' => 1,
14319 
        },
14320 
        'entityName' => 'user_int_3o',
14321 
        'ports' => {
14322 
          'user_int_3o' => {
14323 
            'attributes' => {
14324 
              'bin_pt' => 0,
14325 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
14326 
              'is_floating_block' => 1,
14327 
              'is_gateway_port' => 1,
14328 
              'must_be_hdl_vector' => 1,
14329 
              'period' => 1,
14330 
              'port_id' => 0,
14331 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
14332 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
14333 
              'timingConstraint' => 'none',
14334 
              'type' => 'Bool',
14335 
            },
14336 
            'direction' => 'in',
14337 
            'hdlType' => 'std_logic',
14338 
            'width' => 1,
14339 
          },
14340 
        },
14341 
      },
14342 
      'entityName' => 'user_int_3o',
14343 
    },
14344 
  },
14345 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.