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[/] [pcie_sg_dma/] [trunk/] [rtl/] [v5pcieDMA.vhd] - Blame information for rev 2

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1 2 weng_ziti 
----------------------------------------------------------------------------------
2 
-- Company:  ziti, Uni. HD
3 
-- Engineer:  wgao
4 
--
5 
-- Create Date:    11:28:39 14 Oct 2008
6 
-- Design Name:
7 
-- Module Name:    v5pcieDMA - Behavioral
8 
-- Project Name:
9 
-- Target Devices:
10 
-- Tool versions:
11 
-- Description:
12 
--
13 
-- Dependencies:
14 
--
15 
-- Revision:
16 
--
17 
-- Revision 1.00 - first release.  18.10.2008
18 
--
19 
-- Additional Comments:
20 
--
21 
----------------------------------------------------------------------------------
22 
library IEEE;
23 
use IEEE.STD_LOGIC_1164.ALL;
24 
use IEEE.STD_LOGIC_ARITH.ALL;
25 
use IEEE.STD_LOGIC_UNSIGNED.ALL;
26 
 
27 
library work;
28 
use work.abb64Package.all;
29 
 
30 
---- Uncomment the following library declaration if instantiating
31 
---- any Xilinx primitives in this code.
32 
--library UNISIM;
33 
--use UNISIM.VComponents.all;
34 
 
35 
entity v5pcieDMA is
36 
    generic (
37 
          constant pcieLanes        : integer     := C_NUM_PCIE_LANES
38 
          );
39 
    Port (
40 
 
41 
          -- Optical links
42 
 
43 
          RXN_IN                        : IN  std_logic_vector(2-1 downto 0);
44 
          RXP_IN                        : IN  std_logic_vector(2-1 downto 0);
45 
          TXN_OUT                       : OUT std_logic_vector(2-1 downto 0);
46 
          TXP_OUT                       : OUT std_logic_vector(2-1 downto 0);
47 
 
48 
          Button_Rst                    : IN    std_logic;
49 
 
50 
 
51 
          -- DPR blinker
52 
          LEDs_IO_pin                   : OUT   std_logic_vector(7 downto 0);
53 
 
54 
 
55 
          refclkout                 : OUT   std_logic;
56 
 
57 
          -- PCIe transceivers
58 
          rx_pad_p                  : IN    std_logic_vector(pcieLanes - 1 downto 0);
59 
          rx_pad_n                  : IN    std_logic_vector(pcieLanes - 1 downto 0);
60 
          tx_pad_p                  : OUT   std_logic_vector(pcieLanes - 1 downto 0);
61 
          tx_pad_n                  : OUT   std_logic_vector(pcieLanes - 1 downto 0);
62 
 
63 
          -- Necessity signals
64 
          sys_clk_p                 : IN    std_logic;
65 
          sys_clk_n                 : IN    std_logic
66 
          );
67 
 
68 
end entity v5pcieDMA;
69 
 
70 
 
71 
architecture Behavioral of v5pcieDMA is
72 
 
73 
 
74 
------------- COMPONENT Declaration: v5pcie_ep_blk_plus_v1_9 ------
75 
-- 4 lane PCIe of Virtex 5
76 
 component v5pcie_ep_blk_plus_4x
77 
   port (
78 
 
79 
--
80 
-- PCI Express Fabric Interface
81 
--
82 
    pci_exp_rxn                : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
83 
    pci_exp_rxp                : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
84 
    pci_exp_txn                : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
85 
    pci_exp_txp                : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
86 
 
87 
--
88 
-- System ( SYS ) Interface
89 
--
90 
    sys_reset_n                : in  STD_LOGIC := 'X';
91 
    sys_clk                    : in  STD_LOGIC := 'X';
92 
    refclkout                  : out STD_LOGIC ;
93 
 
94 
--
95 
-- Transaction ( TRN ) Interface
96 
--
97 
    trn_clk                    : out STD_LOGIC;
98 
    trn_reset_n                : out STD_LOGIC;
99 
    trn_lnk_up_n               : out STD_LOGIC;
100 
 
101 
-- Tx Local-Link
102 
 
103 
    trn_tsof_n                 : in  STD_LOGIC := 'X';
104 
    trn_teof_n                 : in  STD_LOGIC := 'X';
105 
    trn_td                     : in  STD_LOGIC_VECTOR ( 63 downto 0 );
106 
    trn_trem_n                 : in  STD_LOGIC_VECTOR (  7 downto 0 );
107 
    trn_tsrc_rdy_n             : in  STD_LOGIC := 'X';
108 
    trn_tdst_rdy_n             : out STD_LOGIC;
109 
    trn_tbuf_av                : out STD_LOGIC_VECTOR (  3 downto 0 );
110 
    trn_terrfwd_n              : in  STD_LOGIC := 'X';
111 
    trn_tsrc_dsc_n             : in  STD_LOGIC := 'X';
112 
    trn_tdst_dsc_n             : out STD_LOGIC;
113 
 
114 
-- Rx Local-Link
115 
 
116 
    trn_rsof_n                 : out STD_LOGIC;
117 
    trn_reof_n                 : out STD_LOGIC;
118 
    trn_rd                     : out STD_LOGIC_VECTOR ( 63 downto 0 );
119 
    trn_rrem_n                 : out STD_LOGIC_VECTOR (  7 downto 0 );
120 
    trn_rbar_hit_n             : out STD_LOGIC_VECTOR (  6 downto 0 );
121 
    trn_rsrc_rdy_n             : out STD_LOGIC;
122 
    trn_rdst_rdy_n             : in  STD_LOGIC := 'X';
123 
    trn_rnp_ok_n               : in  STD_LOGIC := 'X';
124 
    trn_rerrfwd_n              : out STD_LOGIC;
125 
    trn_rsrc_dsc_n             : out STD_LOGIC;
126 
    trn_rfc_ph_av              : out STD_LOGIC_VECTOR (  7 downto 0 );
127 
    trn_rfc_pd_av              : out STD_LOGIC_VECTOR ( 11 downto 0 );
128 
    trn_rfc_nph_av             : out STD_LOGIC_VECTOR (  7 downto 0 );
129 
    trn_rfc_npd_av             : out STD_LOGIC_VECTOR ( 11 downto 0 );
130 
    trn_rcpl_streaming_n       : in  STD_LOGIC := 'X';
131 
 
132 
 
133 
--
134 
-- Host ( CFG ) Interface
135 
--
136 
 
137 
    cfg_do                     : out STD_LOGIC_VECTOR ( 31 downto 0 );
138 
    cfg_rd_wr_done_n           : out STD_LOGIC;
139 
    cfg_di                     : in  STD_LOGIC_VECTOR ( 31 downto 0 );
140 
    cfg_byte_en_n              : in  STD_LOGIC_VECTOR (  3 downto 0 );
141 
    cfg_dwaddr                 : in  STD_LOGIC_VECTOR (  9 downto 0 );
142 
    cfg_wr_en_n                : in  STD_LOGIC := 'X';
143 
    cfg_rd_en_n                : in  STD_LOGIC := 'X';
144 
 
145 
    cfg_err_cor_n              : in  STD_LOGIC := 'X';
146 
    cfg_err_ur_n               : in  STD_LOGIC := 'X';
147 
    cfg_err_cpl_rdy_n          : out STD_LOGIC;
148 
    cfg_err_ecrc_n             : in  STD_LOGIC := 'X';
149 
    cfg_err_cpl_timeout_n      : in  STD_LOGIC := 'X';
150 
    cfg_err_cpl_abort_n        : in  STD_LOGIC := 'X';
151 
    cfg_err_cpl_unexpect_n     : in  STD_LOGIC := 'X';
152 
    cfg_err_posted_n           : in  STD_LOGIC := 'X';
153 
    cfg_err_locked_n           : in  STD_LOGIC := 'X';
154 
    cfg_err_tlp_cpl_header     : in  STD_LOGIC_VECTOR ( 47 downto 0 );
155 
 
156 
 
157 
    cfg_interrupt_n            : in  STD_LOGIC := 'X';
158 
    cfg_interrupt_rdy_n        : out STD_LOGIC;
159 
    cfg_interrupt_assert_n     : in  STD_LOGIC := 'X';
160 
    cfg_interrupt_di           : in  STD_LOGIC_VECTOR (  7 downto 0 );
161 
    cfg_interrupt_do           : out STD_LOGIC_VECTOR (  7 downto 0 );
162 
    cfg_interrupt_msienable    : out STD_LOGIC;
163 
    cfg_interrupt_mmenable     : out STD_LOGIC_VECTOR (  2 downto 0 );
164 
 
165 
    cfg_pm_wake_n              : in  STD_LOGIC := 'X';
166 
    cfg_to_turnoff_n           : out STD_LOGIC;
167 
 
168 
    cfg_trn_pending_n          : in  STD_LOGIC := 'X';
169 
    cfg_pcie_link_state_n      : out STD_LOGIC_VECTOR (  2 downto 0 );
170 
    cfg_bus_number             : out STD_LOGIC_VECTOR (  7 downto 0 );
171 
    cfg_device_number          : out STD_LOGIC_VECTOR (  4 downto 0 );
172 
    cfg_function_number        : out STD_LOGIC_VECTOR (  2 downto 0 );
173 
    cfg_status                 : out STD_LOGIC_VECTOR ( 15 downto 0 );
174 
    cfg_command                : out STD_LOGIC_VECTOR ( 15 downto 0 );
175 
    cfg_dstatus                : out STD_LOGIC_VECTOR ( 15 downto 0 );
176 
    cfg_dcommand               : out STD_LOGIC_VECTOR ( 15 downto 0 );
177 
    cfg_lstatus                : out STD_LOGIC_VECTOR ( 15 downto 0 );
178 
    cfg_lcommand               : out STD_LOGIC_VECTOR ( 15 downto 0 );
179 
    cfg_dsn                    : in  STD_LOGIC_VECTOR ( 63 downto 0 );
180 
 
181 
    fast_train_simulation_only : in  STD_LOGIC := 'X'
182 
  );
183 
 end component;
184 
 
185 
 
186 
 
187 
-- -----------------------------------------------------------------------
188 
--  BRAM control module
189 
--
190 
   COMPONENT bram_Control
191 
   GENERIC (
192 
             C_ASYNFIFO_WIDTH  :  integer ;
193 
             P_SIMULATION      :  boolean
194 
            );
195 
   PORT (
196 
 
197 
 
198 
      -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
199 
      DDR_wr_sof               : IN    std_logic;
200 
      DDR_wr_eof               : IN    std_logic;
201 
      DDR_wr_v                 : IN    std_logic;
202 
      DDR_wr_FA                : IN    std_logic;
203 
      DDR_wr_Shift             : IN    std_logic;
204 
      DDR_wr_Mask              : IN    std_logic_vector(2-1 downto 0);
205 
      DDR_wr_din               : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
206 
      DDR_wr_full              : OUT   std_logic;
207 
 
208 
      DDR_rdc_sof              : IN    std_logic;
209 
      DDR_rdc_eof              : IN    std_logic;
210 
      DDR_rdc_v                : IN    std_logic;
211 
      DDR_rdc_FA               : IN    std_logic;
212 
      DDR_rdc_Shift            : IN    std_logic;
213 
      DDR_rdc_din              : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
214 
      DDR_rdc_full             : OUT   std_logic;
215 
 
216 
      -- DDR payload FIFO Read Port
217 
      DDR_FIFO_RdEn            : IN    std_logic;
218 
      DDR_FIFO_Empty           : OUT   std_logic;
219 
      DDR_FIFO_RdQout          : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
220 
--      DDR_rdD_sof              : OUT   std_logic;
221 
--      DDR_rdD_eof              : OUT   std_logic;
222 
--      DDR_rdDout_V             : OUT   std_logic;
223 
--      DDR_rdDout               : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
224 
 
225 
      -- Common interface
226 
      DBG_dma_start            : IN    std_logic;
227 
      DDR_Ready                : OUT   std_logic;
228 
      DDR_Blinker              : OUT   std_logic;
229 
      mem_clk                  : IN    std_logic;
230 
      trn_clk                  : IN    std_logic;
231 
      trn_reset_n              : IN    std_logic
232 
    );
233 
   END COMPONENT;
234 
 
235 
   signal    DDR_wr_sof               :  std_logic;
236 
   signal    DDR_wr_eof               :  std_logic;
237 
   signal    DDR_wr_v                 :  std_logic;
238 
   signal    DDR_wr_FA                :  std_logic;
239 
   signal    DDR_wr_Shift             :  std_logic;
240 
   signal    DDR_wr_Mask              :  std_logic_vector(2-1 downto 0);
241 
   signal    DDR_wr_din               :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
242 
   signal    DDR_wr_full              :  std_logic;
243 
 
244 
   signal    DDR_rdc_sof              :  std_logic;
245 
   signal    DDR_rdc_eof              :  std_logic;
246 
   signal    DDR_rdc_v                :  std_logic;
247 
   signal    DDR_rdc_FA               :  std_logic;
248 
   signal    DDR_rdc_Shift            :  std_logic;
249 
   signal    DDR_rdc_din              :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
250 
   signal    DDR_rdc_full             :  std_logic;
251 
 
252 
   signal    DDR_FIFO_RdEn            :  std_logic;
253 
   signal    DDR_FIFO_Empty           :  std_logic;
254 
   signal    DDR_FIFO_RdQout          :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
255 
 
256 
--   signal    DDR_rdD_sof              :  std_logic;
257 
--   signal    DDR_rdD_eof              :  std_logic;
258 
--   signal    DDR_rdDout_V             :  std_logic;
259 
--   signal    DDR_rdDout               :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
260 
 
261 
   signal    DDR_Ready                :  std_logic;
262 
   signal    DDR_Blinker              :  std_logic;
263 
   signal    DMA_ds_Start             :  std_logic;
264 
 
265 
--   signal    mem_clk                  :  std_logic;
266 
 
267 
   -- -----------------------------------------------------------------------
268 
   -- FIFO module
269 
   --      16K x 8B
270 
   component eb_wrapper
271 
     port (
272 
           wr_clk      : IN  std_logic;
273 
           wr_en       : IN  std_logic;
274 
           din         : IN  std_logic_VECTOR(72-1 downto 0);
275 
           pfull       : OUT std_logic;
276 
           full        : OUT std_logic;
277 
 
278 
           rd_clk      : IN  std_logic;
279 
           rd_en       : IN  std_logic;
280 
           dout        : OUT std_logic_VECTOR(72-1 downto 0);
281 
           pempty      : OUT std_logic;
282 
           empty       : OUT std_logic;
283 
 
284 
           data_count  : OUT std_logic_VECTOR(C_EMU_FIFO_DC_WIDTH-1 downto 0);
285 
           rst         : IN  std_logic
286 
           );
287 
   end component;
288 
 
289 
   signal   eb_wclk        :  std_logic;
290 
   signal   eb_we          :  std_logic;
291 
   signal   eb_wsof        :  std_logic;
292 
   signal   eb_weof        :  std_logic;
293 
   signal   eb_din         :  std_logic_VECTOR(72-1 downto 0);
294 
   signal   eb_pfull       :  std_logic;
295 
   signal   eb_full        :  std_logic;
296 
   signal   eb_rclk        :  std_logic;
297 
   signal   eb_re          :  std_logic;
298 
   signal   eb_dout        :  std_logic_VECTOR(72-1 downto 0);
299 
   signal   eb_pempty      :  std_logic;
300 
   signal   eb_empty       :  std_logic;
301 
   signal   eb_rst         :  std_logic;
302 
   signal   eb_FIFO_Status :  std_logic_VECTOR(C_DBUS_WIDTH-1 downto 0);
303 
   signal   eb_data_count  :  std_logic_vector(C_FIFO_DC_WIDTH+1 downto 0);
304 
   signal   pio_read_status:  std_logic;
305 
   signal   eb_FIFO_ow     :  std_logic;
306 
 
307 
   signal   self_feed_daq  :  std_logic;
308 
   signal   eb_we_up       :  std_logic;
309 
   signal   eb_din_up      :  std_logic_VECTOR(72-1 downto 0);
310 
 
311 
 
312 
   signal  tab_sel            : STD_LOGIC;
313 
   signal  tab_we             : STD_LOGIC_VECTOR (2-1 downto 0);
314 
   signal  tab_wa             : STD_LOGIC_VECTOR (12-1 downto 0);
315 
   signal  tab_wd             : STD_LOGIC_VECTOR (C_DBUS_WIDTH-1 downto 0);
316 
 
317 
   signal  dg_running         : STD_LOGIC;
318 
   signal  dg_mask            : STD_LOGIC;
319 
   signal  dg_rst             : STD_LOGIC;
320 
 
321 
   -- debug signal
322 
   signal  dg_debug_led       : STD_LOGIC;
323 
 
324 
   -- Protocol Interface module
325 
   COMPONENT protocol_IF
326 
   PORT (
327 
           -- DAQ Tx
328 
           data2send_start          : OUT   std_logic;
329 
           data2send_end            : OUT   std_logic;
330 
           data2send                : OUT   std_logic_vector(64-1 downto 0);
331 
           crc_error_send           : OUT   std_logic;
332 
           data2send_stop           : IN    std_logic;
333 
 
334 
           -- DAQ Rx
335 
           data_rec_start           : IN    std_logic;
336 
           data_rec_end             : IN    std_logic;
337 
           data_rec                 : IN    std_logic_vector(64-1 downto 0);
338 
           crc_error_rec            : IN    std_logic;
339 
           data_rec_stop            : OUT   std_logic;
340 
 
341 
           -- CTL Tx
342 
           ctrl2send_start          : OUT   std_logic;
343 
           ctrl2send_end            : OUT   std_logic;
344 
           ctrl2send                : OUT   std_logic_vector(16-1 downto 0);
345 
           ctrl2send_stop           : IN    std_logic;
346 
 
347 
           -- CTL Rx
348 
           ctrl_rec_start           : IN    std_logic;
349 
           ctrl_rec_end             : IN    std_logic;
350 
           ctrl_rec                 : IN    std_logic_vector(16-1 downto 0);
351 
           ctrl_rec_stop            : OUT   std_logic;
352 
 
353 
           -- DLM Tx
354 
           dlm2send_va              : OUT   std_logic;
355 
           dlm2send_type            : OUT   std_logic_vector(4-1 downto 0);
356 
 
357 
           -- DLM Rx
358 
           dlm_rec_va               : IN    std_logic;
359 
           dlm_rec_type             : IN    std_logic_vector(4-1 downto 0);
360 
 
361 
           -- Common signals
362 
           link_tx_clk              : IN    std_logic;
363 
           link_rx_clk              : IN    std_logic;
364 
           link_active              : IN    std_logic_vector(2-1 downto 0);
365 
           protocol_clk             : OUT   std_logic;
366 
           protocol_res_n           : OUT   std_logic;
367 
 
368 
           -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
369 
 
370 
           -- Fabric side: DAQ Rx
371 
           daq_rv                   : IN    std_logic;
372 
           daq_rsof                 : IN    std_logic;
373 
           daq_reof                 : IN    std_logic;
374 
           daq_rd                   : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
375 
           daq_rstop                : OUT   std_logic;
376 
 
377 
           -- Fabric side: DAQ Tx
378 
           daq_tv                   : OUT   std_logic;
379 
           daq_tsof                 : OUT   std_logic;
380 
           daq_teof                 : OUT   std_logic;
381 
           daq_td                   : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
382 
           daq_tstop                : IN    std_logic;
383 
 
384 
           -- Fabric side: DLM Rx
385 
           dlm_tv                   : IN    std_logic;
386 
           dlm_td                   : IN    std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
387 
 
388 
           -- Fabric side: DLM Tx
389 
           dlm_rv                   : OUT   std_logic;
390 
           dlm_rd                   : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
391 
 
392 
           -- Fabric side: CTL Rx
393 
           ctl_rv                   : IN    std_logic;
394 
           ctl_rd                   : IN    std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
395 
           ctl_rstop                : OUT   std_logic;
396 
 
397 
           -- Fabric side: CTL Tx
398 
           ctl_ttake                : IN    std_logic;
399 
           ctl_tv                   : OUT   std_logic;
400 
           ctl_td                   : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
401 
           ctl_tstop                : IN    std_logic;
402 
 
403 
           ctl_reset                : IN    std_logic;
404 
           ctl_status               : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
405 
 
406 
           -- Interrupter triggers
407 
           DAQ_irq                  : OUT   std_logic;
408 
           CTL_irq                  : OUT   std_logic;
409 
           DLM_irq                  : OUT   std_logic;
410 
 
411 
           -- Data generator table write port
412 
           tab_sel                  : IN    STD_LOGIC;
413 
           tab_we                   : IN    STD_LOGIC_VECTOR (2-1 downto 0);
414 
           tab_wa                   : IN    STD_LOGIC_VECTOR (12-1 downto 0);
415 
           tab_wd                   : IN    STD_LOGIC_VECTOR (64-1 downto 0);
416 
 
417 
           -- DG control/status signal
418 
           dg_running               : OUT   STD_LOGIC;
419 
           dg_mask                  : IN    STD_LOGIC;
420 
           dg_rst                   : IN    STD_LOGIC;
421 
 
422 
           -- DG debug signal
423 
           daq_start_led            : OUT   STD_LOGIC;
424 
 
425 
           -- Fabric side: Common signals
426 
           trn_clk                  : IN    std_logic;
427 
           protocol_link_act        : OUT   std_logic_vector(2-1 downto 0);
428 
           protocol_rst             : IN    std_logic
429 
    );
430 
   END COMPONENT;
431 
 
432 
   -- DAQ Tx
433 
   signal  data2send_start          : std_logic;
434 
   signal  data2send_end            : std_logic;
435 
   signal  data2send                : std_logic_vector(64-1 downto 0);
436 
   signal  crc_error_send           : std_logic;
437 
   signal  data2send_stop           : std_logic
438 
                                    := '0';
439 
 
440 
   -- DAQ Rx
441 
   signal  data_rec_start           : std_logic;
442 
   signal  data_rec_end             : std_logic;
443 
   signal  data_rec                 : std_logic_vector(64-1 downto 0);
444 
   signal  crc_error_rec            : std_logic;
445 
   signal  data_rec_stop            : std_logic;
446 
 
447 
   -- CTL Tx
448 
   signal  ctrl2send_start          : std_logic;
449 
   signal  ctrl2send_end            : std_logic;
450 
   signal  ctrl2send                : std_logic_vector(16-1 downto 0);
451 
   signal  ctrl2send_stop           : std_logic;
452 
 
453 
   -- CTL Rx
454 
   signal  ctrl_rec_start           : std_logic;
455 
   signal  ctrl_rec_end             : std_logic;
456 
   signal  ctrl_rec                 : std_logic_vector(16-1 downto 0);
457 
   signal  ctrl_rec_stop            : std_logic;
458 
 
459 
   -- DLM Tx
460 
   signal  dlm2send_va              : std_logic;
461 
   signal  dlm2send_type            : std_logic_vector(4-1 downto 0);
462 
--   signal  dlm2send_va_i            : std_logic;
463 
--   signal  dlm2send_type_i          : std_logic_vector(4-1 downto 0);
464 
 
465 
   -- DLM Rx
466 
   signal  dlm_rec_va               : std_logic;
467 
   signal  dlm_rec_type             : std_logic_vector(4-1 downto 0);
468 
--   signal  dlm_rec_va_i             : std_logic;
469 
--   signal  dlm_rec_type_i           : std_logic_vector(4-1 downto 0);
470 
 
471 
 
472 
   -- Common signals
473 
   signal  link_rx_clk              : std_logic;
474 
   signal  link_tx_clk              : std_logic;
475 
   signal  link_active              : std_logic_vector(2-1 downto 0);
476 
   signal  protocol_clk             : std_logic;
477 
   signal  protocol_res_n           : std_logic;
478 
 
479 
 
480 
   -- Fabric side: DAQ Rx
481 
   signal  daq_rv                   : std_logic;
482 
   signal  daq_rsof                 : std_logic;
483 
   signal  daq_reof                 : std_logic;
484 
   signal  daq_rd                   : std_logic_vector(C_DBUS_WIDTH-1 downto 0);
485 
   signal  daq_rstop                : std_logic;
486 
 
487 
   -- Fabric side: DAQ Tx
488 
   signal  daq_tv                   : std_logic;
489 
   signal  daq_tsof                 : std_logic;
490 
   signal  daq_teof                 : std_logic;
491 
   signal  daq_td                   : std_logic_vector(C_DBUS_WIDTH-1 downto 0);
492 
   signal  daq_tstop                : std_logic;
493 
 
494 
   -- Fabric side: DLM Rx
495 
   signal  dlm_tv                   : std_logic;
496 
   signal  dlm_td                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
497 
 
498 
   -- Fabric side: DLM Tx
499 
   signal  dlm_rv                   : std_logic;
500 
   signal  dlm_rd                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
501 
 
502 
   -- Fabric side: CTL Rx
503 
   signal  ctl_rv                   : std_logic;
504 
   signal  ctl_rd                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
505 
   signal  ctl_rstop                : std_logic;
506 
 
507 
   -- Fabric side: CTL Tx
508 
   signal  ctl_ttake                : std_logic;
509 
   signal  ctl_tv                   : std_logic;
510 
   signal  ctl_td                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
511 
   signal  ctl_tstop                : std_logic;
512 
 
513 
   signal  ctl_reset                : std_logic;
514 
   signal  ctl_status               : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
515 
 
516 
   -- Interrupter triggers
517 
   signal  DAQ_irq                  : std_logic;
518 
   signal  CTL_irq                  : std_logic;
519 
   signal  DLM_irq                  : std_logic;
520 
 
521 
   -- Fabric side: Common signals
522 
   signal  protocol_link_act        : std_logic_vector(2-1 downto 0);
523 
   signal  protocol_rst             : std_logic;
524 
 
525 
 
526 
   -- Pseudo link module, to be replaced by the real optical link
527 
   COMPONENT pseudo_protocol_module
528 
   PORT (
529 
         -- DAQ Tx
530 
         data2send_start          : IN    std_logic;
531 
         data2send_end            : IN    std_logic;
532 
         data2send                : IN    std_logic_vector(64-1 downto 0);
533 
         crc_error_send           : IN    std_logic;
534 
         data2send_stop           : OUT   std_logic;
535 
 
536 
         -- DAQ Rx
537 
         data_rec_start           : OUT   std_logic;
538 
         data_rec_end             : OUT   std_logic;
539 
         data_rec                 : OUT   std_logic_vector(64-1 downto 0);
540 
         crc_error_rec            : OUT   std_logic;
541 
         data_rec_stop            : IN    std_logic;
542 
 
543 
         -- CTL Tx
544 
         ctrl2send_start          : IN    std_logic;
545 
         ctrl2send_end            : IN    std_logic;
546 
         ctrl2send                : IN    std_logic_vector(16-1 downto 0);
547 
         ctrl2send_stop           : OUT   std_logic;
548 
 
549 
         -- CTL Rx
550 
         ctrl_rec_start           : OUT   std_logic;
551 
         ctrl_rec_end             : OUT   std_logic;
552 
         ctrl_rec                 : OUT   std_logic_vector(16-1 downto 0);
553 
         ctrl_rec_stop            : IN    std_logic;
554 
 
555 
         -- DLM Tx
556 
         dlm2send_va              : IN    std_logic;
557 
         dlm2send_type            : IN    std_logic_vector(4-1 downto 0);
558 
 
559 
         -- DLM Rx
560 
         dlm_rec_va               : OUT   std_logic;
561 
         dlm_rec_type             : OUT   std_logic_vector(4-1 downto 0);
562 
 
563 
         -- dummy pin input
564 
         dummy_pin_in             : IN    std_logic_vector(3-1 downto 0);
565 
 
566 
         -- Common interface
567 
         link_tx_clk              : OUT   std_logic;
568 
         link_rx_clk              : OUT   std_logic;
569 
         link_active              : OUT   std_logic_vector(2-1 downto 0);
570 
         clk                      : IN    std_logic;
571 
         res_n                    : IN    std_logic
572 
    );
573 
   END COMPONENT;
574 
 
575 
 
576 
   signal  Link_Buf_full             : std_logic;
577 
 
578 
 
579 
------------- COMPONENT Declaration: tlpControl   ------
580 
--
581 
 component tlpControl
582 
   port (
583 
        --  Test pin, emulating DDR data flow discontinuity
584 
        mbuf_UserFull                : IN  std_logic;
585 
        trn_Blinker                  : OUT std_logic;
586 
 
587 
        -- DCB protocol interface
588 
        protocol_link_act            : IN  std_logic_vector(2-1 downto 0);
589 
        protocol_rst                 : OUT std_logic;
590 
 
591 
        -- Interrupter triggers
592 
        DAQ_irq                      : IN  std_logic;
593 
        CTL_irq                      : IN  std_logic;
594 
        DLM_irq                      : IN  std_logic;
595 
 
596 
        -- Fabric side: CTL Rx
597 
        ctl_rv                       : OUT std_logic;
598 
        ctl_rd                       : OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
599 
 
600 
        -- Fabric side: CTL Tx
601 
        ctl_ttake                    : OUT std_logic;
602 
        ctl_tv                       : IN  std_logic;
603 
        ctl_td                       : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
604 
        ctl_tstop                    : OUT std_logic;
605 
 
606 
        ctl_reset                    : OUT std_logic;
607 
        ctl_status                   : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
608 
 
609 
        -- Fabric side: DLM Rx
610 
        dlm_tv                       : OUT std_logic;
611 
        dlm_td                       : OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
612 
 
613 
        -- Fabric side: DLM Tx
614 
        dlm_rv                       : IN  std_logic;
615 
        dlm_rd                       : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
616 
 
617 
        Link_Buf_full                : IN  std_logic;
618 
 
619 
        -- Event Buffer FIFO interface
620 
        eb_FIFO_we                   : OUT std_logic;
621 
        eb_FIFO_wsof                 : OUT std_logic;
622 
        eb_FIFO_weof                 : OUT std_logic;
623 
        eb_FIFO_din                  : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
624 
 
625 
        eb_FIFO_re                   : OUT std_logic;
626 
        eb_FIFO_empty                : IN  std_logic;
627 
        eb_FIFO_qout                 : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
628 
        eb_FIFO_data_count           : IN  std_logic_vector(C_FIFO_DC_WIDTH downto 0);
629 
 
630 
        eb_FIFO_ow                   : IN  std_logic;
631 
 
632 
        pio_reading_status           : OUT std_logic;
633 
        eb_FIFO_Status               : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
634 
        eb_FIFO_Rst                  : OUT std_logic;
635 
 
636 
        -- Debugging signals
637 
        DMA_us_Done                  : OUT std_logic;
638 
        DMA_us_Busy                  : OUT std_logic;
639 
        DMA_us_Busy_LED              : OUT std_logic;
640 
        DMA_ds_Done                  : OUT std_logic;
641 
        DMA_ds_Busy                  : OUT std_logic;
642 
        DMA_ds_Busy_LED              : OUT std_logic;
643 
        DMA_ds_Start                 : OUT std_logic;
644 
 
645 
        self_feed_daq                : OUT std_logic;
646 
 
647 
        -- DDR control interface
648 
        DDR_Ready                    : IN    std_logic;
649 
 
650 
        DDR_wr_sof                   : OUT   std_logic;
651 
        DDR_wr_eof                   : OUT   std_logic;
652 
        DDR_wr_v                     : OUT   std_logic;
653 
        DDR_wr_FA                    : OUT   std_logic;
654 
        DDR_wr_Shift                 : OUT   std_logic;
655 
        DDR_wr_Mask                  : OUT   std_logic_vector(2-1 downto 0);
656 
        DDR_wr_din                   : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
657 
        DDR_wr_full                  : IN    std_logic;
658 
 
659 
        DDR_rdc_sof                  : OUT   std_logic;
660 
        DDR_rdc_eof                  : OUT   std_logic;
661 
        DDR_rdc_v                    : OUT   std_logic;
662 
        DDR_rdc_FA                   : OUT   std_logic;
663 
        DDR_rdc_Shift                : OUT   std_logic;
664 
        DDR_rdc_din                  : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
665 
        DDR_rdc_full                 : IN    std_logic;
666 
 
667 
--        DDR_rdD_sof                  : IN    std_logic;
668 
--        DDR_rdD_eof                  : IN    std_logic;
669 
--        DDR_rdDout_V                 : IN    std_logic;
670 
--        DDR_rdDout                   : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
671 
 
672 
        -- DDR payload FIFO Read Port
673 
        DDR_FIFO_RdEn                : OUT std_logic;
674 
        DDR_FIFO_Empty               : IN  std_logic;
675 
        DDR_FIFO_RdQout              : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
676 
 
677 
        -- Data generator table write
678 
        tab_we                       : OUT std_logic_vector(2-1 downto 0);
679 
        tab_wa                       : OUT std_logic_vector(12-1 downto 0);
680 
        tab_wd                       : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
681 
 
682 
        -- Data generator control
683 
        DG_is_Running                : IN  std_logic;
684 
        DG_Reset                     : OUT std_logic;
685 
        DG_Mask                      : OUT std_logic;
686 
 
687 
        -- Transaction layer interface
688 
        trn_lnk_up_n                 : IN  std_logic;
689 
        trn_rsrc_dsc_n               : IN  std_logic;
690 
        trn_rnp_ok_n                 : OUT std_logic;
691 
        trn_tsrc_dsc_n               : OUT std_logic;
692 
        trn_tdst_dsc_n               : IN  std_logic;
693 
        trn_tbuf_av                  : IN  std_logic_vector(C_TBUF_AWIDTH-1 downto 0);
694 
        trn_terrfwd_n                : OUT std_logic;
695 
 
696 
        trn_clk                      : IN  std_logic;
697 
        trn_reset_n                  : IN  std_logic;
698 
        trn_rsrc_rdy_n               : IN  std_logic;
699 
        trn_tdst_rdy_n               : IN  std_logic;
700 
        trn_rsof_n                   : IN  std_logic;
701 
        trn_reof_n                   : IN  std_logic;
702 
        trn_rerrfwd_n                : IN  std_logic;
703 
        trn_rrem_n                   : IN  std_logic_vector(C_DBUS_WIDTH/8-1 downto 0);
704 
        trn_rd                       : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
705 
 
706 
        cfg_dcommand                 : IN  std_logic_vector(15 downto 0);
707 
        pcie_link_width              : IN  std_logic_vector( 5 downto 0);
708 
        localId                      : IN  std_logic_vector(15 downto 0);
709 
 
710 
        cfg_interrupt_n              : OUT std_logic;
711 
        cfg_interrupt_rdy_n          : IN  std_logic;
712 
        cfg_interrupt_mmenable       : IN  std_logic_vector(2 downto 0);
713 
        cfg_interrupt_msienable      : IN  std_logic;
714 
        cfg_interrupt_di             : OUT std_logic_vector(7 downto 0);
715 
        cfg_interrupt_do             : IN  std_logic_vector(7 downto 0);
716 
        cfg_interrupt_assert_n       : OUT std_logic;
717 
 
718 
        Format_Shower                : OUT   std_logic;
719 
 
720 
        trn_rbar_hit_n               : IN  std_logic_vector(6 downto 0);
721 
        trn_tsrc_rdy_n               : OUT std_logic;
722 
        trn_rdst_rdy_n               : OUT std_logic;
723 
        trn_tsof_n                   : OUT std_logic;
724 
        trn_teof_n                   : OUT std_logic;
725 
        trn_trem_n                   : OUT std_logic_vector(C_DBUS_WIDTH/8-1 downto 0);
726 
        trn_td                       : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0)
727 
        );
728 
 end component;
729 
 
730 
 signal   Format_Shower              : std_logic;
731 
 
732 
 component BUFG is
733 
   port(
734 
        I : IN  std_logic;
735 
        O : OUT std_logic
736 
        );
737 
 end component;
738 
 
739 
 component ibuf is
740 
   port(
741 
        i : IN  std_logic;
742 
        o : OUT std_logic
743 
        );
744 
 end component;
745 
 
746 
 component IBUFDS is
747 
   port(
748 
        i  : IN  std_logic;
749 
        ib : IN  std_logic;
750 
        o  : OUT std_logic
751 
        );
752 
 end component;
753 
 
754 
 component GT11CLK_MGT is
755 
   port(
756 
        mgtclkp     : IN  std_logic;
757 
        mgtclkn     : IN  std_logic;
758 
        synclk1out  : OUT std_logic;
759 
        synclk2out  : OUT std_logic
760 
        );
761 
 end component;
762 
 
763 
 
764 
-- constant unusedMgtHasClk           : integer := 1;
765 
  -- signals
766 
 
767 
  signal trn_clk                     : std_logic;
768 
  signal trn_reset_n                 : std_logic;
769 
  signal trn_lnk_up_n                : std_logic;
770 
  signal trn_td                      : std_logic_vector(63 downto 0);
771 
  signal trn_trem_n                  : std_logic_vector(7 downto 0);
772 
  signal trn_tsof_n                  : std_logic;
773 
  signal trn_teof_n                  : std_logic;
774 
  signal trn_tsrc_rdy_n              : std_logic;
775 
  signal trn_tdst_rdy_n              : std_logic;
776 
  signal trn_tdst_dsc_n              : std_logic;
777 
  signal trn_tsrc_dsc_n              : std_logic;
778 
  signal trn_terrfwd_n               : std_logic;
779 
  signal trn_tbuf_av                 : std_logic_vector(3 downto 0);
780 
  signal trn_rd                      : std_logic_vector(63 downto 0);
781 
  signal trn_rrem_n                  : std_logic_vector(7 downto 0);
782 
  signal trn_rsof_n                  : std_logic;
783 
  signal trn_reof_n                  : std_logic;
784 
  signal trn_rsrc_rdy_n              : std_logic;
785 
  signal trn_rsrc_dsc_n              : std_logic;
786 
  signal trn_rdst_rdy_n              : std_logic;
787 
  signal trn_rerrfwd_n               : std_logic;
788 
  signal trn_rnp_ok_n                : std_logic;
789 
  signal trn_rbar_hit_n              : std_logic_vector(6 downto 0);
790 
  signal trn_rfc_nph_av              : std_logic_vector(7 downto 0);
791 
  signal trn_rfc_npd_av              : std_logic_vector(11 downto 0);
792 
  signal trn_rfc_ph_av               : std_logic_vector(7 downto 0);
793 
  signal trn_rfc_pd_av               : std_logic_vector(11 downto 0);
794 
  signal trn_rfc_cplh_av             : std_logic_vector(7 downto 0);
795 
  signal trn_rfc_cpld_av             : std_logic_vector(11 downto 0);
796 
  signal trn_rcpl_streaming_n        : std_logic;
797 
  signal cfg_do                      : std_logic_vector(31 downto 0);
798 
  signal cfg_rd_wr_done_n            : std_logic;
799 
  signal cfg_di                      : std_logic_vector(31 downto 0);
800 
  signal cfg_byte_en_n               : std_logic_vector(3 downto 0);
801 
  signal cfg_dwaddr                  : std_logic_vector(9 downto 0);
802 
  signal cfg_wr_en_n                 : std_logic;
803 
  signal cfg_rd_en_n                 : std_logic;
804 
  signal cfg_err_cor_n               : std_logic;
805 
  signal cfg_err_ur_n                : std_logic;
806 
  signal cfg_err_cpl_rdy_n           : std_logic;
807 
  signal cfg_err_ecrc_n              : std_logic;
808 
  signal cfg_err_cpl_timeout_n       : std_logic;
809 
  signal cfg_err_cpl_abort_n         : std_logic;
810 
  signal cfg_err_cpl_unexpect_n      : std_logic;
811 
  signal cfg_err_posted_n            : std_logic;
812 
  signal cfg_err_locked_n            : std_logic;
813 
  signal cfg_err_tlp_cpl_header      : std_logic_vector(47 downto 0);
814 
  signal cfg_interrupt_n             : std_logic;
815 
  signal cfg_interrupt_rdy_n         : std_logic;
816 
  signal cfg_interrupt_mmenable      : std_logic_vector(2 downto 0);
817 
  signal cfg_interrupt_msienable     : std_logic;
818 
  signal cfg_interrupt_di            : std_logic_vector(7 downto 0);
819 
  signal cfg_interrupt_do            : std_logic_vector(7 downto 0);
820 
  signal cfg_interrupt_assert_n      : std_logic;
821 
  signal cfg_turnoff_ok_n            : std_logic;
822 
  signal cfg_to_turnoff_n            : std_logic;
823 
  signal cfg_pm_wake_n               : std_logic;
824 
  signal cfg_pcie_link_state_n       : std_logic_vector(2 downto 0);
825 
  signal cfg_trn_pending_n           : std_logic;
826 
  signal cfg_bus_number              : std_logic_vector(7 downto 0);
827 
  signal cfg_device_number           : std_logic_vector(4 downto 0);
828 
  signal cfg_function_number         : std_logic_vector(2 downto 0);
829 
  signal cfg_dsn                     : std_logic_vector(63 downto 0);
830 
  signal cfg_status                  : std_logic_vector(15 downto 0);
831 
  signal cfg_command                 : std_logic_vector(15 downto 0);
832 
  signal cfg_dstatus                 : std_logic_vector(15 downto 0);
833 
  signal cfg_dcommand                : std_logic_vector(15 downto 0);
834 
  signal cfg_lstatus                 : std_logic_vector(15 downto 0);
835 
  signal cfg_lcommand                : std_logic_vector(15 downto 0);
836 
  signal fast_train_simulation_only  : std_logic;
837 
  signal two_plm_auto_config         : std_logic_vector(1 downto 0);
838 
  signal sys_clk                     : std_logic;
839 
  signal reset_n                     : std_logic;
840 
 
841 
  signal localId                     : std_logic_vector(15 downto 0);
842 
  signal pcie_link_width             : std_logic_vector( 5 downto 0);
843 
 
844 
  signal synclk2out                  : std_logic;
845 
 
846 
 
847 
  --
848 
  signal   trn_Blinker          : std_logic;
849 
 
850 
 
851 
begin
852 
 
853 
 
854 
--   rstBuf: ibuf
855 
--      port map ( I => sys_reset_n,
856 
--                 O => reset_n
857 
--                 );
858 
 
859 
   refclk_ibuf : IBUFDS
860 
      port map (
861 
                 O  => sys_clk,
862 
                 I  => sys_clk_p,
863 
                 IB => sys_clk_n
864 
                );
865 
 
866 
 
867 
--   sys_clk_mgt: GT11CLK_MGT
868 
--      port map (
869 
--                mgtclkp    => sys_clk_p,
870 
--                mgtclkn    => sys_clk_n,
871 
--                synclk1out => sys_clk,
872 
--                synclk2out => synclk2out -- open
873 
--                );
874 
 
875 
 
876 
   fast_train_simulation_only <= '0';
877 
 
878 
--   trn_rcpl_streaming_n       <= '0';      -- ??
879 
--
880 
--
881 
--   cfg_err_cor_n              <= '1';
882 
--   cfg_err_ur_n               <= '1';
883 
--   cfg_err_ecrc_n             <= '1';
884 
--   cfg_err_cpl_timeout_n      <= '1';
885 
--   cfg_err_cpl_abort_n        <= '1';
886 
--   cfg_err_cpl_unexpect_n     <= '1';
887 
--   cfg_err_posted_n           <= '1';
888 
--   cfg_pm_wake_n              <= '1';
889 
--   cfg_trn_pending_n          <= '1';
890 
--   cfg_dwaddr                 <= (others => '0');
891 
--   cfg_err_tlp_cpl_header     <= (others => '0');
892 
--   cfg_di                     <= (others => '0');
893 
--   cfg_byte_en_n              <= (others => '1');
894 
--   cfg_wr_en_n                <= '1';
895 
--   cfg_rd_en_n                <= '1';
896 
--   cfg_dsn                    <= (63 => '1', 0 => '1', others => '0');
897 
--
898 
----   two_plm_auto_config        <= (others => '0');
899 
----   cfg_turnoff_ok_n           <= '1' when reset_n = '0' else
900 
----                                 '0' when cfg_to_turnoff_n = '0' -- and trn_pending = '0'
901 
----                                     else '1';                   -- !! pending completion should be checked
902 
 
903 
 
904 
--//
905 
--// Core input tie-offs
906 
--//
907 
 
908 
--   trn_rnp_ok_n <= '0';
909 
--   trn_terrfwd_n <= '1';
910 
 
911 
   cfg_err_cor_n          <= '1';
912 
   cfg_err_ur_n           <= '1';
913 
   cfg_err_ecrc_n         <= '1';
914 
   cfg_err_cpl_timeout_n  <= '1';
915 
   cfg_err_cpl_abort_n    <= '1';
916 
   cfg_err_cpl_unexpect_n <= '1';
917 
   cfg_err_posted_n       <= '0';
918 
   cfg_pm_wake_n          <= '1';
919 
   cfg_trn_pending_n      <= '1';
920 
 
921 
--   cfg_interrupt_di       <= (OTHERS=>'0');
922 
 
923 
   cfg_err_tlp_cpl_header <= (OTHERS=>'0');
924 
   cfg_di                 <= (OTHERS=>'0');
925 
   cfg_byte_en_n          <= X"f";
926 
   cfg_wr_en_n            <= '1';
927 
   cfg_rd_en_n            <= '1';
928 
   cfg_dsn <= X"00000001" &  X"01" & X"000A35";   -- //this is taken from GUI -
929 
 
930 
 
931 
   localId                    <= cfg_bus_number & cfg_device_number & cfg_function_number;
932 
 
933 
   pcie_link_width            <= cfg_lstatus(9 downto 4);
934 
 
935 
 
936 
-- --------------------------------------------------------------
937 
-- --------------------------------------------------------------
938 
 
939 
 
940 
   make4Lanes: if pcieLanes = 4 generate
941 
      pcieCore : v5pcie_ep_blk_plus_4x
942 
         port map (
943 
--
944 
-- PCI Express Fabric Interface
945 
--
946 
    pci_exp_txn                => tx_pad_n,   -- in  STD_LOGIC_VECTOR (  3 downto 0 );
947 
    pci_exp_txp                => tx_pad_p,   -- in  STD_LOGIC_VECTOR (  3 downto 0 );
948 
    pci_exp_rxn                => rx_pad_n,   -- out STD_LOGIC_VECTOR (  3 downto 0 );
949 
    pci_exp_rxp                => rx_pad_p,   -- out STD_LOGIC_VECTOR (  3 downto 0 );
950 
 
951 
--
952 
-- System ( SYS ) Interface
953 
--
954 
    sys_reset_n                => '1' ,  --reset_n,    -- sys_reset_n                ,   -- in  STD_LOGIC := 'X';
955 
    sys_clk                    => sys_clk                    ,   -- in  STD_LOGIC := 'X';
956 
    refclkout                  => refclkout                  ,   -- out STD_LOGIC ;
957 
 
958 
--
959 
-- Transaction ( TRN ) Interface
960 
--
961 
    trn_clk                    => trn_clk                    ,   -- out STD_LOGIC;
962 
    trn_reset_n                => trn_reset_n                ,   -- out STD_LOGIC;
963 
    trn_lnk_up_n               => trn_lnk_up_n               ,   -- out STD_LOGIC;
964 
 
965 
-- Tx Local-Link
966 
 
967 
    trn_tsof_n                 => trn_tsof_n                 ,   -- in  STD_LOGIC := 'X';
968 
    trn_teof_n                 => trn_teof_n                 ,   -- in  STD_LOGIC := 'X';
969 
    trn_td                     => trn_td                     ,   -- in  STD_LOGIC_VECTOR ( 63 downto 0 );
970 
    trn_trem_n                 => trn_trem_n                 ,   -- in  STD_LOGIC_VECTOR (  7 downto 0 );
971 
    trn_tsrc_rdy_n             => trn_tsrc_rdy_n             ,   -- in  STD_LOGIC := 'X';
972 
    trn_tdst_rdy_n             => trn_tdst_rdy_n             ,   -- out STD_LOGIC;
973 
    trn_tbuf_av                => trn_tbuf_av                ,   -- out STD_LOGIC_VECTOR (  3 downto 0 );
974 
    trn_terrfwd_n              => trn_terrfwd_n              ,   -- in  STD_LOGIC := 'X';
975 
    trn_tsrc_dsc_n             => trn_tsrc_dsc_n             ,   -- in  STD_LOGIC := 'X';
976 
    trn_tdst_dsc_n             => trn_tdst_dsc_n             ,   -- out STD_LOGIC;
977 
 
978 
-- Rx Local-Link
979 
 
980 
    trn_rsof_n                 => trn_rsof_n                 ,   -- out STD_LOGIC;
981 
    trn_reof_n                 => trn_reof_n                 ,   -- out STD_LOGIC;
982 
    trn_rd                     => trn_rd                     ,   -- out STD_LOGIC_VECTOR ( 63 downto 0 );
983 
    trn_rrem_n                 => trn_rrem_n                 ,   -- out STD_LOGIC_VECTOR (  7 downto 0 );
984 
    trn_rbar_hit_n             => trn_rbar_hit_n             ,   -- out STD_LOGIC_VECTOR (  6 downto 0 );
985 
    trn_rsrc_rdy_n             => trn_rsrc_rdy_n             ,   -- out STD_LOGIC;
986 
    trn_rdst_rdy_n             => trn_rdst_rdy_n             ,   -- in  STD_LOGIC := 'X';
987 
    trn_rnp_ok_n               => trn_rnp_ok_n               ,   -- in  STD_LOGIC := 'X';
988 
    trn_rerrfwd_n              => trn_rerrfwd_n              ,   -- out STD_LOGIC;
989 
    trn_rsrc_dsc_n             => trn_rsrc_dsc_n             ,   -- out STD_LOGIC;
990 
    trn_rfc_ph_av              => trn_rfc_ph_av              ,   -- out STD_LOGIC_VECTOR (  7 downto 0 );
991 
    trn_rfc_pd_av              => trn_rfc_pd_av              ,   -- out STD_LOGIC_VECTOR ( 11 downto 0 );
992 
    trn_rfc_nph_av             => trn_rfc_nph_av             ,   -- out STD_LOGIC_VECTOR (  7 downto 0 );
993 
    trn_rfc_npd_av             => trn_rfc_npd_av             ,   -- out STD_LOGIC_VECTOR ( 11 downto 0 );
994 
    trn_rcpl_streaming_n       => trn_rcpl_streaming_n       ,   -- in  STD_LOGIC := 'X';
995 
 
996 
--
997 
-- Host ( CFG ) Interface
998 
--
999 
 
1000 
    cfg_do                     => cfg_do                     ,   -- out STD_LOGIC_VECTOR ( 31 downto 0 );
1001 
    cfg_rd_wr_done_n           => cfg_rd_wr_done_n           ,   -- out STD_LOGIC;
1002 
    cfg_di                     => cfg_di                     ,   -- in  STD_LOGIC_VECTOR ( 31 downto 0 );
1003 
    cfg_byte_en_n              => cfg_byte_en_n              ,   -- in  STD_LOGIC_VECTOR (  3 downto 0 );
1004 
    cfg_dwaddr                 => cfg_dwaddr                 ,   -- in  STD_LOGIC_VECTOR (  9 downto 0 );
1005 
    cfg_wr_en_n                => cfg_wr_en_n                ,   -- in  STD_LOGIC := 'X';
1006 
    cfg_rd_en_n                => cfg_rd_en_n                ,   -- in  STD_LOGIC := 'X';
1007 
 
1008 
    cfg_err_cor_n              => cfg_err_cor_n              ,   -- in  STD_LOGIC := 'X';
1009 
    cfg_err_ur_n               => cfg_err_ur_n               ,   -- in  STD_LOGIC := 'X';
1010 
    cfg_err_cpl_rdy_n          => cfg_err_cpl_rdy_n          ,   -- out STD_LOGIC;
1011 
    cfg_err_ecrc_n             => cfg_err_ecrc_n             ,   -- in  STD_LOGIC := 'X';
1012 
    cfg_err_cpl_timeout_n      => cfg_err_cpl_timeout_n      ,   -- in  STD_LOGIC := 'X';
1013 
    cfg_err_cpl_abort_n        => cfg_err_cpl_abort_n        ,   -- in  STD_LOGIC := 'X';
1014 
    cfg_err_cpl_unexpect_n     => cfg_err_cpl_unexpect_n     ,   -- in  STD_LOGIC := 'X';
1015 
    cfg_err_posted_n           => cfg_err_posted_n           ,   -- in  STD_LOGIC := 'X';
1016 
    cfg_err_locked_n           => cfg_err_locked_n           ,   -- in  STD_LOGIC := 'X';
1017 
    cfg_err_tlp_cpl_header     => cfg_err_tlp_cpl_header     ,   -- in  STD_LOGIC_VECTOR ( 47 downto 0 );
1018 
 
1019 
    cfg_interrupt_n            => cfg_interrupt_n            ,   -- in  STD_LOGIC := 'X';
1020 
    cfg_interrupt_rdy_n        => cfg_interrupt_rdy_n        ,   -- out STD_LOGIC;
1021 
    cfg_interrupt_assert_n     => cfg_interrupt_assert_n     ,   -- in  STD_LOGIC := 'X';
1022 
    cfg_interrupt_di           => cfg_interrupt_di           ,   -- in  STD_LOGIC_VECTOR (  7 downto 0 );
1023 
    cfg_interrupt_do           => cfg_interrupt_do           ,   -- out STD_LOGIC_VECTOR (  7 downto 0 );
1024 
    cfg_interrupt_msienable    => cfg_interrupt_msienable    ,   -- out STD_LOGIC;
1025 
    cfg_interrupt_mmenable     => cfg_interrupt_mmenable     ,   -- out STD_LOGIC_VECTOR (  2 downto 0 );
1026 
 
1027 
    cfg_pm_wake_n              => cfg_pm_wake_n              ,   -- in  STD_LOGIC := 'X';
1028 
    cfg_to_turnoff_n           => cfg_to_turnoff_n           ,   -- out STD_LOGIC;
1029 
 
1030 
    cfg_trn_pending_n          => cfg_trn_pending_n          ,   -- in  STD_LOGIC := 'X';
1031 
    cfg_pcie_link_state_n      => cfg_pcie_link_state_n      ,   -- out STD_LOGIC_VECTOR (  2 downto 0 );
1032 
    cfg_bus_number             => cfg_bus_number             ,   -- out STD_LOGIC_VECTOR (  7 downto 0 );
1033 
    cfg_device_number          => cfg_device_number          ,   -- out STD_LOGIC_VECTOR (  4 downto 0 );
1034 
    cfg_function_number        => cfg_function_number        ,   -- out STD_LOGIC_VECTOR (  2 downto 0 );
1035 
    cfg_status                 => cfg_status                 ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1036 
    cfg_command                => cfg_command                ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1037 
    cfg_dstatus                => cfg_dstatus                ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1038 
    cfg_dcommand               => cfg_dcommand               ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1039 
    cfg_lstatus                => cfg_lstatus                ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1040 
    cfg_lcommand               => cfg_lcommand               ,   -- out STD_LOGIC_VECTOR ( 15 downto 0 );
1041 
    cfg_dsn                    => cfg_dsn                    ,   -- in  STD_LOGIC_VECTOR ( 63 downto 0 );
1042 
 
1043 
    fast_train_simulation_only => fast_train_simulation_only     -- in  STD_LOGIC := 'X'
1044 
 
1045 
    );
1046 
 
1047 
--    trn_td (63 downto 32) <= not trn_td (31 downto 0);
1048 
 
1049 
   end generate;
1050 
 
1051 
 
1052 
 
1053 
   DAQ_irq              <= eb_empty;
1054 
 
1055 
 
1056 
-- ---------------------------------------------------------------
1057 
-- tlp control module
1058 
--
1059 
   theTlpControl:
1060 
   tlpControl
1061 
   port map (
1062 
 
1063 
           mbuf_UserFull               => '0'                 ,
1064 
           trn_Blinker                 => trn_Blinker         ,
1065 
 
1066 
           -- DCB protocol interface
1067 
           protocol_link_act   =>  protocol_link_act    ,  -- IN  std_logic_vector(2-1 downto 0);
1068 
           protocol_rst        =>  protocol_rst         ,  -- OUT std_logic;
1069 
 
1070 
           Link_Buf_Full       =>  daq_rstop            ,  -- IN  std_logic;
1071 
 
1072 
           -- Interrupter triggers
1073 
           DAQ_irq             =>  DAQ_irq              ,  -- IN  std_logic;
1074 
           CTL_irq             =>  CTL_irq              ,  -- IN  std_logic;
1075 
           DLM_irq             =>  DLM_irq              ,  -- IN  std_logic;
1076 
 
1077 
           -- Fabric side: CTL Rx
1078 
           ctl_rv              =>  ctl_rv               ,  -- OUT std_logic;
1079 
           ctl_rd              =>  ctl_rd               ,  -- OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1080 
 
1081 
           -- Fabric side: CTL Tx
1082 
           ctl_ttake           =>  ctl_ttake            ,  -- OUT std_logic;
1083 
           ctl_tv              =>  ctl_tv               ,  -- IN  std_logic;
1084 
           ctl_td              =>  ctl_td               ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1085 
           ctl_tstop           =>  ctl_tstop            ,  -- OUT std_logic;
1086 
 
1087 
           ctl_reset           =>  ctl_reset            ,  -- OUT std_logic;
1088 
           ctl_status          =>  ctl_status           ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1089 
 
1090 
           -- Fabric side: DLM Rx
1091 
           dlm_tv              =>  dlm_tv               ,  -- OUT std_logic;
1092 
           dlm_td              =>  dlm_td               ,  -- OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1093 
 
1094 
           -- Fabric side: DLM Tx
1095 
           dlm_rv              =>  dlm_rv               ,  -- IN  std_logic;
1096 
           dlm_rd              =>  dlm_rd               ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1097 
 
1098 
           -- Event Buffer FIFO interface
1099 
           eb_FIFO_we                  => eb_we               , --  OUT std_logic;
1100 
           eb_FIFO_wsof                => eb_wsof             , --  OUT std_logic;
1101 
           eb_FIFO_weof                => eb_weof             , --  OUT std_logic;
1102 
           eb_FIFO_din                 => eb_din(C_DBUS_WIDTH-1 downto 0) , --  OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1103 
 
1104 
           eb_FIFO_re                  => eb_re               , --  OUT std_logic;
1105 
           eb_FIFO_empty               => eb_empty            , --  IN  std_logic;
1106 
           eb_FIFO_qout                => eb_dout(C_DBUS_WIDTH-1 downto 0) , --  IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1107 
           eb_FIFO_data_count          => eb_data_count(C_FIFO_DC_WIDTH downto 0)       , --  IN  std_logic_vector(C_FIFO_DC_WIDTH downto 0);
1108 
 
1109 
           eb_FIFO_ow                  => eb_FIFO_ow          , --  IN  std_logic;
1110 
 
1111 
           pio_reading_status          => open                , --  OUT std_logic;
1112 
 
1113 
           eb_FIFO_Status              => eb_FIFO_Status      , --  IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1114 
           eb_FIFO_Rst                 => eb_rst              , --  OUT std_logic;
1115 
 
1116 
           -- Debugging signals
1117 
           DMA_us_Done                 => LEDs_IO_pin(7) , -- OUT std_logic;
1118 
           DMA_us_Busy                 => open           , -- OUT std_logic;
1119 
           DMA_us_Busy_LED             => LEDs_IO_pin(6) , -- OUT std_logic;
1120 
           DMA_ds_Done                 => LEDs_IO_pin(5) , -- OUT std_logic;
1121 
           DMA_ds_Busy                 => open           , -- OUT std_logic;
1122 
           DMA_ds_Busy_LED             => LEDs_IO_pin(4) , -- OUT std_logic;
1123 
           DMA_ds_Start                => DMA_ds_Start   , -- OUT std_logic;
1124 
 
1125 
           self_feed_daq               => self_feed_daq  , -- OUT std_logic;
1126 
 
1127 
 
1128 
           -------------------
1129 
           -- DDR Interface
1130 
           DDR_Ready                   => DDR_Ready           , --  IN    std_logic;
1131 
 
1132 
           DDR_wr_sof                  => DDR_wr_sof          , --  OUT   std_logic;
1133 
           DDR_wr_eof                  => DDR_wr_eof          , --  OUT   std_logic;
1134 
           DDR_wr_v                    => DDR_wr_v            , --  OUT   std_logic;
1135 
           DDR_wr_FA                   => DDR_wr_FA           , --  OUT   std_logic;
1136 
           DDR_wr_Shift                => DDR_wr_Shift        , --  OUT   std_logic;
1137 
           DDR_wr_Mask                 => DDR_wr_Mask         , --  OUT   std_logic_vector(2-1 downto 0);
1138 
           DDR_wr_din                  => DDR_wr_din          , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1139 
           DDR_wr_full                 => DDR_wr_full         , --  IN    std_logic;
1140 
 
1141 
           DDR_rdc_sof                 => DDR_rdc_sof         , --  OUT   std_logic;
1142 
           DDR_rdc_eof                 => DDR_rdc_eof         , --  OUT   std_logic;
1143 
           DDR_rdc_v                   => DDR_rdc_v           , --  OUT   std_logic;
1144 
           DDR_rdc_FA                  => DDR_rdc_FA          , --  OUT   std_logic;
1145 
           DDR_rdc_Shift               => DDR_rdc_Shift       , --  OUT   std_logic;
1146 
           DDR_rdc_din                 => DDR_rdc_din         , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1147 
           DDR_rdc_full                => DDR_rdc_full        , --  IN    std_logic;
1148 
 
1149 
--           DDR_rdD_sof                 => DDR_rdD_sof         , --  IN    std_logic;
1150 
--           DDR_rdD_eof                 => DDR_rdD_eof         , --  IN    std_logic;
1151 
--           DDR_rdDout_V                => DDR_rdDout_V        , --  IN    std_logic;
1152 
--           DDR_rdDout                  => DDR_rdDout          , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1153 
 
1154 
           -- DDR payload FIFO Read Port
1155 
           DDR_FIFO_RdEn               => DDR_FIFO_RdEn       ,  -- OUT std_logic;
1156 
           DDR_FIFO_Empty              => DDR_FIFO_Empty      ,  -- IN  std_logic;
1157 
           DDR_FIFO_RdQout             => DDR_FIFO_RdQout     ,  -- IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1158 
 
1159 
           -- Data generator table write
1160 
           tab_we                      =>  tab_we     ,  -- OUT std_logic_vector(2-1 downto 0);
1161 
           tab_wa                      =>  tab_wa     ,  -- OUT std_logic_vector(12-1 downto 0);
1162 
           tab_wd                      =>  tab_wd     ,  -- OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1163 
 
1164 
           DG_is_Running               =>  dg_running ,  -- IN  std_logic;
1165 
           DG_Reset                    =>  dg_rst     ,  -- OUT   STD_LOGIC;
1166 
           DG_Mask                     =>  dg_mask    ,  -- OUT   STD_LOGIC
1167 
 
1168 
           -------------------
1169 
           -- Transaction Interface
1170 
           trn_lnk_up_n                => trn_lnk_up_n,
1171 
           trn_rsrc_dsc_n              => trn_rsrc_dsc_n,
1172 
           trn_rnp_ok_n                => trn_rnp_ok_n,
1173 
           trn_tsrc_dsc_n              => trn_tsrc_dsc_n,
1174 
           trn_tdst_dsc_n              => trn_tdst_dsc_n,
1175 
           trn_tbuf_av                 => trn_tbuf_av,
1176 
           trn_terrfwd_n               => trn_terrfwd_n,
1177 
 
1178 
           trn_clk                     => trn_clk,
1179 
           trn_reset_n                 => trn_reset_n,
1180 
           trn_rsrc_rdy_n              => trn_rsrc_rdy_n,
1181 
           trn_tdst_rdy_n              => trn_tdst_rdy_n,
1182 
           trn_rsof_n                  => trn_rsof_n,
1183 
           trn_reof_n                  => trn_reof_n,
1184 
           trn_rerrfwd_n               => trn_rerrfwd_n,
1185 
           trn_rrem_n                  => trn_rrem_n,
1186 
           trn_rd                      => trn_rd,
1187 
 
1188 
           cfg_interrupt_n             => cfg_interrupt_n,
1189 
           cfg_interrupt_rdy_n         => cfg_interrupt_rdy_n,
1190 
           cfg_interrupt_mmenable      => cfg_interrupt_mmenable,
1191 
           cfg_interrupt_msienable     => cfg_interrupt_msienable,
1192 
           cfg_interrupt_di            => cfg_interrupt_di,
1193 
           cfg_interrupt_do            => cfg_interrupt_do,
1194 
           cfg_interrupt_assert_n      => cfg_interrupt_assert_n,
1195 
 
1196 
           trn_rbar_hit_n              => trn_rbar_hit_n,
1197 
           trn_tsrc_rdy_n              => trn_tsrc_rdy_n,
1198 
           trn_rdst_rdy_n              => trn_rdst_rdy_n,
1199 
           trn_tsof_n                  => trn_tsof_n,
1200 
           trn_teof_n                  => trn_teof_n,
1201 
           trn_trem_n                  => trn_trem_n,
1202 
           trn_td                      => trn_td,
1203 
 
1204 
           Format_Shower               => Format_Shower,
1205 
 
1206 
           cfg_dcommand                => cfg_dcommand,
1207 
           pcie_link_width             => pcie_link_width,
1208 
           localId                     => localId
1209 
           );
1210 
 
1211 
 
1212 
  -- -----------------------------------------------------------------------
1213 
  --  BRAM control module
1214 
  --
1215 
   bram_controller:
1216 
   bram_Control
1217 
   GENERIC MAP (
1218 
                C_ASYNFIFO_WIDTH    => 72 ,
1219 
                P_SIMULATION        => FALSE
1220 
               )
1221 
   PORT MAP(
1222 
 
1223 
      -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
1224 
      DDR_wr_sof               => DDR_wr_sof          , --  IN    std_logic;
1225 
      DDR_wr_eof               => DDR_wr_eof          , --  IN    std_logic;
1226 
      DDR_wr_v                 => DDR_wr_v            , --  IN    std_logic;
1227 
      DDR_wr_FA                => DDR_wr_FA           , --  IN    std_logic;
1228 
      DDR_wr_Shift             => DDR_wr_Shift        , --  IN    std_logic;
1229 
      DDR_wr_Mask              => DDR_wr_Mask         , --  IN    std_logic_vector(2-1 downto 0);
1230 
      DDR_wr_din               => DDR_wr_din          , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1231 
      DDR_wr_full              => DDR_wr_full         , --  OUT   std_logic;
1232 
 
1233 
      DDR_rdc_sof              => DDR_rdc_sof         , --  IN    std_logic;
1234 
      DDR_rdc_eof              => DDR_rdc_eof         , --  IN    std_logic;
1235 
      DDR_rdc_v                => DDR_rdc_v           , --  IN    std_logic;
1236 
      DDR_rdc_FA               => DDR_rdc_FA          , --  IN    std_logic;
1237 
      DDR_rdc_Shift            => DDR_rdc_Shift       , --  IN    std_logic;
1238 
      DDR_rdc_din              => DDR_rdc_din         , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1239 
      DDR_rdc_full             => DDR_rdc_full        , --  OUT   std_logic;
1240 
 
1241 
--      DDR_rdD_sof              => DDR_rdD_sof         , --  OUT   std_logic;
1242 
--      DDR_rdD_eof              => DDR_rdD_eof         , --  OUT   std_logic;
1243 
--      DDR_rdDout_V             => DDR_rdDout_V        , --  OUT   std_logic;
1244 
--      DDR_rdDout               => DDR_rdDout          , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1245 
 
1246 
      -- DDR payload FIFO Read Port
1247 
      DDR_FIFO_RdEn            => DDR_FIFO_RdEn       ,  -- IN    std_logic;
1248 
      DDR_FIFO_Empty           => DDR_FIFO_Empty      ,  -- OUT   std_logic;
1249 
      DDR_FIFO_RdQout          => DDR_FIFO_RdQout     ,  -- OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1250 
 
1251 
      -- Common interface
1252 
      DBG_dma_start            => DMA_ds_Start        , --  IN    std_logic;
1253 
      DDR_Ready                => DDR_Ready           , --  OUT   std_logic;
1254 
      DDR_Blinker              => DDR_Blinker         , --  OUT   std_logic;
1255 
      mem_clk                  => trn_clk,   -- mem_clk             , --  IN
1256 
      trn_clk                  => trn_clk             , --  IN    std_logic;
1257 
      trn_reset_n              => trn_reset_n           --  IN    std_logic
1258 
    );
1259 
 
1260 
 
1261 
 
1262 
    --
1263 
    -- Event Buffer wrapper
1264 
    --
1265 
 
1266 
    LEDs_IO_pin(0)    <= trn_reset_n xor Format_Shower;
1267 
    LEDs_IO_pin(1)    <= trn_lnk_up_n xor DDR_Blinker;
1268 
    LEDs_IO_pin(2)    <= link_active(0);
1269 
    LEDs_IO_pin(3)    <= link_active(1);   -- dg_debug_led;
1270 
 
1271 
 
1272 
    event_buffer0:
1273 
    eb_wrapper
1274 
      port map (
1275 
         wr_clk     => trn_clk   ,  -- eb_wclk   ,
1276 
         wr_en      => eb_we_up     ,
1277 
         din        => eb_din_up    ,
1278 
         pfull      => eb_pfull  ,
1279 
         full       => eb_full   ,
1280 
 
1281 
         rd_clk     => trn_clk   ,  -- eb_rclk   ,
1282 
         rd_en      => eb_re     ,
1283 
         dout       => eb_dout   ,
1284 
         pempty     => eb_pempty ,
1285 
         empty      => eb_empty  ,
1286 
 
1287 
         data_count => eb_data_count(C_EMU_FIFO_DC_WIDTH-1+1 downto 1) ,
1288 
         rst        => eb_rst
1289 
         );
1290 
 
1291 
      eb_data_count(C_FIFO_DC_WIDTH downto C_EMU_FIFO_DC_WIDTH+1)
1292 
                      <= C_ALL_ZEROS(C_FIFO_DC_WIDTH downto C_EMU_FIFO_DC_WIDTH+1);
1293 
      eb_data_count(0)        -- 64 bits to 32 bits transformation
1294 
                      <= '0';
1295 
 
1296 
 
1297 
--    eb_wclk            <= trn_clk;
1298 
--    eb_rclk            <= trn_clk;
1299 
    eb_din(72-1 downto C_DBUS_WIDTH)       <= (OTHERS=>'0');
1300 
    eb_FIFO_Status(C_DBUS_WIDTH-1 downto C_FIFO_DC_WIDTH+3)
1301 
                         <= (OTHERS=>'0');
1302 
    eb_FIFO_Status(C_FIFO_DC_WIDTH+2 downto 3)
1303 
                         <= eb_data_count(C_FIFO_DC_WIDTH downto 1);
1304 
    eb_FIFO_Status(2)    <= eb_full;      -- daq_rstop;
1305 
    eb_FIFO_Status(1)    <= eb_pfull;
1306 
    eb_FIFO_Status(0)    <= eb_empty;
1307 
    eb_FIFO_ow           <= eb_we_up and eb_full;
1308 
 
1309 
 
1310 
    --
1311 
    --   .......................
1312 
    --
1313 
 
1314 
    daq_rv              <=  eb_we;
1315 
    daq_rsof            <=  eb_wsof;
1316 
    daq_reof            <=  eb_weof;
1317 
    daq_rd              <=  eb_din(C_DBUS_WIDTH-1 downto 0);
1318 
 
1319 
    eb_we_up            <=  daq_tv or self_feed_daq;
1320 
    eb_din_up           <=  C_ALL_ZEROS(72-1 downto C_DBUS_WIDTH+2) & daq_tsof & daq_teof & daq_td;
1321 
    daq_tstop           <=  eb_pfull;
1322 
 
1323 
 
1324 
    --
1325 
    --     Protocol Interface
1326 
    --
1327 
    ABB_DCB_Interface0:
1328 
    protocol_IF
1329 
      port map (
1330 
           -- DAQ Tx
1331 
           data2send_start          => data2send_start      ,   -- OUT   std_logic;
1332 
           data2send_end            => data2send_end        ,   -- OUT   std_logic;
1333 
           data2send                => data2send            ,   -- OUT   std_logic_vector(16-1 downto 0);
1334 
           crc_error_send           => crc_error_send       ,   -- OUT   std_logic;
1335 
           data2send_stop           => data2send_stop       ,   -- IN    std_logic;
1336 
 
1337 
           -- DAQ Rx
1338 
           data_rec_start           => data_rec_start       ,   -- IN    std_logic;
1339 
           data_rec_end             => data_rec_end         ,   -- IN    std_logic;
1340 
           data_rec                 => data_rec             ,   -- IN    std_logic_vector(16-1 downto 0);
1341 
           crc_error_rec            => crc_error_rec        ,   -- IN    std_logic;
1342 
           data_rec_stop            => data_rec_stop        ,   -- OUT   std_logic;
1343 
 
1344 
           -- CTL Tx
1345 
           ctrl2send_start          => ctrl2send_start      ,   -- OUT   std_logic;
1346 
           ctrl2send_end            => ctrl2send_end        ,   -- OUT   std_logic;
1347 
           ctrl2send                => ctrl2send            ,   -- OUT   std_logic_vector(16-1 downto 0);
1348 
           ctrl2send_stop           => ctrl2send_stop       ,   -- IN    std_logic;
1349 
 
1350 
           -- CTL Rx
1351 
           ctrl_rec_start           => ctrl_rec_start       ,   -- IN    std_logic;
1352 
           ctrl_rec_end             => ctrl_rec_end         ,   -- IN    std_logic;
1353 
           ctrl_rec                 => ctrl_rec             ,   -- IN    std_logic_vector(16-1 downto 0);
1354 
           ctrl_rec_stop            => ctrl_rec_stop        ,   -- OUT   std_logic;
1355 
 
1356 
           -- DLM Tx
1357 
           dlm2send_va              => dlm2send_va          ,   -- OUT   std_logic;
1358 
           dlm2send_type            => dlm2send_type        ,   -- OUT   std_logic_vector(4-1 downto 0);
1359 
 
1360 
           -- DLM Rx
1361 
           dlm_rec_va               => dlm_rec_va           ,   -- IN    std_logic;
1362 
           dlm_rec_type             => dlm_rec_type         ,   -- IN    std_logic_vector(4-1 downto 0);
1363 
 
1364 
           -- Common signals
1365 
           link_tx_clk              => link_tx_clk          ,   -- IN    std_logic;
1366 
           link_rx_clk              => link_rx_clk          ,   -- IN    std_logic;
1367 
           link_active              => link_active          ,   -- IN    std_logic_vector(2-1 downto 0);
1368 
           protocol_clk             => protocol_clk         ,   -- OUT   std_logic;
1369 
           protocol_res_n           => protocol_res_n       ,   -- OUT   std_logic;
1370 
 
1371 
 
1372 
           -- Fabric side: DAQ Rx
1373 
           daq_rv                   => daq_rv               ,   -- IN    std_logic;
1374 
           daq_rsof                 => daq_rsof             ,   -- IN    std_logic;
1375 
           daq_reof                 => daq_reof             ,   -- IN    std_logic;
1376 
           daq_rd                   => daq_rd               ,   -- IN    std_logic_vector(64-1 downto 0);
1377 
           daq_rstop                => daq_rstop            ,   -- OUT   std_logic;
1378 
 
1379 
           -- Fabric side: DAQ Tx
1380 
           daq_tv                   => daq_tv               ,   -- OUT   std_logic;
1381 
           daq_tsof                 => daq_tsof             ,   -- OUT   std_logic;
1382 
           daq_teof                 => daq_teof             ,   -- OUT   std_logic;
1383 
           daq_td                   => daq_td               ,   -- OUT   std_logic_vector(64-1 downto 0);
1384 
           daq_tstop                => daq_tstop            ,   -- IN    std_logic;
1385 
 
1386 
           -- Fabric side: CTL Rx
1387 
           ctl_rv                   => ctl_rv               ,   -- IN    std_logic;
1388 
           ctl_rd                   => ctl_rd               ,   -- IN    std_logic_vector(32-1 downto 0);
1389 
           ctl_rstop                => ctl_rstop            ,   -- OUT   std_logic;
1390 
 
1391 
           -- Fabric side: CTL Tx
1392 
           ctl_ttake                => ctl_ttake            ,   -- IN    std_logic;
1393 
           ctl_tv                   => ctl_tv               ,   -- OUT   std_logic;
1394 
           ctl_td                   => ctl_td               ,   -- OUT   std_logic_vector(32-1 downto 0);
1395 
           ctl_tstop                => ctl_tstop            ,   -- IN    std_logic;
1396 
 
1397 
           ctl_reset                => ctl_reset            ,   -- IN    std_logic;
1398 
           ctl_status               => ctl_status           ,   -- OUT   std_logic_vector(32-1 downto 0);
1399 
 
1400 
           -- Fabric side: DLM Rx
1401 
           dlm_tv                   => dlm_tv               ,   -- IN    std_logic;
1402 
           dlm_td                   => dlm_td               ,   -- IN    std_logic_vector(4-1 downto 0);
1403 
 
1404 
           -- Fabric side: DLM Tx
1405 
           dlm_rv                   => dlm_rv               ,   -- OUT   std_logic;
1406 
           dlm_rd                   => dlm_rd               ,   -- OUT   std_logic_vector(4-1 downto 0);
1407 
 
1408 
           -- Interrupter triggers
1409 
           DAQ_irq                  => open,  -- DAQ_irq              ,   -- OUT   std_logic;
1410 
           CTL_irq                  => CTL_irq              ,   -- OUT   std_logic;
1411 
           DLM_irq                  => DLM_irq              ,   -- OUT   std_logic;
1412 
 
1413 
           -- Data generator table write port
1414 
           tab_sel                  => '1'                  , -- IN    STD_LOGIC;
1415 
           tab_we                   => tab_we               , -- IN    STD_LOGIC_VECTOR (2-1 downto 0);
1416 
           tab_wa                   => tab_wa               , -- IN    STD_LOGIC_VECTOR (12-1 downto 0);
1417 
           tab_wd                   => tab_wd               , -- IN    STD_LOGIC_VECTOR (64-1 downto 0);
1418 
 
1419 
           -- DG control/status signal
1420 
           dg_running               => dg_running           , -- OUT   STD_LOGIC;
1421 
           dg_mask                  => dg_mask              , -- IN    STD_LOGIC;
1422 
           dg_rst                   => dg_rst               , -- IN    STD_LOGIC
1423 
 
1424 
           -- DG debug signal
1425 
           daq_start_led            => dg_debug_led         , -- OUT   STD_LOGIC;
1426 
 
1427 
           -- Fabric side: Common signals
1428 
           trn_clk                  => trn_clk              ,   -- IN    std_logic;
1429 
           protocol_link_act        => protocol_link_act    ,   -- OUT   std_logic_vector(2-1 downto 0);
1430 
           protocol_rst             => protocol_rst             -- IN    std_logic
1431 
      );
1432 
 
1433 
 
1434 
    --
1435 
    --     Module emulating the link
1436 
    --
1437 
 
1438 
    DCB_Link_module0:
1439 
    pseudo_protocol_module
1440 
      port map (
1441 
           -- DAQ Tx
1442 
           data2send_start          => data2send_start       ,   -- IN    std_logic;
1443 
           data2send_end            => data2send_end         ,   -- IN    std_logic;
1444 
           data2send                => data2send             ,   -- IN    std_logic_vector(16-1 downto 0);
1445 
           crc_error_send           => crc_error_send        ,   -- IN    std_logic;
1446 
           data2send_stop           => data2send_stop        ,   -- OUT   std_logic;
1447 
 
1448 
           -- DAQ Rx
1449 
           data_rec_start           => data_rec_start        ,   -- OUT   std_logic;
1450 
           data_rec_end             => data_rec_end          ,   -- OUT   std_logic;
1451 
           data_rec                 => data_rec              ,   -- OUT   std_logic_vector(16-1 downto 0);
1452 
           crc_error_rec            => crc_error_rec         ,   -- OUT   std_logic;
1453 
           data_rec_stop            => data_rec_stop         ,   -- IN    std_logic;
1454 
 
1455 
           -- CTL Tx
1456 
           ctrl2send_start          => ctrl2send_start       ,   -- IN    std_logic;
1457 
           ctrl2send_end            => ctrl2send_end         ,   -- IN    std_logic;
1458 
           ctrl2send                => ctrl2send             ,   -- IN    std_logic_vector(16-1 downto 0);
1459 
           ctrl2send_stop           => ctrl2send_stop        ,   -- OUT   std_logic;
1460 
 
1461 
           -- CTL Rx
1462 
           ctrl_rec_start           => ctrl_rec_start        ,   -- OUT   std_logic;
1463 
           ctrl_rec_end             => ctrl_rec_end          ,   -- OUT   std_logic;
1464 
           ctrl_rec                 => ctrl_rec              ,   -- OUT   std_logic_vector(16-1 downto 0);
1465 
           ctrl_rec_stop            => ctrl_rec_stop         ,   -- IN    std_logic;
1466 
 
1467 
           -- DLM Tx
1468 
           dlm2send_va              => dlm2send_va           ,   -- IN    std_logic;
1469 
           dlm2send_type            => dlm2send_type         ,   -- IN    std_logic_vector(4-1 downto 0);
1470 
 
1471 
           -- DLM Rx
1472 
           dlm_rec_va               => dlm_rec_va            ,   -- OUT   std_logic;
1473 
           dlm_rec_type             => dlm_rec_type          ,   -- OUT   std_logic_vector(4-1 downto 0);
1474 
 
1475 
           -- dummy pin input  !!!! not really exists
1476 
           dummy_pin_in             => "000",  -- dummy_pin_in          ,   -- IN    std_logic_vector(3-1 downto 0);
1477 
--           dummy_pin_in             => dummy_pin_in          ,   -- IN    std_logic_vector(3-1 downto 0);
1478 
 
1479 
           -- Common interface
1480 
           link_tx_clk              => link_tx_clk           ,   -- OUT   std_logic;
1481 
           link_rx_clk              => link_rx_clk           ,   -- OUT   std_logic;
1482 
           link_active              => link_active           ,   -- OUT   std_logic_vector(2-1 downto 0);
1483 
           clk                      => protocol_clk          ,   -- IN    std_logic;
1484 
           res_n                    => protocol_res_n            -- IN    std_logic
1485 
      );
1486 
 
1487 
 
1488 
 
1489 
end Behavioral;

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