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[/] [pdp1/] [trunk/] [rtl/] [vhdl/] [papertapereader.vhd] - Blame information for rev 3

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1 3 yannv
----------------------------------------------------------------------------------
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-- Company: 
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-- Engineer: 
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-- 
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-- Create Date:    23:37:05 2009-08-20
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-- Design Name: fake paper tape reader for PDP-1
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-- Module Name:    papertapereader - Behavioral 
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-- Project Name: PDP-1
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-- Target Devices: Spartan 3A Starter Kit
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-- Tool versions: Webpack 11.1
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-- Description: RS-232 interface emulating a tape reader.
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--
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-- Dependencies: Minimal UART core from opencores.
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--
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-- Revision: 
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-- Revision 0.01 - File Created
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-- Additional Comments: 
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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entity papertapereader is
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    Port ( clk : in STD_LOGIC;
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           dopulse : in  STD_LOGIC;
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           done : out  STD_LOGIC := 'L';
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           io : out  STD_LOGIC_VECTOR (0 to 17) := (others=>'L');
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           io_set : out  STD_LOGIC := 'L';
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           ptr_rpa : in  STD_LOGIC;
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           ptr_rpb : in  STD_LOGIC;
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           ptr_rrb : in  STD_LOGIC;
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           rb_loaded : out  STD_LOGIC;
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                          RXD : in std_logic;
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                          TXD : out std_logic);
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end papertapereader;
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architecture Behavioral of papertapereader is
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        COMPONENT Minimal_UART_CORE
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        PORT(
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                CLOCK : IN std_logic;
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                RXD : IN std_logic;
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                INP : IN std_logic_vector(7 downto 0);
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                WR : IN std_logic;
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                OUTP : INOUT std_logic_vector(7 downto 0);
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                EOC : OUT std_logic;
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                TXD : OUT std_logic;
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                EOT : OUT std_logic;
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                READY : OUT std_logic
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                );
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        END COMPONENT;
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        signal rb : std_logic_vector(0 to 17);
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        signal received_byte, old_received_byte, tx_ready, wrote : std_logic := '0';
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        signal read_byte, write_byte: std_logic_vector(7 downto 0);
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        type task_type is (read_character, read_word0, read_word1, read_word2, done_reading, idle);
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        signal task : task_type := idle;
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        signal senddone : std_logic;
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begin
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        Inst_Minimal_UART_CORE: Minimal_UART_CORE PORT MAP(
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                CLOCK => CLK,
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                EOC => received_byte,   -- end of character; rising edge indicates valid data in OUTP
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                OUTP => read_byte,
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                RXD => RXD,
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                TXD => TXD,
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                EOT => open,    -- end of transmit; indicates a character has been sent
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                INP => write_byte,
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                READY => tx_ready,      -- indicates that we may write
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                WR => wrote
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        );
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        write_byte <= x"65"; --"e" --"00010010";                -- ASCII device control 2 (Ctrl+R) to request a byte from the tape.
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        rb_loaded <= '1' when task=done_reading else '0';
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        process(clk)
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        begin
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          if rising_edge(clk) then
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            -- default state for pulse signals
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            wrote<='0';
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            done <= '0';
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            io_set <= '0';
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            -- load edge detector
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            old_received_byte <= received_byte;
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            if received_byte='1' and old_received_byte='0' then
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              case task is
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                when idle =>            -- not awaiting a character, ignore it
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                when read_character =>
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                  rb(0 to 17-8) <= (others=>'0');
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                  rb(17-7 to 17) <= read_byte;
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                  task <= done_reading;
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                when read_word0 =>
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                  if read_byte(7)='1' then
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                    rb(0 to 5) <= read_byte(5 downto 0);
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                    task <= read_word1;
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                  end if;
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                  wrote<='1';   -- request another byte
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                when read_word1 =>
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                  if read_byte(7)='1' then
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                    rb(6 to 11) <= read_byte(5 downto 0);
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                    task <= read_word2;
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                  end if;
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                  wrote<='1';   -- request another byte
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                when read_word2 =>
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                  if read_byte(7)='1' then
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                    rb(12 to 17) <= read_byte(5 downto 0);
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                    task <= done_reading;
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                  else
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                    wrote<='1'; -- request another byte
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                  end if;
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                when others =>
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              end case;
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            end if;             -- received a byte
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            if ptr_rpa='1' then
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              task<=read_character;
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              senddone<=dopulse;
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              wrote<='1';
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            elsif ptr_rpb='1' then
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              task<=read_word0;
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              senddone<=dopulse;
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              wrote<='1';
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            elsif ptr_rrb='1' then
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              senddone<=dopulse;
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            end if;
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            if task=done_reading and senddone='1' then
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              done<='1';
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              IO<=rb;
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              io_set<='1';
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              task <= idle;
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            end if;
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          end if;               -- rising_edge(clk)
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        end process;
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        --io(0 to 17-8) <= (others => '0');
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        --io(17-7 to 17) <= read_byte;
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end Behavioral;

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