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--!
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--! PDP-8 Processor
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--!
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--! \brief
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--! CPU Data Field (DF) Memory Extension Register
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--!
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--! \details
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--! The Data Field (DF) Register is a Memory Extension
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--! Register that is used to supply the Extended Memory
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--! Address (EMA/XMA) during a indirect data operations.
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--!
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--! The DF register is modified under the following
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--! conditions:
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--! -# the DF Register is set to 0 (Memory Field 0) on
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--! entry to an interrupt, and
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--! -# the DF Register is set to 0 (Memory Field 0) when
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--! the CLEAR switch on the Front Panel is asserted, and
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--! -# the DF Register set to the contents of the Front
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--! Panel Data Switch Register, SR(9:11), when the
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--! EXTD switch is asserted, and
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--! -# the DF Register set to the contents of the AC(9:11)
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--! when executing a Restore Flags (RTF) instruction, and
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--! -# the DF Register set to 'n' when executing a Change
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--! Data Field (CDFn) instruction, and
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--! -# the DF Register set to 'n' when executing a Change
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--! Data and Instruction Field (CDIn) instruction, and
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--! -# the DF Register set to the contents of the Save Flags
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--! Register, SF(4:6), when executing a Restore Memory
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--! Field (RMF) instruction.
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--!
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--! \file
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--! df.vhd
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--!
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--! \author
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--! Rob Doyle - doyle (at) cox (dot) net
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--!
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--------------------------------------------------------------------
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--
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-- Copyright (C) 2009, 2010, 2011 Rob Doyle
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--
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-- This source file may be used and distributed without
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-- restriction provided that this copyright statement is not
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-- removed from the file and that any derivative work contains
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-- the original copyright notice and the associated disclaimer.
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--
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-- This source file is free software; you can redistribute it
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-- and/or modify it under the terms of the GNU Lesser General
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-- Public License as published by the Free Software Foundation;
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-- version 2.1 of the License.
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--
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-- This source is distributed in the hope that it will be
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-- useful, but WITHOUT ANY WARRANTY; without even the implied
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-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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-- PURPOSE. See the GNU Lesser General Public License for more
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-- details.
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--
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-- You should have received a copy of the GNU Lesser General
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-- Public License along with this source; if not, download it
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-- from http://www.gnu.org/licenses/lgpl.txt
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--
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--------------------------------------------------------------------
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--
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-- Comments are formatted for doxygen
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--
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library ieee; --! IEEE Library
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use ieee.std_logic_1164.all; --! IEEE 1164
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use work.cpu_types.all; --! Types
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--
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--! CPU Data Field (DF) Memory Extension Register Entity
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--
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entity eDF is port (
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sys : in sys_t; --! Clock/Reset
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dfOP : in dfOP_t; --! DF Op
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AC : in data_t; --! AC Input
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IR : in addr_t; --! IR Input
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SF : in sf_t; --! SF Input
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SR : in data_t; --! SR Input
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DF : out field_t --! DF Output
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);
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end eDF;
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--
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--! CPU Data Field (DF) Memory Extension Register Entity
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--
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architecture rtl of eDF is
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signal dfREG : field_t; --! Data Field
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signal dfMUX : field_t; --! Data Field Multiplexer
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begin
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--
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-- DF Multiplexer
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--
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with dfOP select
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dfMUX <= dfREG when dfopNOP,
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"000" when dfopCLR,
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AC(9 to 11) when dfopAC9to11,
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IR(6 to 8) when dfopIR6to8,
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SF(4 to 6) when dfopSF4to6,
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SR(9 to 11) when dfopSR9to11;
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--
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--! DF Register
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--
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REG_DF : process(sys)
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begin
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if sys.rst = '1' then
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dfREG <= (others => '0');
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elsif rising_edge(sys.clk) then
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dfREG <= dfMUX;
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end if;
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end process REG_DF;
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DF <= dfREG;
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end rtl;
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