| 1 |
5 |
guanucolui |
*herramientas
|
| 2 |
|
|
opejproj(openproj.org)
|
| 3 |
|
|
inkscape
|
| 4 |
|
|
fuentes: Gaposis outlineBRK, brazeBRK, macropsiaBRK, pseudp BRK, Xtrusion BRK, zoiadl BRK, Zurklez sodial BRK
|
| 5 |
|
|
diagrama de GRANTT
|
| 6 |
|
|
planner (ref: http://paraisolinux.com/herramientas-para-diagramas-de-gantt/)
|
| 7 |
15 |
guanucolui |
|
| 8 |
5 |
guanucolui |
iMPACT helper: transferir binario sin instalar iMPACT (http://fpgalibre.sourceforge.net/hard.html#tp10)
|
| 9 |
|
|
Grabación de FPGAs y memorias, JTAG, etc.: (http://openwince.sourceforge.net/jtag/)
|
| 10 |
|
|
INTI: Contactar con los changos para que nos pasen el script que usan para sintetizar y programar a traves del impact por linux
|
| 11 |
|
|
|
| 12 |
|
|
=================0
|
| 13 |
|
|
idea presentada hace poco 21 oct 2011
|
| 14 |
15 |
guanucolui |
OTCPLD - Agregar al diseño de la placa CPLD, un generador de clock.
|
| 15 |
5 |
guanucolui |
=================0
|
| 16 |
|
|
|
| 17 |
|
|
*referencias (http)
|
| 18 |
|
|
opencores.org
|
| 19 |
|
|
Open Design Prototype Board (http://opencores.org/project,board)
|
| 20 |
|
|
Griva Basic board (http://opencores.org/project,griva)
|
| 21 |
|
|
Open JTAG (http://opencores.org/project,openjtag-project)
|
| 22 |
|
|
altera
|
| 23 |
|
|
Cyclone II FPGA Starter Development Kit (http://www.altera.com/products/devkits/altera/kit-cyc2-2C20N.html#related_links) $200
|
| 24 |
|
|
nota: La alimentación de la placa es bastante bastante básica pero se ve que anda(ver esquemático).
|
| 25 |
|
|
terasIC
|
| 26 |
|
|
DE1
|
| 27 |
|
|
Altera EPCS4 serial EEPROM chip
|
| 28 |
|
|
MAX II Micro Kit
|
| 29 |
|
|
slscorp
|
| 30 |
|
|
MAX II/MAX IIZ
|
| 31 |
|
|
xilinx
|
| 32 |
|
|
Spartan-3A/3AN FPGA Starter Kit Board
|
| 33 |
|
|
easyFPGA
|
| 34 |
|
|
EZ1KUSB - Altera ACEX FPGA Development board with USB interface
|
| 35 |
|
|
EZ1CUSB - Altera Cyclone FPGA Development board with USB interface
|
| 36 |
|
|
EZ2SUSB - Xilinx Spartan-II FPGA Development board with USB interface
|
| 37 |
|
|
EZ3SUSB - Xilinx Spartan-3 FPGA Development board with USB interface
|
| 38 |
|
|
digilent
|
| 39 |
|
|
Spartan-3 Board
|
| 40 |
|
|
FPGAlibre
|
| 41 |
|
|
http://fpgalibre.sourceforge.net/enlaces.html#tp18
|
| 42 |
|
|
FPGAdevelopment.com
|
| 43 |
|
|
FPGA Development Kits (http://www.fpgadevelopment.com/fpga-development-news.asp?a=0&ga=news&pst=712)
|
| 44 |
|
|
ORSoC
|
| 45 |
|
|
FPGA Development Board(http://orsoc.se/fpga-development-board/langswitch_lang/en/)
|
| 46 |
|
|
openCPI(http://opencpi.org/documentation.php)
|
| 47 |
|
|
http://www.w3.org/TR/xml/
|
| 48 |
|
|
JTAG Serial Cable run 1 for Milkymist One
|
| 49 |
|
|
Proyecto LGPL ========> http://en.qi-hardware.com/wiki/JTAG_Serial_Cable_run_1_for_Milkymist_One
|
| 50 |
|
|
Para bajar proyecto=======> git clone git://github.com/milkymist/extras-m1.git
|
| 51 |
|
|
|
| 52 |
|
|
*protocolos estandares
|
| 53 |
|
|
IEEE 1149.1/1532 JTAG programming/debug port (spartan)
|
| 54 |
|
|
IEEE1149.1 JTAG Boundary Scan Test (coolrunner)
|
| 55 |
|
|
|
| 56 |
|
|
*memorias SPI
|
| 57 |
|
|
ST (512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface)
|
| 58 |
|
|
M25P40 (4Mbits)
|
| 59 |
|
|
ATMEL
|
| 60 |
|
|
AT45DB321D
|
| 61 |
|
|
MICROCHIP
|
| 62 |
|
|
SST25VF016B
|
| 63 |
|
|
|
| 64 |
|
|
*ADC y DAC
|
| 65 |
|
|
MCP3021(ADC)
|
| 66 |
|
|
MCP4725(DAC)
|
| 67 |
|
|
*POWER
|
| 68 |
|
|
fabricante interSi
|
| 69 |
|
|
MC33063A código digikey 296-17765-2-ND
|
| 70 |
|
|
desarrollo: http://www.labbookpages.co.uk/circuits/tps75003.html
|
| 71 |
|
|
Fuente de alimentación con integrado de texas instruments(TPS75003)
|
| 72 |
|
|
Texas Instruments
|
| 73 |
|
|
TPS75003 - LA MEJOR NOTA DE APLICACIÓN para la implementación (slva175.pdf - la mejor)(slvr283.pdf) (slvr274.pdf)
|
| 74 |
|
|
Xilinx FPGA & CPLD Power Management Solutions
|
| 75 |
|
|
(http://focus.ti.com/analog/docs/gencontent.tsp?familyId=64&genContentId=1069&DCMP=hpa_pmp_general&HQS=Tools+IL+xilinxfpga)
|
| 76 |
|
|
STmicroelectronics
|
| 77 |
|
|
ver Xilinx-FPGA-Power-Management-Design-Guide-V2_0.pdf
|
| 78 |
|
|
*fabricantes de PCB
|
| 79 |
|
|
http://www.pcbwing.com/
|
| 80 |
|
|
|
| 81 |
|
|
* componentes
|
| 82 |
|
|
|
| 83 |
|
|
digikey - memoria XCF01SVOG20C( corresponde a XC3S50A-4VQG100C) U$S 3,15 comprar
|
| 84 |
|
|
digikey - CPLD CoolRunner-II U$S 3,05 comprar código digikey: 122-1409-ND
|
| 85 |
|
|
digikey - fpga XC3S50A-4VQG100C U$S 6,12 listo (cantidad 2)
|
| 86 |
|
|
digikey - ftdi FT2232D-REEL U$S 3,8 listo (cantidad 5)
|
| 87 |
|
|
digikey - ftdi FT232HL-REEL (estudiar alternativa) U$S 2,75 ver
|
| 88 |
|
|
digikey - FPGA memoria no volatil XC3S50AN-4TQG144C U$S 9,91 ver codigo digikey: 122-1555-ND
|
| 89 |
|
|
|
| 90 |
|
|
LT nexys2 y basys2
|
| 91 |
|
|
LT1765
|
| 92 |
|
|
LTC3545
|
| 93 |
|
|
LTC6905
|
| 94 |
|
|
LTC3417
|
| 95 |
|
|
LTC1844
|
| 96 |
|
|
|
| 97 |
|
|
*miscelanius
|
| 98 |
15 |
guanucolui |
Plataforma de Hardware Reconfigurable PHR
|
| 99 |
5 |
guanucolui |
|
| 100 |
|
|
componentes
|
| 101 |
|
|
Para el diseño de los conectores que permitiran conectar la placa base con la placa FPGA deberíamos usar los conectores SMD con separación mínima que son los 1.27mm o (0.050)pulgadas. Para más detalles ver en ref/conectores SMD - torson.pdf
|
| 102 |
|
|
Se pretende utilizar un conector de 1mm de paso, debe revisarse la disponibilidad en córdoba.
|
| 103 |
|
|
|
| 104 |
15 |
guanucolui |
*"Posibles" transferencia de tecnología
|
| 105 |
5 |
guanucolui |
UTNs
|
| 106 |
|
|
San francisco
|
| 107 |
|
|
http://www.frsfco.utn.edu.ar/secyt/grupoI+D_Electronica_Medicina.asp
|
| 108 |
|
|
http://www.frsfco.utn.edu.ar/secyt/grupoI+D_Electronica_Bioingenieria.asp
|
| 109 |
|
|
http://www.frsfco.utn.edu.ar/secyt/grupoI+D_Desarrollo_Electronico.asp
|
| 110 |
|
|
Villa Maria
|
| 111 |
|
|
http://www.frvm.utn.edu.ar/Construccion.html (en construcción todo :(... Hablar con marco para tener un contacto).
|
| 112 |
|
|
|
| 113 |
|
|
|
| 114 |
|
|
*Tener en cuenta en diseño
|
| 115 |
|
|
+ aislar las entradas y salidas de la FPGA
|
| 116 |
|
|
+ contar con: (aprox. 48pines usados)
|
| 117 |
|
|
_ 8 led
|
| 118 |
|
|
_ 8 llaves
|
| 119 |
|
|
_ 4 pulsadores
|
| 120 |
|
|
_ 1 display 7seg x 4 digitos
|
| 121 |
|
|
_ 1 puerto serial (DB9)
|
| 122 |
|
|
_ 1 puerto serial (conector simple)
|
| 123 |
|
|
_ 1 ADC seria SPI (10 bit como mucho 20Ks, maximo audio)
|
| 124 |
|
|
_ 1 DAC serial SPI (10 bit como mucho 20Ks, maximo audio)
|
| 125 |
|
|
_ 4/8 entradas aisladas (usar chip TI de mesa XYZ)
|
| 126 |
|
|
ISO7242M (150Mbps)
|
| 127 |
|
|
ISO7242C (25Mbps)
|
| 128 |
|
|
ISO7242A (1Mbps)
|
| 129 |
|
|
_ 1 conector externo IDE
|
| 130 |
|
|
|
| 131 |
|
|
=================================================================================================================================================
|
| 132 |
|
|
|
