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\section[Desarrollo]{Desarrollo del Proyecto PHR}
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\begin{frame}
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\frametitle{El proyecto PHR}
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\begin{center}
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\includegraphics[width=\textwidth]{phr_small.png}
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\end{center}
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\end{frame}
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\begin{frame}
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  \frametitle{Recursos de hardware vs. Nivel de enseñanza}
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  % \transfade
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  \begin{block}{Consideración}
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    En función del perfil del usuario de la plataforma se definen los dispositivos que se utilizarán
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  \end{block}
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  \vfill
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  \begin{center}
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      \begin{tabular}{|l|c|c|c|}
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        \hline
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        \multirow{2}{*}{Nivel} & Llaves/pulsadores & ADC\&DAC/SPI & USB/ETH \\
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        & Diodos LED & Display LCD/VGA & HDMI \\ \hline
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        \hline
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        Inicial & $\checkmark$ & & \\
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        \hline
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        Medio & $\checkmark$ & $\checkmark$ & \\
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        \hline
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        Avanzado & $\checkmark$ & $\checkmark$ & $\checkmark$ \\
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        \hline
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      \end{tabular}
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  \end{center}
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\end{frame}
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\subsection{Diagrama en bloques}
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\begin{frame}
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\frametitle{Diagrama de bloques del Hardware}
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%\transfade
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\begin{center}
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    \includegraphics<1>[width=0.9\textwidth]{block1.pdf}
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    \includegraphics<2>[width=0.9\textwidth]{block2.pdf}
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    \includegraphics<3>[width=0.9\textwidth]{block3.pdf}
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\end{center}
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\end{frame}
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\subsection{Placa PHRBoard} %%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}
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\frametitle{Características}
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\begin{description}[Memoria PROM:]
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\item [FPGA:] Xilinx Spartan-3A XC3S200A (VQG100)
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\pause
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\item [Memoria PROM:] Xilinx XCF02S
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\pause
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\item [Voltaje entrada:] 5V
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\pause
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\item [Relojes:] Un reloj fijo y tres seleccionables:
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        \begin{enumerate}
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        \item 50 MHz
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        \item 16 MHz, 1 MHz, 500 kHz y 250 kHz
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        \item 125 kHz, 62.5 kHz, 31.25 kHz, 15.625 kHz
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        \item 3.9062 kHz, 1.9531 kHz, 976,56251 Hz
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   \end{enumerate}
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\pause
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\item [GPIO:] 28 pines en total
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\end{description}
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\end{frame}
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\begin{frame}[b]
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\frametitle{Periféricos}
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\only<1-5>{
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\begin{itemize}
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\item \textbf<1>{8 LEDs}
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\item \textbf<2>{8 llaves (\emph{DIP switch})}
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\item \textbf<3>{4 pulsadores}
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\item \textbf<4>{Display de 7 segmentos cuádruple}
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\item \textbf<5>{Puerto serie}
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\end{itemize}
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}
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%\vspace{3cm}
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\begin{center}
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\includegraphics<1>[width=1\textwidth]{phr_top_leds.png}
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\includegraphics<2>[width=1\textwidth]{phr_top_switches.png}
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\includegraphics<3>[width=1\textwidth]{phr_top_botones.png}
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\includegraphics<4>[width=1\textwidth]{phr_top_display.png}
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\includegraphics<5>[width=1\textwidth]{phr_top_nada.png}
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\includegraphics<6>[width=1\textwidth]{phr_top.png}
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\end{center}
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\vspace{1ex}
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\end{frame}
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\subsection{Placa S3Power} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}
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\frametitle{Placa S3Power}
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\begin{center}
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\includegraphics[width=0.8\textwidth]{s3power_small.png}
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\end{center}
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\end{frame}
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\begin{frame}
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\frametitle{Voltajes elegidos}
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\begin{itemize}
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\item 1.2V y 2.5A para la lógica interna.
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\item 3.3V y 2.5A para los bancos de pines.
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\item 2.5V y 200mA para el módulo de comunicación JTAG.
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{El chip TPS75003}
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\begin{itemize}
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\item<1-> Posee tres reguladores de tensión: Dos tipo Buck de 3A y eficiencia del 95\% y otro regulador lineal de 300 mA.
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\item<2-> Voltaje de entrada de entre 2.2V y 6.5 V.
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\item<3-> Arranque suave e independiente para cada regulador.
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\item<4-> Tensiones ajustables de 1.2 V a 6.5 V para los convertidores Buck y de 1.0 V a 6.5 V para el convertidor lineal.
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{Arranque}
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\begin{center}
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\includegraphics[width=0.9\textwidth]{arranque.pdf}
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\end{center}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\subsection{Placa OOCDLink}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}
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\frametitle{Placa OOCDLink}
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\begin{center}
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\includegraphics[width=0.8\textwidth]{oocdlink_small.png}
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\end{center}
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\end{frame}
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\subsubsection{FTDI chip} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}
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\frametitle{El chip FT2232D}
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\begin{itemize}
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\item <1->Cumple con USB 2.0 Full Speed (12 Mbits/sec)
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\item <2->Tiene una tasa de transferencia de entre 300 y 3 MBaud
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\item <3->Forma dos canales de comunicación
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\item <4->Desde el SO, la interfaz puede verse como un \emph{puerto serie virtual}
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\item <5->Existen librerías para implementar JTAG, I2C y SPI
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{El chip FT2232D}
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\begin{center}
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\includegraphics[width=1\textwidth]{FTblock.pdf}
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\end{center}
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\end{frame}
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\subsection{Software} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}
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\frametitle{Selección de los modos de configuración}
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\includegraphics[width=1\textwidth]{config_modes.pdf}
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\end{frame}
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\begin{frame}
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\frametitle{xc3sprog}
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\begin{center}
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\includegraphics[width=1\textwidth]{xc3sprog.pdf}
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\end{center}
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\end{frame}
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\begin{frame}
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\frametitle{PHR GUI (utiliza el \textsl{software} xc3sprog)}
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\begin{center}
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\includegraphics[width=0.8\textwidth]{front-end.pdf}
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\end{center}
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\end{frame}
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