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eeschema (2010-03-14)-final  >> Creation date: mar 09 oct 2012 20:13:15 ART
 
#Componentes ( orden = Referencia )
| C1         0.1u
| C2         0.1u
| K1         jum_EN2
| P1         FPGA
| P2         IO aislados
| U1         ISO7242A
#Fin Componentes
 
#Componentes ( orden = Valor )
| 0.1u         C1
| 0.1u         C2
| FPGA         P1
| IO aislados  P2
| ISO7242A     U1
| jum_EN2      K1
#Fin Componentes
 
#Fin de Lista

Line No.	Rev	Author	Line
1	82	guanucolui	`eeschema (2010-03-14)-final >> Creation date: mar 09 oct 2012 20:13:15 ART`
2
3			`#Componentes ( orden = Referencia )`
4			`\| C1 0.1u`
5			`\| C2 0.1u`
6			`\| K1 jum_EN2`
7			`\| P1 FPGA`
8			`\| P2 IO aislados`
9			`\| U1 ISO7242A`
10			`#Fin Componentes`
11
12			`#Componentes ( orden = Valor )`
13			`\| 0.1u C1`
14			`\| 0.1u C2`
15			`\| FPGA P1`
16			`\| IO aislados P2`
17			`\| ISO7242A U1`
18			`\| jum_EN2 K1`
19			`#Fin Componentes`
20
21			`#Fin de Lista`

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[/] [phr/] [trunk/] [placas/] [MOD/] [mod-aislador/] [mod-aislador.lst] - Blame information for rev 210