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[/] [phr/] [trunk/] [placas/] [PHRboard/] [libraries/] [schematics_lib_trash/] [linear-technology.lib] - Blame information for rev 212

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1 86 guanucolui
EESchema-LIBRARY Version 2.3  29/04/2008-12:22:33
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# Converted with eagle2kicad.ulp Version 0.9
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# Device count = 9
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#
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# Dev Name: LT1016CN
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# Package Name: DIL08
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 1
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#
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DEF LT1016CN IC 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LT1016
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F0 "IC" -390 255 50 H V L B
15
F1 "LT1016CN" 130 200 50 H V L B
16
F2 "linear-technology-DIL08" 0 150 50 H I C C
17
DRAW
18
P 2 1 0 0 -250 125 -250 75
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P 2 1 0 0 -275 100 -225 100
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P 2 1 0 0 -275 -100 -225 -100
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P 2 1 0 0 -300 200 -300 -200
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P 2 1 0 0 -300 -200 300 0
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P 2 1 0 0 300 0 -300 200
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P 2 1 0 0 0 200 0 103
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P 2 1 0 0 300 -100 224 -32
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P 2 1 0 0 100 -73 100 -100
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P 2 1 0 0 -100 -133 -100 -200
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P 2 1 0 0 300 -120 380 -120
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P 2 1 0 0 0 -103 0 -200
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P 2 1 0 0 300 100 224 28
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T 0 57 276 32 0 1 0 V+
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T 0 47 -274 32 0 1 0 V-
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T 0 353 -144 32 0 1 0 OUT
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T 0 353 66 32 0 1 0 OUT
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T 1 134 -137 32 0 1 0 GND
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T 1 -96 -73 32 0 1 0 EN
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X +IN 2 -400 100 100 R 40 40 1 1 I
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X -IN 3 -400 -100 100 R 40 40 1 1 I
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X GND 6 100 -200 100 U 40 40 1 1 W
40
X LA_EN 5 -100 -300 100 U 40 40 1 1 I
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X OUT 7 400 100 100 L 40 40 1 1 O
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X OUT\ 8 400 -100 100 L 40 40 1 1 O
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X V+ 1 0 300 100 D 40 40 1 1 W
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X V- 4 0 -300 100 U 40 40 1 1 W
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ENDDRAW
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ENDDEF
47
 
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#
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# Dev Name: LT1016CS8
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# Package Name: SOIC8
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 1
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#
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DEF LT1016CS8 IC 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LT1016
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F0 "IC" -390 255 50 H V L B
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F1 "LT1016CS8" 130 200 50 H V L B
60
F2 "linear-technology-SOIC8" 0 150 50 H I C C
61
DRAW
62
P 2 1 0 0 -250 125 -250 75
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P 2 1 0 0 -275 100 -225 100
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P 2 1 0 0 -275 -100 -225 -100
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P 2 1 0 0 -300 200 -300 -200
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P 2 1 0 0 -300 -200 300 0
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P 2 1 0 0 300 0 -300 200
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P 2 1 0 0 0 200 0 103
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P 2 1 0 0 300 -100 224 -32
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P 2 1 0 0 100 -73 100 -100
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P 2 1 0 0 -100 -133 -100 -200
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P 2 1 0 0 300 -120 380 -120
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P 2 1 0 0 0 -103 0 -200
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P 2 1 0 0 300 100 224 28
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T 0 57 276 32 0 1 0 V+
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T 0 47 -274 32 0 1 0 V-
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T 0 353 -144 32 0 1 0 OUT
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T 0 353 66 32 0 1 0 OUT
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T 1 134 -137 32 0 1 0 GND
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T 1 -96 -73 32 0 1 0 EN
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X +IN 2 -400 100 100 R 40 40 1 1 I
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X -IN 3 -400 -100 100 R 40 40 1 1 I
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X GND 6 100 -200 100 U 40 40 1 1 W
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X LA_EN 5 -100 -300 100 U 40 40 1 1 I
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X OUT 7 400 100 100 L 40 40 1 1 O
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X OUT\ 8 400 -100 100 L 40 40 1 1 O
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X V+ 1 0 300 100 D 40 40 1 1 W
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X V- 4 0 -300 100 U 40 40 1 1 W
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1080
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# Package Name: LT1080
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# Dev Tech: ''
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# Dev Prefix:
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# Gate count = 1
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#
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DEF LT1080 ?? 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LT1080
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DRAW
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P 2 1 0 0 -300 500 300 500
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P 2 1 0 0 300 500 300 -500
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P 2 1 0 0 300 -500 -300 -500
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P 2 1 0 0 -300 -500 -300 500
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T 0 50 625 50 0 1 0 LT1080
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X C1+ 2 -500 300 200 R 40 40 1 1 B
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X C1- 4 -500 100 200 R 40 40 1 1 B
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X C2+ 5 -500 0 200 R 40 40 1 1 B
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X C2- 6 -500 -100 200 R 40 40 1 1 B
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X GND 16 500 200 200 L 40 40 1 1 B
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X NC 1 -500 400 200 R 40 40 1 1 B
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X ON/OFF 18 500 400 200 L 40 40 1 1 B
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X REC1IN 14 500 0 200 L 40 40 1 1 B
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X REC1OUT 13 500 -100 200 L 40 40 1 1 B
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X REC2IN 9 -500 -400 200 R 40 40 1 1 B
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X REC2OUT 10 500 -400 200 L 40 40 1 1 B
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X TR1IN 12 500 -200 200 L 40 40 1 1 B
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X TR1OUT 15 500 100 200 L 40 40 1 1 B
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X TR2IN 11 500 -300 200 L 40 40 1 1 B
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X TR2OUT 8 -500 -300 200 R 40 40 1 1 B
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X V+ 3 -500 200 200 R 40 40 1 1 B
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X V- 7 -500 -200 200 R 40 40 1 1 B
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X VCC 17 500 300 200 L 40 40 1 1 B
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1129CQ-5
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# Package Name: Q5-DD
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 1
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#
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DEF LT1129CQ-5 IC 0 40 Y Y 1 L N
137
# Gate Name: G$1
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# Symbol Name: LT1129
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F0 "IC" -300 250 50 H V L B
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F1 "LT1129CQ-5" 100 250 50 H V L B
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F2 "linear-technology-Q5-DD" 0 150 50 H I C C
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DRAW
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P 2 1 0 0 -300 200 300 200
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P 2 1 0 0 300 200 300 -300
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P 2 1 0 0 300 -300 -300 -300
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P 2 1 0 0 -300 -300 -300 200
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T 0 10 -230 60 0 1 0 GND
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X GND 3 0 -400 100 U 40 40 1 1 W
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X IN 5 -400 100 100 R 40 40 1 1 I
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X OUT 1 400 100 100 L 40 40 1 1 O
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X SENSE 2 400 0 100 L 40 40 1 1 I
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X SHDN\ 4 -400 -100 100 R 40 40 1 1 I
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1129CS8
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# Package Name: SOIC8
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 4
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#
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DEF LT1129CS8 IC 0 40 Y Y 4 L N
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# Gate Name: G$1
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# Symbol Name: LT1129
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F0 "IC" -300 250 50 H V L B
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F1 "LT1129CS8" 100 250 50 H V L B
168
F2 "linear-technology-SOIC8" 0 150 50 H I C C
169
DRAW
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P 2 1 0 0 -300 200 300 200
171
P 2 1 0 0 300 200 300 -300
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P 2 1 0 0 300 -300 -300 -300
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P 2 1 0 0 -300 -300 -300 200
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T 0 10 -230 60 0 1 0 GND
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X GND 3 0 -400 100 U 40 40 1 1 W
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X IN 8 -400 100 100 R 40 40 1 1 I
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X OUT 1 400 100 100 L 40 40 1 1 O
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X SENSE 2 400 0 100 L 40 40 1 1 I
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X SHDN\ 5 -400 -100 100 R 40 40 1 1 I
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# Gate Name: G$2
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# Symbol Name: NC
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X NC 4 0 -100 100 U 40 40 2 1 U
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# Gate Name: G1
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# Symbol Name: GND
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X GND 6 0 -100 100 U 40 40 3 1 W
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# Gate Name: G2
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# Symbol Name: GND
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X GND 7 0 -100 100 U 40 40 4 1 W
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1129CST5
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# Package Name: SOT223
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 2
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#
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DEF LT1129CST5 IC 0 40 Y Y 2 L N
200
# Gate Name: G$1
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# Symbol Name: LT1129-3
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F0 "IC" -300 250 50 H V L B
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F1 "LT1129CST5" 100 250 50 H V L B
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F2 "linear-technology-SOT223" 0 150 50 H I C C
205
DRAW
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P 2 1 0 0 -300 200 300 200
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P 2 1 0 0 300 200 300 -100
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P 2 1 0 0 300 -100 -300 -100
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P 2 1 0 0 -300 -100 -300 200
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T 0 10 -30 60 0 1 0 GND
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X GND 2 0 -200 100 U 40 40 1 1 W
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X IN 1 -400 100 100 R 40 40 1 1 I
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X OUT 3 400 100 100 L 40 40 1 1 O
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# Gate Name: GND
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# Symbol Name: GND
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X GND 4 0 -100 100 U 40 40 2 1 W
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1129CT-5
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# Package Name: TO220-5
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 1
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#
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DEF LT1129CT-5 IC 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LT1129
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F0 "IC" -300 250 50 H V L B
231
F1 "LT1129CT-5" 100 250 50 H V L B
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F2 "linear-technology-TO220-5" 0 150 50 H I C C
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DRAW
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P 2 1 0 0 -300 200 300 200
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P 2 1 0 0 300 200 300 -300
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P 2 1 0 0 300 -300 -300 -300
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P 2 1 0 0 -300 -300 -300 200
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T 0 10 -230 60 0 1 0 GND
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X GND 3 0 -400 100 U 40 40 1 1 W
240
X IN 5 -400 100 100 R 40 40 1 1 I
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X OUT 1 400 100 100 L 40 40 1 1 O
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X SENSE 2 400 0 100 L 40 40 1 1 I
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X SHDN\ 4 -400 -100 100 R 40 40 1 1 I
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ENDDRAW
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ENDDEF
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#
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# Dev Name: LT1310
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# Package Name: SOIC8
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# Dev Tech: ''
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# Dev Prefix:
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# Gate count = 1
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#
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DEF LT1310 ?? 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LT1310
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DRAW
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P 2 1 0 0 -200 300 200 300
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P 2 1 0 0 200 300 200 -200
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P 2 1 0 0 200 -200 -200 -200
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P 2 1 0 0 -200 -200 -200 300
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T 0 36 363 50 0 1 0 LT1310
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X 1/GND 1 -400 200 200 R 40 40 1 1 B
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X 2/SEL 2 -400 100 200 R 40 40 1 1 B
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X 3/SHDN 3 -400 0 200 R 40 40 1 1 B
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X 4/SENSE 4 -400 -100 200 R 40 40 1 1 B
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X 5/ILIM 5 400 -100 200 L 40 40 1 1 B
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X 6/VIN 6 400 0 200 L 40 40 1 1 B
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X 7/SW 7 400 100 200 L 40 40 1 1 B
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X 8/PGND 8 400 200 200 L 40 40 1 1 B
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ENDDRAW
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ENDDEF
273
 
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#
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# Dev Name: LTC1658MS8
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# Package Name: MSOP8
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# Dev Tech: ''
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# Dev Prefix: IC
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# Gate count = 1
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#
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DEF LTC1658MS8 IC 0 40 Y Y 1 L N
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# Gate Name: G$1
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# Symbol Name: LTC1658
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F0 "IC" -400 525 50 H V L B
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F1 "LTC1658MS8" -400 -600 50 H V L B
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F2 "linear-technology-MSOP8" 0 150 50 H I C C
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DRAW
288
P 2 1 0 0 -400 -500 400 -500
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P 2 1 0 0 400 -500 400 500
290
P 2 1 0 0 400 500 -400 500
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P 2 1 0 0 -400 500 -400 -500
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X CLK 1 -500 -100 100 R 40 40 1 1 I
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X CS\LD 3 -500 -200 100 R 40 40 1 1 I
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X DIN 2 -500 0 100 R 40 40 1 1 I
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X DOUT 4 500 0 100 L 40 40 1 1 O
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X GND 5 -500 -400 100 R 40 40 1 1 W
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X VCC 8 -500 400 100 R 40 40 1 1 W
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X VOUT 7 500 300 100 L 40 40 1 1 O
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X VREF 6 -500 200 100 R 40 40 1 1 I
300
ENDDRAW
301
ENDDEF
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#End Library

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