OpenCores
URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [tags/] [V2_1/] [tools/] [boot.asm] - Blame information for rev 28

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 20 rhoads
##################################################################
2
# TITLE: Boot Up Code
3
# AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
4
# DATE CREATED: 1/12/02
5
# FILENAME: boot.asm
6
# PROJECT: MIPS CPU core
7
# COPYRIGHT: Software placed into the public domain by the author.
8
#    Software 'as is' without warranty.  Author liable for nothing.
9
# DESCRIPTION:
10
#    Initializes the stack pointer and jumps to main2().
11
##################################################################
12
        .text
13
        .align  2
14
        .globl  entry
15
        .ent    entry
16
entry:
17
   .set noreorder
18
 
19 28 rhoads
   #These eight instructions must be the first instructions
20
   #convert.exe will correctly initialize $gp
21
   lui   $gp,0
22
   ori   $gp,$gp,0
23
   #convert.exe will set $4=.sbss_start $5=.bss_end
24
   ori   $4,$0,0
25
   ori   $5,$0,0
26
$BSS_CLEAR:
27
   sw    $0,0($4)
28
   slt   $3,$4,$5
29
   bnez  $3,$BSS_CLEAR
30
   addiu $4,$4,4
31
 
32
   ori   $sp,$0,0xfff0     #initialize stack pointer
33 20 rhoads
        jal     main2
34
   nop
35
$L1:
36
   j $L1
37
 
38
   #address 0x30
39
interrupt_service_routine:
40 28 rhoads
   #registers $26 and $27 are reserved for the OS
41
   ori $26,$0,0xffff
42
   ori $27,$0,46
43
   sb $27,0($26)           #echo out '.'
44 20 rhoads
 
45
   #normally clear the interrupt source here
46
 
47 28 rhoads
   #return and re-enable interrupts
48
   ori $26,$0,0x1
49
   mfc0 $27,$14      #C0_EPC=14
50
   jr $27
51
   mtc0 $26,$12      #STATUS=1; enable interrupts
52
   .set reorder
53
        .end    entry
54 20 rhoads
 
55
 
56 28 rhoads
###################################################
57
   .globl isr_enable
58
   .ent isr_enable
59
isr_enable:
60
   .set noreorder
61
   jr $31
62
   mtc0  $4,$12            #STATUS=1; enable interrupts
63 20 rhoads
   .set reorder
64 28 rhoads
   .end isr_enable
65 20 rhoads
 
66 28 rhoads
 
67
###################################################
68
        .globl  putchar
69
        .ent    putchar
70
putchar:
71
   .set noreorder
72
   li $5,0xffff
73
 
74
   #uncomment to make each character on a seperate line
75
#   sb $4,0($5)
76
#   ori $4,$0,'\n'
77
 
78
   jr $31
79
   sb $4,0($5)
80
   .set reorder
81
   .end putchar
82
 
83
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.