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/*-------------------------------------------------------------------
-- TITLE: Plasma CPU in software.  Executes MIPS(tm) opcodes.
-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
-- DATE CREATED: 1/31/01
-- FILENAME: mlite.c
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
--    Software 'as is' without warranty.  Author liable for nothing.
-- DESCRIPTION:
--   Plasma CPU simulator in C code.
--   This file served as the starting point for the VHDL code.
--------------------------------------------------------------------*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <assert.h>
 
#define MEM_SIZE (1024*1024*2)
#define ntohs(A) ( ((A)>>8) | (((A)&0xff)<<8) )
#define htons(A) ntohs(A)
#define ntohl(A) ( ((A)>>24) | (((A)&0xff0000)>>8) | (((A)&0xff00)<<8) | ((A)<<24) )
#define htonl(A) ntohl(A)
 
// int getch(void);
#ifndef WIN32
#define getch getchar
void Sleep(unsigned long value)
{
   volatile unsigned long count = value*1000000;
   while(--count > 0) ;
}
#else
extern void __stdcall Sleep(unsigned long value);
#endif
 
#define UART_WRITE        0x20000000
#define UART_READ         0x20000000
#define IRQ_MASK          0x20000010
#define IRQ_STATUS        0x20000020
 
#define IRQ_UART_READ_AVAILABLE  0x01
#define IRQ_UART_WRITE_AVAILABLE 0x02
#define IRQ_COUNTER18_NOT        0x04
#define IRQ_COUNTER18            0x08
 
typedef struct {
   long r[32];
   long pc,pc_next;
   long hi;
   long lo;
   long skip;
   unsigned char *mem;
   long wakeup;
   long big_endian;
} State;
 
static char *opcode_string[]={
   "SPECIAL","REGIMM","J","JAL","BEQ","BNE","BLEZ","BGTZ",
   "ADDI","ADDIU","SLTI","SLTIU","ANDI","ORI","XORI","LUI",
   "COP0","COP1","COP2","COP3","BEQL","BNEL","BLEZL","BGTZL",
   "?","?","?","?","?","?","?","?",
   "LB","LH","LWL","LW","LBU","LHU","LWR","?",
   "SB","SH","SWL","SW","?","?","SWR","CACHE",
   "LL","LWC1","LWC2","LWC3","?","LDC1","LDC2","LDC3"
   "SC","SWC1","SWC2","SWC3","?","SDC1","SDC2","SDC3"
};
 
static char *special_string[]={
   "SLL","?","SRL","SRA","SLLV","?","SRLV","SRAV",
   "JR","JALR","MOVZ","MOVN","SYSCALL","BREAK","?","SYNC",
   "MFHI","MTHI","MFLO","MTLO","?","?","?","?",
   "MULT","MULTU","DIV","DIVU","?","?","?","?",
   "ADD","ADDU","SUB","SUBU","AND","OR","XOR","NOR",
   "?","?","SLT","SLTU","?","DADDU","?","?",
   "TGE","TGEU","TLT","TLTU","TEQ","?","TNE","?",
   "?","?","?","?","?","?","?","?"
};
 
static char *regimm_string[]={
   "BLTZ","BGEZ","BLTZL","BGEZL","?","?","?","?",
   "TGEI","TGEIU","TLTI","TLTIU","TEQI","?","TNEI","?",
   "BLTZAL","BEQZAL","BLTZALL","BGEZALL","?","?","?","?",
   "?","?","?","?","?","?","?","?"
};
 
static long big_endian=1;
 
static unsigned long HWMemory[3];
 
static unsigned char SRAM[1024*1024];
 
 
static long mem_read(State *s, long size, unsigned long address)
{
   unsigned long value=0, ptr;
 
   HWMemory[2] |= IRQ_UART_WRITE_AVAILABLE;
   switch(address)
   {
      case UART_READ:
         if(kbhit())
            HWMemory[0] = getch();
         HWMemory[2] &= ~IRQ_UART_READ_AVAILABLE; //clear bit
         return HWMemory[0];
      case IRQ_MASK:
         return HWMemory[1];
      case IRQ_MASK + 4:
         Sleep(10);
         return 0;
      case IRQ_STATUS:
         if(kbhit())
            HWMemory[2] |= IRQ_UART_READ_AVAILABLE;
         return HWMemory[2];
   }
 
   ptr = (unsigned long)s->mem + (address % MEM_SIZE);
 
   if(0x10000000 <= address && address < 0x10000000 + 1024*1024)
      ptr = (unsigned long)SRAM + address - 0x10000000;
 
   switch(size)
   {
      case 4:
         if(address & 3)
            printf("Unaligned access PC=0x%x data=0x%x\n", s->pc, address);
         assert((address & 3) == 0);
         value = *(long*)ptr;
         if(big_endian)
            value = ntohl(value);
         break;
      case 2:
         assert((address & 1) == 0);
         value = *(unsigned short*)ptr;
         if(big_endian)
            value = ntohs((unsigned short)value);
         break;
      case 1:
         value = *(unsigned char*)ptr;
         break;
      default:
         printf("ERROR");
   }
   return(value);
}
 
static void mem_write(State *s, long size, long unsigned address, unsigned long value)
{
   static char_count=0;
   unsigned long ptr;
 
   switch(address)
   {
      case UART_WRITE:
         putch(value);
         return;
      case IRQ_MASK:
         HWMemory[1] = value;
         return;
      case IRQ_STATUS:
         HWMemory[2] = value;
         return;
   }
 
   ptr = (unsigned long)s->mem + (address % MEM_SIZE);
 
   if(0x10000000 <= address && address < 0x10000000 + 1024*1024)
      ptr = (unsigned long)SRAM + address - 0x10000000;
 
   switch(size)
   {
      case 4:
         assert((address & 3) == 0);
         if(big_endian)
            value = htonl(value);
         *(long*)ptr = value;
         break;
      case 2:
         assert((address & 1) == 0);
         if(big_endian)
            value = htons((unsigned short)value);
         *(short*)ptr = (unsigned short)value;
         break;
      case 1:
         *(char*)ptr = (unsigned char)value;
         break;
      default:
         printf("ERROR");
   }
}
 
void mult_big(unsigned long a,
              unsigned long b,
              unsigned long *hi,
              unsigned long *lo)
{
   unsigned long ahi, alo, bhi, blo;
   unsigned long c0, c1, c2;
   unsigned long c1_a, c1_b;
 
   //printf("mult_big(0x%x, 0x%x)\n", a, b);
   ahi = a >> 16;
   alo = a & 0xffff;
   bhi = b >> 16;
   blo = b & 0xffff;
 
   c0 = alo * blo;
   c1_a = ahi * blo;
   c1_b = alo * bhi;
   c2 = ahi * bhi;
 
   c2 += (c1_a >> 16) + (c1_b >> 16);
   c1 = (c1_a & 0xffff) + (c1_b & 0xffff) + (c0 >> 16);
   c2 += (c1 >> 16);
   c0 = (c1 << 16) + (c0 & 0xffff);
   //printf("answer=0x%x 0x%x\n", c2, c0);
   *hi = c2;
   *lo = c0;
}
 
void mult_big_signed(long a,
                     long b,
                     unsigned long *hi,
                     unsigned long *lo)
{
   unsigned long ahi, alo, bhi, blo;
   unsigned long c0, c1, c2;
   unsigned long c1_a, c1_b;
 
   //printf("mult_big_signed(0x%x, 0x%x)\n", a, b);
   ahi = a >> 16;
   alo = a & 0xffff;
   bhi = b >> 16;
   blo = b & 0xffff;
 
   c0 = alo * blo;
   c1_a = ahi * blo;
   c1_b = alo * bhi;
   c2 = ahi * bhi;
 
   c2 += (c1_a >> 16) + (c1_b >> 16);
   c1 = (c1_a & 0xffff) + (c1_b & 0xffff) + (c0 >> 16);
   c2 += (c1 >> 16);
   c0 = (c1 << 16) + (c0 & 0xffff);
   //printf("answer=0x%x 0x%x\n", c2, c0);
   *hi = c2;
   *lo = c0;
}
 
//execute one cycle of a Plasma CPU
void cycle(State *s, int show_mode)
{
   unsigned long opcode;
   unsigned long op, rs, rt, rd, re, func, imm, target;
   long imm_shift, branch=0, lbranch=2;
   long *r=s->r;
   unsigned long *u=(unsigned long*)s->r;
   unsigned long ptr;
   opcode = mem_read(s, 4, s->pc);
   op = (opcode >> 26) & 0x3f;
   rs = (opcode >> 21) & 0x1f;
   rt = (opcode >> 16) & 0x1f;
   rd = (opcode >> 11) & 0x1f;
   re = (opcode >> 6) & 0x1f;
   func = opcode & 0x3f;
   imm = opcode & 0xffff;
   imm_shift = (((long)(short)imm) << 2) - 4;
   target = (opcode << 6) >> 4;
   ptr = (short)imm + r[rs];
   r[0] = 0;
   if(show_mode)
   {
      printf("%8.8lx %8.8lx ", s->pc,opcode);
      if(op == 0)
         printf("%8s ", special_string[func]);
      else if(op == 1)
         printf("%8s ", regimm_string[rt]);
      else
         printf("%8s ", opcode_string[op]);
      printf("$%2.2ld $%2.2ld $%2.2ld $%2.2ld ", rs, rt, rd, re);
      printf("%4.4lx\n", imm);
   }
   if(show_mode > 5)
      return;
   s->pc = s->pc_next;
   s->pc_next = s->pc_next + 4;
   if(s->skip)
   {
      s->skip = 0;
      return;
   }
   switch(op)
   {
      case 0x00:/*SPECIAL*/
         switch(func)
         {
            case 0x00:/*SLL*/  r[rd]=r[rt]<<re;          break;
            case 0x02:/*SRL*/  r[rd]=u[rt]>>re;          break;
            case 0x03:/*SRA*/  r[rd]=r[rt]>>re;          break;
            case 0x04:/*SLLV*/ r[rd]=r[rt]<<r[rs];       break;
            case 0x06:/*SRLV*/ r[rd]=u[rt]>>r[rs];       break;
            case 0x07:/*SRAV*/ r[rd]=r[rt]>>r[rs];       break;
            case 0x08:/*JR*/   s->pc_next=r[rs];         break;
            case 0x09:/*JALR*/ r[rd]=s->pc_next; s->pc_next=r[rs]; break;
            case 0x0a:/*MOVZ*/ if(!r[rt]) r[rd]=r[rs];   break;  /*IV*/
            case 0x0b:/*MOVN*/ if(r[rt]) r[rd]=r[rs];    break;  /*IV*/
            case 0x0c:/*SYSCALL*/                        break;
            case 0x0d:/*BREAK*/ s->wakeup=1;             break;
            case 0x0f:/*SYNC*/ s->wakeup=1;              break;
            case 0x10:/*MFHI*/ r[rd]=s->hi;              break;
            case 0x11:/*FTHI*/ s->hi=r[rs];              break;
            case 0x12:/*MFLO*/ r[rd]=s->lo;              break;
            case 0x13:/*MTLO*/ s->lo=r[rs];              break;
            case 0x18:/*MULT*/ mult_big_signed(r[rs],r[rt],&s->hi,&s->lo); break;
            case 0x19:/*MULTU*/ //s->lo=r[rs]*r[rt]; s->hi=0; break;
                               mult_big(r[rs],r[rt],&s->hi,&s->lo); break;
            case 0x1a:/*DIV*/  s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt]; break;
            case 0x1b:/*DIVU*/ s->lo=u[rs]/u[rt]; s->hi=u[rs]%u[rt]; break;
            case 0x20:/*ADD*/  r[rd]=r[rs]+r[rt];        break;
            case 0x21:/*ADDU*/ r[rd]=r[rs]+r[rt];        break;
            case 0x22:/*SUB*/  r[rd]=r[rs]-r[rt];        break;
            case 0x23:/*SUBU*/ r[rd]=r[rs]-r[rt];        break;
            case 0x24:/*AND*/  r[rd]=r[rs]&r[rt];        break;
            case 0x25:/*OR*/   r[rd]=r[rs]|r[rt];        break;
            case 0x26:/*XOR*/  r[rd]=r[rs]^r[rt];        break;
            case 0x27:/*NOR*/  r[rd]=~(r[rs]|r[rt]);     break;
            case 0x2a:/*SLT*/  r[rd]=r[rs]<r[rt];        break;
            case 0x2b:/*SLTU*/ r[rd]=u[rs]<u[rt];        break;
            case 0x2d:/*DADDU*/r[rd]=r[rs]+u[rt];        break;
            case 0x31:/*TGEU*/ break;
            case 0x32:/*TLT*/  break;
            case 0x33:/*TLTU*/ break;
            case 0x34:/*TEQ*/  break;
            case 0x36:/*TNE*/  break;
            default: printf("ERROR0(*0x%x~0x%x)\n",s->pc,opcode);
               s->wakeup=1;
         }
         break;
      case 0x01:/*REGIMM*/
         switch(rt) {
            case 0x10:/*BLTZAL*/ r[31]=s->pc_next;
            case 0x00:/*BLTZ*/   branch=r[rs]<0;    break;
            case 0x11:/*BGEZAL*/ r[31]=s->pc_next;
            case 0x01:/*BGEZ*/   branch=r[rs]>=0;   break;
            case 0x12:/*BLTZALL*/r[31]=s->pc_next;
            case 0x02:/*BLTZL*/  lbranch=r[rs]<0;   break;
            case 0x13:/*BGEZALL*/r[31]=s->pc_next;
            case 0x03:/*BGEZL*/  lbranch=r[rs]>=0;  break;
            default: printf("ERROR1\n"); s->wakeup=1;
          }
         break;
      case 0x03:/*JAL*/    r[31]=s->pc_next;
      case 0x02:/*J*/      s->pc_next=(s->pc&0xf0000000)|target; break;
      case 0x04:/*BEQ*/    branch=r[rs]==r[rt];     break;
      case 0x05:/*BNE*/    branch=r[rs]!=r[rt];     break;
      case 0x06:/*BLEZ*/   branch=r[rs]<=0;         break;
      case 0x07:/*BGTZ*/   branch=r[rs]>0;          break;
      case 0x08:/*ADDI*/   r[rt]=r[rs]+(short)imm;  break;
      case 0x09:/*ADDIU*/  u[rt]=u[rs]+(short)imm;  break;
      case 0x0a:/*SLTI*/   r[rt]=r[rs]<(short)imm;  break;
      case 0x0b:/*SLTIU*/  u[rt]=u[rs]<(unsigned long)(short)imm; break;
      case 0x0c:/*ANDI*/   r[rt]=r[rs]&imm;         break;
      case 0x0d:/*ORI*/    r[rt]=r[rs]|imm;         break;
      case 0x0e:/*XORI*/   r[rt]=r[rs]^imm;         break;
      case 0x0f:/*LUI*/    r[rt]=(imm<<16);         break;
      case 0x10:/*COP0*/ break;
//      case 0x11:/*COP1*/ break;
//      case 0x12:/*COP2*/ break;
//      case 0x13:/*COP3*/ break;
      case 0x14:/*BEQL*/   lbranch=r[rs]==r[rt];    break;
      case 0x15:/*BNEL*/   lbranch=r[rs]!=r[rt];    break;
      case 0x16:/*BLEZL*/  lbranch=r[rs]<=0;        break;
      case 0x17:/*BGTZL*/  lbranch=r[rs]>0;         break;
//      case 0x1c:/*MAD*/  break;   /*IV*/
      case 0x20:/*LB*/   r[rt]=(signed char)mem_read(s,1,ptr);  break;
      case 0x21:/*LH*/   r[rt]=(signed short)mem_read(s,2,ptr); break;
      case 0x22:/*LWL*/  rt=rt; //fixme fall through
      case 0x23:/*LW*/   r[rt]=mem_read(s,4,ptr);   break;
      case 0x24:/*LBU*/  r[rt]=(unsigned char)mem_read(s,1,ptr); break;
      case 0x25:/*LHU*/  r[rt]=(unsigned short)mem_read(s,2,ptr); break;
      case 0x26:/*LWR*/  break; //fixme
      case 0x28:/*SB*/   mem_write(s,1,ptr,r[rt]);  break;
      case 0x29:/*SH*/   mem_write(s,2,ptr,r[rt]);  break;
      case 0x2a:/*SWL*/  rt=rt; //fixme fall through
      case 0x2b:/*SW*/   mem_write(s,4,ptr,r[rt]);  break;
      case 0x2e:/*SWR*/  break; //fixme
      case 0x2f:/*CACHE*/break;
      case 0x30:/*LL*/   r[rt]=mem_read(s,4,ptr);   break;
//      case 0x31:/*LWC1*/ break;
//      case 0x32:/*LWC2*/ break;
//      case 0x33:/*LWC3*/ break;
//      case 0x35:/*LDC1*/ break;
//      case 0x36:/*LDC2*/ break;
//      case 0x37:/*LDC3*/ break;
//      case 0x38:/*SC*/     *(long*)ptr=r[rt]; r[rt]=1; break;
      case 0x38:/*SC*/     mem_write(s,4,ptr,r[rt]); r[rt]=1; break;
//      case 0x39:/*SWC1*/ break;
//      case 0x3a:/*SWC2*/ break;
//      case 0x3b:/*SWC3*/ break;
//      case 0x3d:/*SDC1*/ break;
//      case 0x3e:/*SDC2*/ break;
//      case 0x3f:/*SDC3*/ break;
      default: printf("ERROR2 address=0x%x opcode=0x%x\n",
         s->pc,opcode); s->wakeup=1;
//         exit(0);
   }
   s->pc_next += branch | (lbranch == 1) ? imm_shift : 0;
   s->skip = (lbranch == 0);
}
 
void show_state(State *s)
{
   long i,j;
   for(i = 0; i < 4; ++i)
   {
      printf("%2.2ld ", i * 8);
      for(j = 0; j < 8; ++j)
      {
         printf("%8.8lx ", s->r[i*8+j]);
      }
      printf("\n");
   }
   printf("%8.8lx %8.8lx %8.8lx %8.8lx\n", s->pc, s->pc_next, s->hi, s->lo);
   j = s->pc;
   for(i = -4; i <= 8; ++i)
   {
      printf("%c", i==0 ? '*' : ' ');
      s->pc = j + i * 4;
      cycle(s, 10);
   }
   s->pc = j;
}
 
void do_debug(State *s)
{
   int ch;
   long i, j=0, watch=0, addr;
   s->pc_next = s->pc + 4;
   s->skip = 0;
   s->wakeup = 0;
   show_state(s);
   for(;;)
   {
      if(watch)
         printf("0x%8.8lx=0x%8.8lx\n", watch, mem_read(s, 4, watch));
      printf("1=Debug 2=Trace 3=Step 4=BreakPt 5=Go 6=Memory ");
      printf("7=Watch 8=Jump 9=Quit> ");
      ch = getch();
      printf("\n");
      switch(ch)
      {
      case '1': case 'd': case ' ':
         cycle(s,0); show_state(s); break;
      case '2': case 't':
         cycle(s,0); printf("*"); cycle(s,10); break;
      case '3': case 's':
         printf("Count> ");
         scanf("%ld", &j);
         for(i = 0; i < j; ++i)
            cycle(s,0);
         show_state(s);
         break;
      case '4': case 'b':
         printf("Line> ");
         scanf("%lx", &j);
         printf("break point=0x%x\n", j);
         break;
      case '5': case 'g':
         s->wakeup = 0;
         cycle(s, 0);
         while(s->wakeup == 0)
         {
            //printf("0x%x ", s->pc);
            if(s->pc == j)
               break;
            cycle(s, 0);
         }
         show_state(s);
         break;
      case '6': case 'm':
         printf("Memory> ");
         scanf("%lx", &j);
         for(i = 0; i < 8; ++i)
         {
            printf("%8.8lx ", mem_read(s, 4, j+i*4));
         }
         printf("\n");
         break;
      case '7': case 'w':
         printf("Watch> ");
         scanf("%lx", &watch);
         break;
      case '8': case 'j':
         printf("Jump> ");
         scanf("%lx", &addr);
         s->pc = addr;
         s->pc_next = addr + 4;
         show_state(s);
         break;
      case '9': case 'q':
         return;
      }
   }
}
/************************************************************/
 
int main(int argc,char *argv[])
{
   State state, *s=&state;
   FILE *in;
   long bytes, index;
   printf("Plasma emulator\n");
   memset(s, 0, sizeof(State));
   s->big_endian = 1;
   s->mem = (unsigned char*)malloc(MEM_SIZE);
   if(argc <= 1)
   {
      printf("   Usage:  mlite file.exe\n");
      printf("           mlite file.exe B   {for big_endian}\n");
      printf("           mlite file.exe L   {for little_endian}\n");
      printf("           mlite file.exe BD  {disassemble big_endian}\n");
      printf("           mlite file.exe LD  {disassemble little_endian}\n");
 
      return 0;
   }
   in = fopen(argv[1], "rb");
   if(in == NULL)
   {
      printf("Can't open file %s!\n",argv[1]);
      getch();
      return(0);
   }
   bytes = fread(s->mem, 1, MEM_SIZE, in);
   fclose(in);
   memcpy(SRAM, s->mem, bytes);
   printf("Read %ld bytes.\n", bytes);
   if(argc == 3 && argv[2][0] == 'B')
   {
      printf("Big Endian\n");
      s->big_endian = 1;
      big_endian = 1;
   }
   if(argc == 3 && argv[2][0] == 'L')
   {
      printf("Big Endian\n");
      s->big_endian = 0;
      big_endian = 0;
   }
   if(argc == 3 && argv[2][0] == 'S')
   {  /*make big endian*/
      printf("Big Endian\n");
      for(index = 0; index < bytes+3; index += 4)
      {
         *(unsigned long*)&s->mem[index] = htonl(*(unsigned long*)&s->mem[index]);
      }
      in = fopen("big.exe", "wb");
      fwrite(s->mem, bytes, 1, in);
      fclose(in);
      return(0);
   }
   if(argc == 3 && argv[2][1] == 'D')
   {  /*dump image*/
      for(index = 0; index < bytes; index += 4) {
         s->pc = index;
         cycle(s, 10);
      }
      free(s->mem);
      return(0);
   }
   s->pc = 0x0;
   index = mem_read(s, 4, 0);
   if(index == 0x3c1c1000)
      s->pc = 0x10000000;
   do_debug(s);
   free(s->mem);
   return(0);
}
 

Line No.	Rev	Author	Line
1	41	rhoads	`/*-------------------------------------------------------------------`
2	43	rhoads	`-- TITLE: Plasma CPU in software. Executes MIPS(tm) opcodes.`
3	41	rhoads	`-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)`
4			`-- DATE CREATED: 1/31/01`
5			`-- FILENAME: mlite.c`
6	43	rhoads	`-- PROJECT: Plasma CPU core`
7	41	rhoads	`-- COPYRIGHT: Software placed into the public domain by the author.`
8			`-- Software 'as is' without warranty. Author liable for nothing.`
9			`-- DESCRIPTION:`
10	43	rhoads	`-- Plasma CPU simulator in C code.`
11	41	rhoads	`-- This file served as the starting point for the VHDL code.`
12			`--------------------------------------------------------------------*/`
13			`#include <stdio.h>`
14			`#include <stdlib.h>`
15			`#include <string.h>`
16			`#include <ctype.h>`
17	137	rhoads	`#include <assert.h>`
18	41	rhoads
19			`#define MEM_SIZE (102410242)`
20			`#define ntohs(A) ( ((A)>>8) \| (((A)&0xff)<<8) )`
21			`#define htons(A) ntohs(A)`
22			`#define ntohl(A) ( ((A)>>24) \| (((A)&0xff0000)>>8) \| (((A)&0xff00)<<8) \| ((A)<<24) )`
23			`#define htonl(A) ntohl(A)`
24
25	104	rhoads	`// int getch(void);`
26	137	rhoads	`#ifndef WIN32`
27	104	rhoads	`#define getch getchar`
28	137	rhoads	`void Sleep(unsigned long value)`
29			`{`
30			`volatile unsigned long count = value*1000000;`
31			`while(--count > 0) ;`
32			`}`
33			`#else`
34			`extern void __stdcall Sleep(unsigned long value);`
35			`#endif`
36	41	rhoads
37	137	rhoads	`#define UART_WRITE 0x20000000`
38			`#define UART_READ 0x20000000`
39			`#define IRQ_MASK 0x20000010`
40			`#define IRQ_STATUS 0x20000020`
41
42			`#define IRQ_UART_READ_AVAILABLE 0x01`
43			`#define IRQ_UART_WRITE_AVAILABLE 0x02`
44			`#define IRQ_COUNTER18_NOT 0x04`
45			`#define IRQ_COUNTER18 0x08`
46
47	41	rhoads	`typedef struct {`
48			`long r[32];`
49			`long pc,pc_next;`
50			`long hi;`
51			`long lo;`
52			`long skip;`
53	137	rhoads	`unsigned char *mem;`
54	41	rhoads	`long wakeup;`
55			`long big_endian;`
56			`} State;`
57
58			`static char *opcode_string[]={`
59			`"SPECIAL","REGIMM","J","JAL","BEQ","BNE","BLEZ","BGTZ",`
60			`"ADDI","ADDIU","SLTI","SLTIU","ANDI","ORI","XORI","LUI",`
61			`"COP0","COP1","COP2","COP3","BEQL","BNEL","BLEZL","BGTZL",`
62			`"?","?","?","?","?","?","?","?",`
63			`"LB","LH","LWL","LW","LBU","LHU","LWR","?",`
64			`"SB","SH","SWL","SW","?","?","SWR","CACHE",`
65			`"LL","LWC1","LWC2","LWC3","?","LDC1","LDC2","LDC3"`
66			`"SC","SWC1","SWC2","SWC3","?","SDC1","SDC2","SDC3"`
67			`};`
68
69			`static char *special_string[]={`
70			`"SLL","?","SRL","SRA","SLLV","?","SRLV","SRAV",`
71			`"JR","JALR","MOVZ","MOVN","SYSCALL","BREAK","?","SYNC",`
72			`"MFHI","MTHI","MFLO","MTLO","?","?","?","?",`
73			`"MULT","MULTU","DIV","DIVU","?","?","?","?",`
74			`"ADD","ADDU","SUB","SUBU","AND","OR","XOR","NOR",`
75			`"?","?","SLT","SLTU","?","DADDU","?","?",`
76			`"TGE","TGEU","TLT","TLTU","TEQ","?","TNE","?",`
77			`"?","?","?","?","?","?","?","?"`
78			`};`
79
80			`static char *regimm_string[]={`
81			`"BLTZ","BGEZ","BLTZL","BGEZL","?","?","?","?",`
82			`"TGEI","TGEIU","TLTI","TLTIU","TEQI","?","TNEI","?",`
83			`"BLTZAL","BEQZAL","BLTZALL","BGEZALL","?","?","?","?",`
84			`"?","?","?","?","?","?","?","?"`
85			`};`
86
87	137	rhoads	`static long big_endian=1;`
88	41	rhoads
89	137	rhoads	`static unsigned long HWMemory[3];`
90
91			`static unsigned char SRAM[1024*1024];`
92
93
94			`static long mem_read(State *s, long size, unsigned long address)`
95	41	rhoads	`{`
96	137	rhoads	`unsigned long value=0, ptr;`
97
98			`HWMemory[2] \|= IRQ_UART_WRITE_AVAILABLE;`
99			`switch(address)`
100			`{`
101			`case UART_READ:`
102			`if(kbhit())`
103			`HWMemory[0] = getch();`
104			`HWMemory[2] &= ~IRQ_UART_READ_AVAILABLE; //clear bit`
105			`return HWMemory[0];`
106			`case IRQ_MASK:`
107			`return HWMemory[1];`
108			`case IRQ_MASK + 4:`
109			`Sleep(10);`
110			`return 0;`
111			`case IRQ_STATUS:`
112			`if(kbhit())`
113			`HWMemory[2] \|= IRQ_UART_READ_AVAILABLE;`
114			`return HWMemory[2];`
115			`}`
116
117			`ptr = (unsigned long)s->mem + (address % MEM_SIZE);`
118
119			`if(0x10000000 <= address && address < 0x10000000 + 1024*1024)`
120			`ptr = (unsigned long)SRAM + address - 0x10000000;`
121
122			`switch(size)`
123			`{`
124			`case 4:`
125			`if(address & 3)`
126			`printf("Unaligned access PC=0x%x data=0x%x\n", s->pc, address);`
127			`assert((address & 3) == 0);`
128			`value = (long)ptr;`
129			`if(big_endian)`
130			`value = ntohl(value);`
131	41	rhoads	`break;`
132			`case 2:`
133	137	rhoads	`assert((address & 1) == 0);`
134			`value = (unsigned short)ptr;`
135			`if(big_endian)`
136			`value = ntohs((unsigned short)value);`
137	41	rhoads	`break;`
138			`case 1:`
139	137	rhoads	`value = (unsigned char)ptr;`
140	41	rhoads	`break;`
141	137	rhoads	`default:`
142			`printf("ERROR");`
143	41	rhoads	`}`
144			`return(value);`
145			`}`
146
147	137	rhoads	`static void mem_write(State *s, long size, long unsigned address, unsigned long value)`
148	41	rhoads	`{`
149			`static char_count=0;`
150			`unsigned long ptr;`
151	137	rhoads
152			`switch(address)`
153			`{`
154			`case UART_WRITE:`
155			`putch(value);`
156			`return;`
157			`case IRQ_MASK:`
158			`HWMemory[1] = value;`
159			`return;`
160			`case IRQ_STATUS:`
161			`HWMemory[2] = value;`
162			`return;`
163	41	rhoads	`}`
164	137	rhoads
165			`ptr = (unsigned long)s->mem + (address % MEM_SIZE);`
166
167			`if(0x10000000 <= address && address < 0x10000000 + 1024*1024)`
168			`ptr = (unsigned long)SRAM + address - 0x10000000;`
169
170			`switch(size)`
171			`{`
172			`case 4:`
173			`assert((address & 3) == 0);`
174			`if(big_endian)`
175			`value = htonl(value);`
176			`(long)ptr = value;`
177	41	rhoads	`break;`
178			`case 2:`
179	137	rhoads	`assert((address & 1) == 0);`
180			`if(big_endian)`
181			`value = htons((unsigned short)value);`
182			`(short)ptr = (unsigned short)value;`
183	41	rhoads	`break;`
184			`case 1:`
185	137	rhoads	`(char)ptr = (unsigned char)value;`
186	41	rhoads	`break;`
187	137	rhoads	`default:`
188			`printf("ERROR");`
189	41	rhoads	`}`
190			`}`
191
192	137	rhoads	`void mult_big(unsigned long a,`
193			`unsigned long b,`
194			`unsigned long *hi,`
195			`unsigned long *lo)`
196	41	rhoads	`{`
197	137	rhoads	`unsigned long ahi, alo, bhi, blo;`
198			`unsigned long c0, c1, c2;`
199			`unsigned long c1_a, c1_b;`
200	52	rhoads
201	137	rhoads	`//printf("mult_big(0x%x, 0x%x)\n", a, b);`
202			`ahi = a >> 16;`
203			`alo = a & 0xffff;`
204			`bhi = b >> 16;`
205			`blo = b & 0xffff;`
206	52	rhoads
207	137	rhoads	`c0 = alo * blo;`
208			`c1_a = ahi * blo;`
209			`c1_b = alo * bhi;`
210			`c2 = ahi * bhi;`
211	52	rhoads
212	137	rhoads	`c2 += (c1_a >> 16) + (c1_b >> 16);`
213			`c1 = (c1_a & 0xffff) + (c1_b & 0xffff) + (c0 >> 16);`
214			`c2 += (c1 >> 16);`
215			`c0 = (c1 << 16) + (c0 & 0xffff);`
216			`//printf("answer=0x%x 0x%x\n", c2, c0);`
217			`*hi = c2;`
218			`*lo = c0;`
219	41	rhoads	`}`
220
221	137	rhoads	`void mult_big_signed(long a,`
222			`long b,`
223			`unsigned long *hi,`
224			`unsigned long *lo)`
225			`{`
226			`unsigned long ahi, alo, bhi, blo;`
227			`unsigned long c0, c1, c2;`
228			`unsigned long c1_a, c1_b;`
229
230			`//printf("mult_big_signed(0x%x, 0x%x)\n", a, b);`
231			`ahi = a >> 16;`
232			`alo = a & 0xffff;`
233			`bhi = b >> 16;`
234			`blo = b & 0xffff;`
235
236			`c0 = alo * blo;`
237			`c1_a = ahi * blo;`
238			`c1_b = alo * bhi;`
239			`c2 = ahi * bhi;`
240
241			`c2 += (c1_a >> 16) + (c1_b >> 16);`
242			`c1 = (c1_a & 0xffff) + (c1_b & 0xffff) + (c0 >> 16);`
243			`c2 += (c1 >> 16);`
244			`c0 = (c1 << 16) + (c0 & 0xffff);`
245			`//printf("answer=0x%x 0x%x\n", c2, c0);`
246			`*hi = c2;`
247			`*lo = c0;`
248			`}`
249
250	43	rhoads	`//execute one cycle of a Plasma CPU`
251	137	rhoads	`void cycle(State *s, int show_mode)`
252	41	rhoads	`{`
253			`unsigned long opcode;`
254	137	rhoads	`unsigned long op, rs, rt, rd, re, func, imm, target;`
255			`long imm_shift, branch=0, lbranch=2;`
256	41	rhoads	`long *r=s->r;`
257			`unsigned long u=(unsigned long)s->r;`
258			`unsigned long ptr;`
259	137	rhoads	`opcode = mem_read(s, 4, s->pc);`
260			`op = (opcode >> 26) & 0x3f;`
261			`rs = (opcode >> 21) & 0x1f;`
262			`rt = (opcode >> 16) & 0x1f;`
263			`rd = (opcode >> 11) & 0x1f;`
264			`re = (opcode >> 6) & 0x1f;`
265			`func = opcode & 0x3f;`
266			`imm = opcode & 0xffff;`
267			`imm_shift = (((long)(short)imm) << 2) - 4;`
268			`target = (opcode << 6) >> 4;`
269			`ptr = (short)imm + r[rs];`
270			`r[0] = 0;`
271			`if(show_mode)`
272			`{`
273			`printf("%8.8lx %8.8lx ", s->pc,opcode);`
274			`if(op == 0)`
275			`printf("%8s ", special_string[func]);`
276			`else if(op == 1)`
277			`printf("%8s ", regimm_string[rt]);`
278			`else`
279			`printf("%8s ", opcode_string[op]);`
280			`printf("$%2.2ld $%2.2ld $%2.2ld $%2.2ld ", rs, rt, rd, re);`
281			`printf("%4.4lx\n", imm);`
282	41	rhoads	`}`
283	137	rhoads	`if(show_mode > 5)`
284	41	rhoads	`return;`
285	137	rhoads	`s->pc = s->pc_next;`
286			`s->pc_next = s->pc_next + 4;`
287			`if(s->skip)`
288			`{`
289			`s->skip = 0;`
290			`return;`
291	41	rhoads	`}`
292	137	rhoads	`switch(op)`
293			`{`
294	41	rhoads	`case 0x00:/SPECIAL/`
295	137	rhoads	`switch(func)`
296			`{`
297	41	rhoads	`case 0x00:/SLL/ r[rd]=r[rt]<<re; break;`
298			`case 0x02:/SRL/ r[rd]=u[rt]>>re; break;`
299			`case 0x03:/SRA/ r[rd]=r[rt]>>re; break;`
300			`case 0x04:/SLLV/ r[rd]=r[rt]<<r[rs]; break;`
301			`case 0x06:/SRLV/ r[rd]=u[rt]>>r[rs]; break;`
302			`case 0x07:/SRAV/ r[rd]=r[rt]>>r[rs]; break;`
303			`case 0x08:/JR/ s->pc_next=r[rs]; break;`
304			`case 0x09:/JALR/ r[rd]=s->pc_next; s->pc_next=r[rs]; break;`
305			`case 0x0a:/MOVZ/ if(!r[rt]) r[rd]=r[rs]; break; /IV/`
306			`case 0x0b:/MOVN/ if(r[rt]) r[rd]=r[rs]; break; /IV/`
307			`case 0x0c:/SYSCALL/ break;`
308	137	rhoads	`case 0x0d:/BREAK/ s->wakeup=1; break;`
309			`case 0x0f:/SYNC/ s->wakeup=1; break;`
310	41	rhoads	`case 0x10:/MFHI/ r[rd]=s->hi; break;`
311			`case 0x11:/FTHI/ s->hi=r[rs]; break;`
312			`case 0x12:/MFLO/ r[rd]=s->lo; break;`
313			`case 0x13:/MTLO/ s->lo=r[rs]; break;`
314	137	rhoads	`case 0x18:/MULT/ mult_big_signed(r[rs],r[rt],&s->hi,&s->lo); break;`
315	41	rhoads	`case 0x19:/MULTU/ //s->lo=r[rs]*r[rt]; s->hi=0; break;`
316			`mult_big(r[rs],r[rt],&s->hi,&s->lo); break;`
317			`case 0x1a:/DIV/ s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt]; break;`
318			`case 0x1b:/DIVU/ s->lo=u[rs]/u[rt]; s->hi=u[rs]%u[rt]; break;`
319			`case 0x20:/ADD/ r[rd]=r[rs]+r[rt]; break;`
320			`case 0x21:/ADDU/ r[rd]=r[rs]+r[rt]; break;`
321			`case 0x22:/SUB/ r[rd]=r[rs]-r[rt]; break;`
322			`case 0x23:/SUBU/ r[rd]=r[rs]-r[rt]; break;`
323			`case 0x24:/AND/ r[rd]=r[rs]&r[rt]; break;`
324			`case 0x25:/OR/ r[rd]=r[rs]\|r[rt]; break;`
325			`case 0x26:/XOR/ r[rd]=r[rs]^r[rt]; break;`
326			`case 0x27:/NOR/ r[rd]=~(r[rs]\|r[rt]); break;`
327			`case 0x2a:/SLT/ r[rd]=r[rs]<r[rt]; break;`
328			`case 0x2b:/SLTU/ r[rd]=u[rs]<u[rt]; break;`
329			`case 0x2d:/DADDU/r[rd]=r[rs]+u[rt]; break;`
330			`case 0x31:/TGEU/ break;`
331			`case 0x32:/TLT/ break;`
332			`case 0x33:/TLTU/ break;`
333			`case 0x34:/TEQ/ break;`
334			`case 0x36:/TNE/ break;`
335			`default: printf("ERROR0(*0x%x~0x%x)\n",s->pc,opcode);`
336			`s->wakeup=1;`
337			`}`
338			`break;`
339			`case 0x01:/REGIMM/`
340			`switch(rt) {`
341			`case 0x10:/BLTZAL/ r[31]=s->pc_next;`
342	137	rhoads	`case 0x00:/BLTZ/ branch=r[rs]<0; break;`
343	41	rhoads	`case 0x11:/BGEZAL/ r[31]=s->pc_next;`
344	137	rhoads	`case 0x01:/BGEZ/ branch=r[rs]>=0; break;`
345	41	rhoads	`case 0x12:/BLTZALL/r[31]=s->pc_next;`
346	137	rhoads	`case 0x02:/BLTZL/ lbranch=r[rs]<0; break;`
347	41	rhoads	`case 0x13:/BGEZALL/r[31]=s->pc_next;`
348	137	rhoads	`case 0x03:/BGEZL/ lbranch=r[rs]>=0; break;`
349	41	rhoads	`default: printf("ERROR1\n"); s->wakeup=1;`
350			`}`
351			`break;`
352			`case 0x03:/JAL/ r[31]=s->pc_next;`
353			`case 0x02:/J/ s->pc_next=(s->pc&0xf0000000)\|target; break;`
354			`case 0x04:/BEQ/ branch=r[rs]==r[rt]; break;`
355			`case 0x05:/BNE/ branch=r[rs]!=r[rt]; break;`
356			`case 0x06:/BLEZ/ branch=r[rs]<=0; break;`
357			`case 0x07:/BGTZ/ branch=r[rs]>0; break;`
358			`case 0x08:/ADDI/ r[rt]=r[rs]+(short)imm; break;`
359			`case 0x09:/ADDIU/ u[rt]=u[rs]+(short)imm; break;`
360			`case 0x0a:/SLTI/ r[rt]=r[rs]<(short)imm; break;`
361			`case 0x0b:/SLTIU/ u[rt]=u[rs]<(unsigned long)(short)imm; break;`
362			`case 0x0c:/ANDI/ r[rt]=r[rs]&imm; break;`
363			`case 0x0d:/ORI/ r[rt]=r[rs]\|imm; break;`
364			`case 0x0e:/XORI/ r[rt]=r[rs]^imm; break;`
365			`case 0x0f:/LUI/ r[rt]=(imm<<16); break;`
366			`case 0x10:/COP0/ break;`
367			`// case 0x11:/COP1/ break;`
368			`// case 0x12:/COP2/ break;`
369			`// case 0x13:/COP3/ break;`
370			`case 0x14:/BEQL/ lbranch=r[rs]==r[rt]; break;`
371			`case 0x15:/BNEL/ lbranch=r[rs]!=r[rt]; break;`
372			`case 0x16:/BLEZL/ lbranch=r[rs]<=0; break;`
373			`case 0x17:/BGTZL/ lbranch=r[rs]>0; break;`
374			`// case 0x1c:/MAD/ break; /IV/`
375			`case 0x20:/LB/ r[rt]=(signed char)mem_read(s,1,ptr); break;`
376			`case 0x21:/LH/ r[rt]=(signed short)mem_read(s,2,ptr); break;`
377			`case 0x22:/LWL/ rt=rt; //fixme fall through`
378			`case 0x23:/LW/ r[rt]=mem_read(s,4,ptr); break;`
379			`case 0x24:/LBU/ r[rt]=(unsigned char)mem_read(s,1,ptr); break;`
380			`case 0x25:/LHU/ r[rt]=(unsigned short)mem_read(s,2,ptr); break;`
381			`case 0x26:/LWR/ break; //fixme`
382			`case 0x28:/SB/ mem_write(s,1,ptr,r[rt]); break;`
383			`case 0x29:/SH/ mem_write(s,2,ptr,r[rt]); break;`
384			`case 0x2a:/SWL/ rt=rt; //fixme fall through`
385			`case 0x2b:/SW/ mem_write(s,4,ptr,r[rt]); break;`
386			`case 0x2e:/SWR/ break; //fixme`
387			`case 0x2f:/CACHE/break;`
388			`case 0x30:/LL/ r[rt]=mem_read(s,4,ptr); break;`
389			`// case 0x31:/LWC1/ break;`
390			`// case 0x32:/LWC2/ break;`
391			`// case 0x33:/LWC3/ break;`
392			`// case 0x35:/LDC1/ break;`
393			`// case 0x36:/LDC2/ break;`
394			`// case 0x37:/LDC3/ break;`
395			`// case 0x38:/SC/ (long)ptr=r[rt]; r[rt]=1; break;`
396			`case 0x38:/SC/ mem_write(s,4,ptr,r[rt]); r[rt]=1; break;`
397			`// case 0x39:/SWC1/ break;`
398			`// case 0x3a:/SWC2/ break;`
399			`// case 0x3b:/SWC3/ break;`
400			`// case 0x3d:/SDC1/ break;`
401			`// case 0x3e:/SDC2/ break;`
402			`// case 0x3f:/SDC3/ break;`
403			`default: printf("ERROR2 address=0x%x opcode=0x%x\n",`
404			`s->pc,opcode); s->wakeup=1;`
405			`// exit(0);`
406			`}`
407	137	rhoads	`s->pc_next += branch \| (lbranch == 1) ? imm_shift : 0;`
408			`s->skip = (lbranch == 0);`
409	41	rhoads	`}`
410
411			`void show_state(State *s)`
412			`{`
413			`long i,j;`
414	137	rhoads	`for(i = 0; i < 4; ++i)`
415			`{`
416			`printf("%2.2ld ", i * 8);`
417			`for(j = 0; j < 8; ++j)`
418			`{`
419			`printf("%8.8lx ", s->r[i*8+j]);`
420	41	rhoads	`}`
421			`printf("\n");`
422			`}`
423	137	rhoads	`printf("%8.8lx %8.8lx %8.8lx %8.8lx\n", s->pc, s->pc_next, s->hi, s->lo);`
424			`j = s->pc;`
425			`for(i = -4; i <= 8; ++i)`
426			`{`
427			`printf("%c", i==0 ? '*' : ' ');`
428			`s->pc = j + i * 4;`
429			`cycle(s, 10);`
430	41	rhoads	`}`
431	137	rhoads	`s->pc = j;`
432	41	rhoads	`}`
433
434			`void do_debug(State *s)`
435			`{`
436			`int ch;`
437	137	rhoads	`long i, j=0, watch=0, addr;`
438			`s->pc_next = s->pc + 4;`
439			`s->skip = 0;`
440			`s->wakeup = 0;`
441	41	rhoads	`show_state(s);`
442	137	rhoads	`for(;;)`
443			`{`
444			`if(watch)`
445			`printf("0x%8.8lx=0x%8.8lx\n", watch, mem_read(s, 4, watch));`
446	41	rhoads	`printf("1=Debug 2=Trace 3=Step 4=BreakPt 5=Go 6=Memory ");`
447			`printf("7=Watch 8=Jump 9=Quit> ");`
448	137	rhoads	`ch = getch();`
449	41	rhoads	`printf("\n");`
450	137	rhoads	`switch(ch)`
451			`{`
452			`case '1': case 'd': case ' ':`
453			`cycle(s,0); show_state(s); break;`
454			`case '2': case 't':`
455			`cycle(s,0); printf("*"); cycle(s,10); break;`
456	41	rhoads	`case '3': case 's':`
457			`printf("Count> ");`
458	137	rhoads	`scanf("%ld", &j);`
459			`for(i = 0; i < j; ++i)`
460			`cycle(s,0);`
461	41	rhoads	`show_state(s);`
462			`break;`
463			`case '4': case 'b':`
464			`printf("Line> ");`
465	137	rhoads	`scanf("%lx", &j);`
466			`printf("break point=0x%x\n", j);`
467	41	rhoads	`break;`
468			`case '5': case 'g':`
469	137	rhoads	`s->wakeup = 0;`
470			`cycle(s, 0);`
471			`while(s->wakeup == 0)`
472			`{`
473			`//printf("0x%x ", s->pc);`
474			`if(s->pc == j)`
475			`break;`
476			`cycle(s, 0);`
477	41	rhoads	`}`
478			`show_state(s);`
479			`break;`
480			`case '6': case 'm':`
481			`printf("Memory> ");`
482	137	rhoads	`scanf("%lx", &j);`
483			`for(i = 0; i < 8; ++i)`
484			`{`
485			`printf("%8.8lx ", mem_read(s, 4, j+i*4));`
486	41	rhoads	`}`
487			`printf("\n");`
488			`break;`
489			`case '7': case 'w':`
490			`printf("Watch> ");`
491	137	rhoads	`scanf("%lx", &watch);`
492	41	rhoads	`break;`
493			`case '8': case 'j':`
494			`printf("Jump> ");`
495	137	rhoads	`scanf("%lx", &addr);`
496			`s->pc = addr;`
497			`s->pc_next = addr + 4;`
498	41	rhoads	`show_state(s);`
499			`break;`
500	137	rhoads	`case '9': case 'q':`

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[/] [plasma/] [tags/] [V3_0/] [tools/] [mlite.c] - Blame information for rev 350