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/*-------------------------------------------------------------------
-- TITLE: Plasma CPU in software.  Executes MIPS(tm) opcodes.
-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
-- DATE CREATED: 1/31/01
-- FILENAME: mlite.c
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
--    Software 'as is' without warranty.  Author liable for nothing.
-- DESCRIPTION:
--   Plasma CPU simulator in C code.
--   This file served as the starting point for the VHDL code.
--------------------------------------------------------------------*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
 
#define MEM_SIZE (1024*1024*2)
#define ntohs(A) ( ((A)>>8) | (((A)&0xff)<<8) )
#define htons(A) ntohs(A)
#define ntohl(A) ( ((A)>>24) | (((A)&0xff0000)>>8) | (((A)&0xff00)<<8) | ((A)<<24) )
#define htonl(A) ntohl(A)
 
int getch(void);
 
typedef struct {
   long r[32];
   long pc,pc_next;
   long hi;
   long lo;
   long skip;
   char *mem;
   long wakeup;
   long big_endian;
} State;
 
static char *opcode_string[]={
   "SPECIAL","REGIMM","J","JAL","BEQ","BNE","BLEZ","BGTZ",
   "ADDI","ADDIU","SLTI","SLTIU","ANDI","ORI","XORI","LUI",
   "COP0","COP1","COP2","COP3","BEQL","BNEL","BLEZL","BGTZL",
   "?","?","?","?","?","?","?","?",
   "LB","LH","LWL","LW","LBU","LHU","LWR","?",
   "SB","SH","SWL","SW","?","?","SWR","CACHE",
   "LL","LWC1","LWC2","LWC3","?","LDC1","LDC2","LDC3"
   "SC","SWC1","SWC2","SWC3","?","SDC1","SDC2","SDC3"
};
 
static char *special_string[]={
   "SLL","?","SRL","SRA","SLLV","?","SRLV","SRAV",
   "JR","JALR","MOVZ","MOVN","SYSCALL","BREAK","?","SYNC",
   "MFHI","MTHI","MFLO","MTLO","?","?","?","?",
   "MULT","MULTU","DIV","DIVU","?","?","?","?",
   "ADD","ADDU","SUB","SUBU","AND","OR","XOR","NOR",
   "?","?","SLT","SLTU","?","DADDU","?","?",
   "TGE","TGEU","TLT","TLTU","TEQ","?","TNE","?",
   "?","?","?","?","?","?","?","?"
};
 
static char *regimm_string[]={
   "BLTZ","BGEZ","BLTZL","BGEZL","?","?","?","?",
   "TGEI","TGEIU","TLTI","TLTIU","TEQI","?","TNEI","?",
   "BLTZAL","BEQZAL","BLTZALL","BGEZALL","?","?","?","?",
   "?","?","?","?","?","?","?","?"
};
 
static long big_endian=0;
 
static long mem_read(State *s,long size,unsigned long address)
{
   unsigned long value=0,ptr;
   address%=MEM_SIZE;
   ptr=(long)s->mem+address;
   switch(size) {
      case 4: value=*(long*)ptr;
         if(big_endian) value=ntohl(value);
         break;
      case 2:
         value=*(unsigned short*)ptr;
         if(big_endian) value=ntohs((unsigned short)value);
         break;
      case 1:
         value=*(unsigned char*)ptr;
         break;
      default: printf("ERROR");
   }
   return(value);
}
 
static void mem_write(State *s,long size,long unsigned address,unsigned long value)
{
   static char_count=0;
   unsigned long ptr;
   if(address==0xffff) {          //UART write register at 0xffff
      value&=0xff;
      if(isprint(value)) {
         printf("%c",value);
         if(++char_count>=72) {
            printf("\n");
            char_count=0;
         }
      } else if(value=='\n') {
         printf("\n");
         char_count=0;
      } else {
         printf(".");
      }
   }
   address%=MEM_SIZE;
   ptr=(long)s->mem+address;
   switch(size) {
      case 4: if(big_endian) value=htonl(value);
         *(long*)ptr=value;
         break;
      case 2:
         if(big_endian) {
            value=htons((unsigned short)value);
         }
         *(short*)ptr=(unsigned short)value;
         break;
      case 1:
         *(char*)ptr=(unsigned char)value;
         break;
      default: printf("ERROR");
   }
}
 
void mult_big(unsigned long a,unsigned long b,
              unsigned long *hi,unsigned long *lo)
{
   unsigned long ahi,alo,bhi,blo;
   unsigned long answer[3];
   ahi=a>>16;
   alo=a&0xffff;
   bhi=b>>16;
   blo=b&0xffff;
   answer[0]=alo*blo;
   answer[1]=ahi*blo+bhi*alo+(answer[0]>>16);
   answer[0]&=0xffff;
   answer[2]=ahi*bhi+(answer[1]>>16);
   answer[1]&=0xffff;
   *hi=answer[2];
   *lo=(answer[1]<<16)+answer[0];
}
 
//execute one cycle of a Plasma CPU
void cycle(State *s,int show_mode)
{
   unsigned long opcode;
   unsigned long op,rs,rt,rd,re,func,imm,target;
   long imm_shift,branch=0,lbranch=2;
   long *r=s->r;
   unsigned long *u=(unsigned long*)s->r;
   unsigned long ptr;
   opcode=mem_read(s,4,s->pc);
   op=(opcode>>26)&0x3f;
   rs=(opcode>>21)&0x1f;
   rt=(opcode>>16)&0x1f;
   rd=(opcode>>11)&0x1f;
   re=(opcode>>6)&0x1f;
   func=opcode&0x3f;
   imm=opcode&0xffff;
   imm_shift=(((long)(short)imm)<<2)-4;
   target=(opcode<<6)>>4;
   ptr=(short)imm+r[rs];
   r[0]=0;
   if(show_mode) {
      printf("%8.8lx %8.8lx ",s->pc,opcode);
      if(op==0) printf("%8s ",special_string[func]);
      else if(op==1) printf("%8s ",regimm_string[rt]);
      else printf("%8s ",opcode_string[op]);
      printf("$%2.2ld $%2.2ld $%2.2ld $%2.2ld ",rs,rt,rd,re);
      printf("%4.4lx\n",imm);
   }
   if(show_mode>5) return;
   s->pc=s->pc_next;
   s->pc_next=s->pc_next+4;
   if(s->skip) {
      s->skip=0;
      return;
   }
   switch(op) {
      case 0x00:/*SPECIAL*/
         switch(func) {
            case 0x00:/*SLL*/  r[rd]=r[rt]<<re;          break;
            case 0x02:/*SRL*/  r[rd]=u[rt]>>re;          break;
            case 0x03:/*SRA*/  r[rd]=r[rt]>>re;          break;
            case 0x04:/*SLLV*/ r[rd]=r[rt]<<r[rs];       break;
            case 0x06:/*SRLV*/ r[rd]=u[rt]>>r[rs];       break;
            case 0x07:/*SRAV*/ r[rd]=r[rt]>>r[rs];       break;
            case 0x08:/*JR*/   s->pc_next=r[rs];         break;
            case 0x09:/*JALR*/ r[rd]=s->pc_next; s->pc_next=r[rs]; break;
            case 0x0a:/*MOVZ*/ if(!r[rt]) r[rd]=r[rs];   break;  /*IV*/
            case 0x0b:/*MOVN*/ if(r[rt]) r[rd]=r[rs];    break;  /*IV*/
            case 0x0c:/*SYSCALL*/                        break;
            case 0x0d:/*BREAK*/ s->wakeup=1; break;
            case 0x0f:/*SYNC*/ s->wakeup=1; break;
            case 0x10:/*MFHI*/ r[rd]=s->hi;              break;
            case 0x11:/*FTHI*/ s->hi=r[rs];              break;
            case 0x12:/*MFLO*/ r[rd]=s->lo;              break;
            case 0x13:/*MTLO*/ s->lo=r[rs];              break;
            case 0x18:/*MULT*/
            case 0x19:/*MULTU*/ //s->lo=r[rs]*r[rt]; s->hi=0; break;
                               mult_big(r[rs],r[rt],&s->hi,&s->lo); break;
            case 0x1a:/*DIV*/  s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt]; break;
            case 0x1b:/*DIVU*/ s->lo=u[rs]/u[rt]; s->hi=u[rs]%u[rt]; break;
            case 0x20:/*ADD*/  r[rd]=r[rs]+r[rt];        break;
            case 0x21:/*ADDU*/ r[rd]=r[rs]+r[rt];        break;
            case 0x22:/*SUB*/  r[rd]=r[rs]-r[rt];        break;
            case 0x23:/*SUBU*/ r[rd]=r[rs]-r[rt];        break;
            case 0x24:/*AND*/  r[rd]=r[rs]&r[rt];        break;
            case 0x25:/*OR*/   r[rd]=r[rs]|r[rt];        break;
            case 0x26:/*XOR*/  r[rd]=r[rs]^r[rt];        break;
            case 0x27:/*NOR*/  r[rd]=~(r[rs]|r[rt]);     break;
            case 0x2a:/*SLT*/  r[rd]=r[rs]<r[rt];        break;
            case 0x2b:/*SLTU*/ r[rd]=u[rs]<u[rt];        break;
            case 0x2d:/*DADDU*/r[rd]=r[rs]+u[rt];        break;
            case 0x31:/*TGEU*/ break;
            case 0x32:/*TLT*/  break;
            case 0x33:/*TLTU*/ break;
            case 0x34:/*TEQ*/  break;
            case 0x36:/*TNE*/  break;
            default: printf("ERROR0(*0x%x~0x%x)\n",s->pc,opcode);
               s->wakeup=1;
         }
         break;
      case 0x01:/*REGIMM*/
         switch(rt) {
            case 0x10:/*BLTZAL*/ r[31]=s->pc_next;
            case 0x00:/*BLTZ*/   branch=r[rs]<0;   break;
            case 0x11:/*BGEZAL*/ r[31]=s->pc_next;
            case 0x01:/*BGEZ*/   branch=r[rs]>=0;  break;
            case 0x12:/*BLTZALL*/r[31]=s->pc_next;
            case 0x02:/*BLTZL*/  lbranch=r[rs]<0;  break;
            case 0x13:/*BGEZALL*/r[31]=s->pc_next;
            case 0x03:/*BGEZL*/  lbranch=r[rs]>=0; break;
            default: printf("ERROR1\n"); s->wakeup=1;
          }
         break;
      case 0x03:/*JAL*/    r[31]=s->pc_next;
      case 0x02:/*J*/      s->pc_next=(s->pc&0xf0000000)|target; break;
      case 0x04:/*BEQ*/    branch=r[rs]==r[rt];     break;
      case 0x05:/*BNE*/    branch=r[rs]!=r[rt];     break;
      case 0x06:/*BLEZ*/   branch=r[rs]<=0;         break;
      case 0x07:/*BGTZ*/   branch=r[rs]>0;          break;
      case 0x08:/*ADDI*/   r[rt]=r[rs]+(short)imm;  break;
      case 0x09:/*ADDIU*/  u[rt]=u[rs]+(short)imm;  break;
      case 0x0a:/*SLTI*/   r[rt]=r[rs]<(short)imm;  break;
      case 0x0b:/*SLTIU*/  u[rt]=u[rs]<(unsigned long)(short)imm; break;
      case 0x0c:/*ANDI*/   r[rt]=r[rs]&imm;         break;
      case 0x0d:/*ORI*/    r[rt]=r[rs]|imm;         break;
      case 0x0e:/*XORI*/   r[rt]=r[rs]^imm;         break;
      case 0x0f:/*LUI*/    r[rt]=(imm<<16);         break;
      case 0x10:/*COP0*/ break;
//      case 0x11:/*COP1*/ break;
//      case 0x12:/*COP2*/ break;
//      case 0x13:/*COP3*/ break;
      case 0x14:/*BEQL*/   lbranch=r[rs]==r[rt];    break;
      case 0x15:/*BNEL*/   lbranch=r[rs]!=r[rt];    break;
      case 0x16:/*BLEZL*/  lbranch=r[rs]<=0;        break;
      case 0x17:/*BGTZL*/  lbranch=r[rs]>0;         break;
//      case 0x1c:/*MAD*/  break;   /*IV*/
      case 0x20:/*LB*/   r[rt]=(signed char)mem_read(s,1,ptr);  break;
      case 0x21:/*LH*/   r[rt]=(signed short)mem_read(s,2,ptr); break;
      case 0x22:/*LWL*/  rt=rt; //fixme fall through
      case 0x23:/*LW*/   r[rt]=mem_read(s,4,ptr);   break;
      case 0x24:/*LBU*/  r[rt]=(unsigned char)mem_read(s,1,ptr); break;
      case 0x25:/*LHU*/  r[rt]=(unsigned short)mem_read(s,2,ptr); break;
      case 0x26:/*LWR*/  break; //fixme
      case 0x28:/*SB*/   mem_write(s,1,ptr,r[rt]);  break;
      case 0x29:/*SH*/   mem_write(s,2,ptr,r[rt]);  break;
      case 0x2a:/*SWL*/  rt=rt; //fixme fall through
      case 0x2b:/*SW*/   mem_write(s,4,ptr,r[rt]);  break;
      case 0x2e:/*SWR*/  break; //fixme
      case 0x2f:/*CACHE*/break;
      case 0x30:/*LL*/   r[rt]=mem_read(s,4,ptr);   break;
//      case 0x31:/*LWC1*/ break;
//      case 0x32:/*LWC2*/ break;
//      case 0x33:/*LWC3*/ break;
//      case 0x35:/*LDC1*/ break;
//      case 0x36:/*LDC2*/ break;
//      case 0x37:/*LDC3*/ break;
//      case 0x38:/*SC*/     *(long*)ptr=r[rt]; r[rt]=1; break;
      case 0x38:/*SC*/     mem_write(s,4,ptr,r[rt]); r[rt]=1; break;
//      case 0x39:/*SWC1*/ break;
//      case 0x3a:/*SWC2*/ break;
//      case 0x3b:/*SWC3*/ break;
//      case 0x3d:/*SDC1*/ break;
//      case 0x3e:/*SDC2*/ break;
//      case 0x3f:/*SDC3*/ break;
      default: printf("ERROR2 address=0x%x opcode=0x%x\n",
         s->pc,opcode); s->wakeup=1;
//         exit(0);
   }
   s->pc_next+=branch|(lbranch==1)?imm_shift:0;
   s->skip=(lbranch==0);
}
 
void show_state(State *s)
{
   long i,j;
   for(i=0;i<4;++i) {
      printf("%2.2ld ",i*8);
      for(j=0;j<8;++j) {
         printf("%8.8lx ",s->r[i*8+j]);
      }
      printf("\n");
   }
   printf("%8.8lx %8.8lx %8.8lx %8.8lx\n",s->pc,s->pc_next,s->hi,s->lo);
   j=s->pc;
   for(i=-4;i<=8;++i) {
      printf("%c",i==0?'*':' ');
      s->pc=j+i*4;
      cycle(s,10);
   }
   s->pc=j;
}
 
void do_debug(State *s)
{
   int ch;
   long i,j=0,watch=0,addr;
   s->pc_next=s->pc+4;
   s->skip=0;
   s->wakeup=0;
   show_state(s);
   for(;;) {
      if(watch) printf("0x%8.8lx=0x%8.8lx\n",watch,mem_read(s,4,watch));
      printf("1=Debug 2=Trace 3=Step 4=BreakPt 5=Go 6=Memory ");
      printf("7=Watch 8=Jump 9=Quit> ");
      ch=getch();
      printf("\n");
      switch(ch) {
      case '1': case 'd': case ' ': cycle(s,0); show_state(s); break;
      case '2': case 't': cycle(s,0); printf("*"); cycle(s,10); break;
      case '3': case 's':
         printf("Count> ");
         scanf("%ld",&j);
         for(i=0;i<j;++i) cycle(s,0);
         show_state(s);
         break;
      case '4': case 'b':
         printf("Line> ");
         scanf("%lx",&j);
         break;
      case '5': case 'g':
         s->wakeup=0;
         while(s->wakeup==0) {
            if(s->pc==j) break;
            cycle(s,0);
         }
         show_state(s);
         break;
      case '6': case 'm':
         printf("Memory> ");
         scanf("%lx",&j);
         for(i=0;i<8;++i) {
            printf("%8.8lx ",mem_read(s,4,j+i*4));
         }
         printf("\n");
         break;
      case '7': case 'w':
         printf("Watch> ");
         scanf("%lx",&watch);
         break;
      case '8': case 'j':
         printf("Jump> ");
         scanf("%lx",&addr);
         s->pc=addr;
         s->pc_next=addr+4;
         show_state(s);
         break;
      case '9': case 'q': return;
      }
   }
}
/************************************************************/
 
int main(int argc,char *argv[])
{
   State state,*s=&state;
   FILE *in;
   long bytes,index;
   printf("Plasma emulator\n");
   memset(s,0,sizeof(State));
   s->big_endian=0;
   s->mem=malloc(MEM_SIZE);
   if(argc<=1) {
      printf("   Usage:  mlite file.exe\n");
      printf("           mlite file.exe B   {for big_endian}\n");
      printf("           mlite file.exe DD  {disassemble}\n");
      printf("           mlite file.exe BD  {disassemble big_endian}\n");
      return 0;
   }
   in=fopen(argv[1],"rb");
   if(in==NULL) { printf("Can't open file %s!\n",argv[1]); getch(); return(0); }
   bytes=fread(s->mem,1,MEM_SIZE,in);
   fclose(in);
   printf("Read %ld bytes.\n",bytes);
   if(argc==3&&argv[2][0]=='B') {
      printf("Big Endian\n");
      s->big_endian=1;
      big_endian=1;
   }
   if(argc==3&&argv[2][0]=='S') {   /*make big endian*/
      printf("Big Endian\n");
      for(index=0;index<bytes+3;index+=4) {
         *(unsigned long*)&s->mem[index]=htonl(*(unsigned long*)&s->mem[index]);
      }
      in=fopen("big.exe","wb");
      fwrite(s->mem,bytes,1,in);
      fclose(in);
      return(0);
   }
   if(argc==3&&argv[2][1]=='D') {   /*dump image*/
      for(index=0;index<bytes;index+=4) {
         s->pc=index;
         cycle(s,10);
      }
      free(s->mem);
      return(0);
   }
   s->pc=0x0;
   do_debug(s);
   free(s->mem);
   return(0);
}
 

Line No.	Rev	Author	Line
1	41	rhoads	`/*-------------------------------------------------------------------`
2	43	rhoads	`-- TITLE: Plasma CPU in software. Executes MIPS(tm) opcodes.`
3	41	rhoads	`-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)`
4			`-- DATE CREATED: 1/31/01`
5			`-- FILENAME: mlite.c`
6	43	rhoads	`-- PROJECT: Plasma CPU core`
7	41	rhoads	`-- COPYRIGHT: Software placed into the public domain by the author.`
8			`-- Software 'as is' without warranty. Author liable for nothing.`
9			`-- DESCRIPTION:`
10	43	rhoads	`-- Plasma CPU simulator in C code.`
11	41	rhoads	`-- This file served as the starting point for the VHDL code.`
12			`--------------------------------------------------------------------*/`
13			`#include <stdio.h>`
14			`#include <stdlib.h>`
15			`#include <string.h>`
16			`#include <ctype.h>`
17
18			`#define MEM_SIZE (102410242)`
19			`#define ntohs(A) ( ((A)>>8) \| (((A)&0xff)<<8) )`
20			`#define htons(A) ntohs(A)`
21			`#define ntohl(A) ( ((A)>>24) \| (((A)&0xff0000)>>8) \| (((A)&0xff00)<<8) \| ((A)<<24) )`
22			`#define htonl(A) ntohl(A)`
23
24			`int getch(void);`
25
26			`typedef struct {`
27			`long r[32];`
28			`long pc,pc_next;`
29			`long hi;`
30			`long lo;`
31			`long skip;`
32			`char *mem;`
33			`long wakeup;`
34			`long big_endian;`
35			`} State;`
36
37			`static char *opcode_string[]={`
38			`"SPECIAL","REGIMM","J","JAL","BEQ","BNE","BLEZ","BGTZ",`
39			`"ADDI","ADDIU","SLTI","SLTIU","ANDI","ORI","XORI","LUI",`
40			`"COP0","COP1","COP2","COP3","BEQL","BNEL","BLEZL","BGTZL",`
41			`"?","?","?","?","?","?","?","?",`
42			`"LB","LH","LWL","LW","LBU","LHU","LWR","?",`
43			`"SB","SH","SWL","SW","?","?","SWR","CACHE",`
44			`"LL","LWC1","LWC2","LWC3","?","LDC1","LDC2","LDC3"`
45			`"SC","SWC1","SWC2","SWC3","?","SDC1","SDC2","SDC3"`
46			`};`
47
48			`static char *special_string[]={`
49			`"SLL","?","SRL","SRA","SLLV","?","SRLV","SRAV",`
50			`"JR","JALR","MOVZ","MOVN","SYSCALL","BREAK","?","SYNC",`
51			`"MFHI","MTHI","MFLO","MTLO","?","?","?","?",`
52			`"MULT","MULTU","DIV","DIVU","?","?","?","?",`
53			`"ADD","ADDU","SUB","SUBU","AND","OR","XOR","NOR",`
54			`"?","?","SLT","SLTU","?","DADDU","?","?",`
55			`"TGE","TGEU","TLT","TLTU","TEQ","?","TNE","?",`
56			`"?","?","?","?","?","?","?","?"`
57			`};`
58
59			`static char *regimm_string[]={`
60			`"BLTZ","BGEZ","BLTZL","BGEZL","?","?","?","?",`
61			`"TGEI","TGEIU","TLTI","TLTIU","TEQI","?","TNEI","?",`
62			`"BLTZAL","BEQZAL","BLTZALL","BGEZALL","?","?","?","?",`
63			`"?","?","?","?","?","?","?","?"`
64			`};`
65
66			`static long big_endian=0;`
67
68			`static long mem_read(State *s,long size,unsigned long address)`
69			`{`
70			`unsigned long value=0,ptr;`
71			`address%=MEM_SIZE;`
72			`ptr=(long)s->mem+address;`
73			`switch(size) {`
74			`case 4: value=(long)ptr;`
75			`if(big_endian) value=ntohl(value);`
76			`break;`
77			`case 2:`
78			`value=(unsigned short)ptr;`
79			`if(big_endian) value=ntohs((unsigned short)value);`
80			`break;`
81			`case 1:`
82			`value=(unsigned char)ptr;`
83			`break;`
84			`default: printf("ERROR");`
85			`}`
86			`return(value);`
87			`}`
88
89			`static void mem_write(State *s,long size,long unsigned address,unsigned long value)`
90			`{`
91			`static char_count=0;`
92			`unsigned long ptr;`
93			`if(address==0xffff) { //UART write register at 0xffff`
94			`value&=0xff;`
95			`if(isprint(value)) {`
96			`printf("%c",value);`
97			`if(++char_count>=72) {`
98			`printf("\n");`
99			`char_count=0;`
100			`}`
101			`} else if(value=='\n') {`
102			`printf("\n");`
103			`char_count=0;`
104			`} else {`
105			`printf(".");`
106			`}`
107			`}`
108			`address%=MEM_SIZE;`
109			`ptr=(long)s->mem+address;`
110			`switch(size) {`
111			`case 4: if(big_endian) value=htonl(value);`
112			`(long)ptr=value;`
113			`break;`
114			`case 2:`
115			`if(big_endian) {`
116			`value=htons((unsigned short)value);`
117			`}`
118			`(short)ptr=(unsigned short)value;`
119			`break;`
120			`case 1:`
121			`(char)ptr=(unsigned char)value;`
122			`break;`
123			`default: printf("ERROR");`
124			`}`
125			`}`
126
127			`void mult_big(unsigned long a,unsigned long b,`
128			`unsigned long hi,unsigned long lo)`
129			`{`
130			`unsigned long ahi,alo,bhi,blo;`
131			`unsigned long answer[3];`
132			`ahi=a>>16;`
133			`alo=a&0xffff;`
134			`bhi=b>>16;`
135			`blo=b&0xffff;`
136			`answer[0]=alo*blo;`
137			`answer[1]=ahiblo+bhialo+(answer[0]>>16);`
138			`answer[0]&=0xffff;`
139			`answer[2]=ahi*bhi+(answer[1]>>16);`
140			`answer[1]&=0xffff;`
141			`*hi=answer[2];`
142			`*lo=(answer[1]<<16)+answer[0];`
143			`}`
144
145	43	rhoads	`//execute one cycle of a Plasma CPU`
146	41	rhoads	`void cycle(State *s,int show_mode)`
147			`{`
148			`unsigned long opcode;`
149			`unsigned long op,rs,rt,rd,re,func,imm,target;`
150			`long imm_shift,branch=0,lbranch=2;`
151			`long *r=s->r;`
152			`unsigned long u=(unsigned long)s->r;`
153			`unsigned long ptr;`
154			`opcode=mem_read(s,4,s->pc);`
155			`op=(opcode>>26)&0x3f;`
156			`rs=(opcode>>21)&0x1f;`
157			`rt=(opcode>>16)&0x1f;`
158			`rd=(opcode>>11)&0x1f;`
159			`re=(opcode>>6)&0x1f;`
160			`func=opcode&0x3f;`
161			`imm=opcode&0xffff;`
162			`imm_shift=(((long)(short)imm)<<2)-4;`
163			`target=(opcode<<6)>>4;`
164			`ptr=(short)imm+r[rs];`
165			`r[0]=0;`
166			`if(show_mode) {`
167			`printf("%8.8lx %8.8lx ",s->pc,opcode);`
168			`if(op==0) printf("%8s ",special_string[func]);`
169			`else if(op==1) printf("%8s ",regimm_string[rt]);`
170			`else printf("%8s ",opcode_string[op]);`
171			`printf("$%2.2ld $%2.2ld $%2.2ld $%2.2ld ",rs,rt,rd,re);`
172			`printf("%4.4lx\n",imm);`
173			`}`
174			`if(show_mode>5) return;`
175			`s->pc=s->pc_next;`
176			`s->pc_next=s->pc_next+4;`
177			`if(s->skip) {`
178			`s->skip=0;`
179			`return;`
180			`}`
181			`switch(op) {`
182			`case 0x00:/SPECIAL/`
183			`switch(func) {`
184			`case 0x00:/SLL/ r[rd]=r[rt]<<re; break;`
185			`case 0x02:/SRL/ r[rd]=u[rt]>>re; break;`
186			`case 0x03:/SRA/ r[rd]=r[rt]>>re; break;`
187			`case 0x04:/SLLV/ r[rd]=r[rt]<<r[rs]; break;`
188			`case 0x06:/SRLV/ r[rd]=u[rt]>>r[rs]; break;`
189			`case 0x07:/SRAV/ r[rd]=r[rt]>>r[rs]; break;`
190			`case 0x08:/JR/ s->pc_next=r[rs]; break;`
191			`case 0x09:/JALR/ r[rd]=s->pc_next; s->pc_next=r[rs]; break;`
192			`case 0x0a:/MOVZ/ if(!r[rt]) r[rd]=r[rs]; break; /IV/`
193			`case 0x0b:/MOVN/ if(r[rt]) r[rd]=r[rs]; break; /IV/`
194			`case 0x0c:/SYSCALL/ break;`
195			`case 0x0d:/BREAK/ s->wakeup=1; break;`
196			`case 0x0f:/SYNC/ s->wakeup=1; break;`
197			`case 0x10:/MFHI/ r[rd]=s->hi; break;`
198			`case 0x11:/FTHI/ s->hi=r[rs]; break;`
199			`case 0x12:/MFLO/ r[rd]=s->lo; break;`
200			`case 0x13:/MTLO/ s->lo=r[rs]; break;`
201			`case 0x18:/MULT/`
202			`case 0x19:/MULTU/ //s->lo=r[rs]*r[rt]; s->hi=0; break;`
203			`mult_big(r[rs],r[rt],&s->hi,&s->lo); break;`
204			`case 0x1a:/DIV/ s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt]; break;`
205			`case 0x1b:/DIVU/ s->lo=u[rs]/u[rt]; s->hi=u[rs]%u[rt]; break;`
206			`case 0x20:/ADD/ r[rd]=r[rs]+r[rt]; break;`
207			`case 0x21:/ADDU/ r[rd]=r[rs]+r[rt]; break;`
208			`case 0x22:/SUB/ r[rd]=r[rs]-r[rt]; break;`
209			`case 0x23:/SUBU/ r[rd]=r[rs]-r[rt]; break;`
210			`case 0x24:/AND/ r[rd]=r[rs]&r[rt]; break;`
211			`case 0x25:/OR/ r[rd]=r[rs]\|r[rt]; break;`
212			`case 0x26:/XOR/ r[rd]=r[rs]^r[rt]; break;`
213			`case 0x27:/NOR/ r[rd]=~(r[rs]\|r[rt]); break;`
214			`case 0x2a:/SLT/ r[rd]=r[rs]<r[rt]; break;`
215			`case 0x2b:/SLTU/ r[rd]=u[rs]<u[rt]; break;`
216			`case 0x2d:/DADDU/r[rd]=r[rs]+u[rt]; break;`
217			`case 0x31:/TGEU/ break;`
218			`case 0x32:/TLT/ break;`
219			`case 0x33:/TLTU/ break;`
220			`case 0x34:/TEQ/ break;`
221			`case 0x36:/TNE/ break;`
222			`default: printf("ERROR0(*0x%x~0x%x)\n",s->pc,opcode);`
223			`s->wakeup=1;`
224			`}`
225			`break;`
226			`case 0x01:/REGIMM/`
227			`switch(rt) {`
228			`case 0x10:/BLTZAL/ r[31]=s->pc_next;`
229			`case 0x00:/BLTZ/ branch=r[rs]<0; break;`
230			`case 0x11:/BGEZAL/ r[31]=s->pc_next;`
231			`case 0x01:/BGEZ/ branch=r[rs]>=0; break;`
232			`case 0x12:/BLTZALL/r[31]=s->pc_next;`
233			`case 0x02:/BLTZL/ lbranch=r[rs]<0; break;`
234			`case 0x13:/BGEZALL/r[31]=s->pc_next;`
235			`case 0x03:/BGEZL/ lbranch=r[rs]>=0; break;`
236			`default: printf("ERROR1\n"); s->wakeup=1;`
237			`}`
238			`break;`
239			`case 0x03:/JAL/ r[31]=s->pc_next;`
240			`case 0x02:/J/ s->pc_next=(s->pc&0xf0000000)\|target; break;`
241			`case 0x04:/BEQ/ branch=r[rs]==r[rt]; break;`
242			`case 0x05:/BNE/ branch=r[rs]!=r[rt]; break;`
243			`case 0x06:/BLEZ/ branch=r[rs]<=0; break;`
244			`case 0x07:/BGTZ/ branch=r[rs]>0; break;`
245			`case 0x08:/ADDI/ r[rt]=r[rs]+(short)imm; break;`
246			`case 0x09:/ADDIU/ u[rt]=u[rs]+(short)imm; break;`
247			`case 0x0a:/SLTI/ r[rt]=r[rs]<(short)imm; break;`
248			`case 0x0b:/SLTIU/ u[rt]=u[rs]<(unsigned long)(short)imm; break;`
249			`case 0x0c:/ANDI/ r[rt]=r[rs]&imm; break;`
250			`case 0x0d:/ORI/ r[rt]=r[rs]\|imm; break;`
251			`case 0x0e:/XORI/ r[rt]=r[rs]^imm; break;`
252			`case 0x0f:/LUI/ r[rt]=(imm<<16); break;`
253			`case 0x10:/COP0/ break;`
254			`// case 0x11:/COP1/ break;`
255			`// case 0x12:/COP2/ break;`
256			`// case 0x13:/COP3/ break;`
257			`case 0x14:/BEQL/ lbranch=r[rs]==r[rt]; break;`
258			`case 0x15:/BNEL/ lbranch=r[rs]!=r[rt]; break;`
259			`case 0x16:/BLEZL/ lbranch=r[rs]<=0; break;`
260			`case 0x17:/BGTZL/ lbranch=r[rs]>0; break;`
261			`// case 0x1c:/MAD/ break; /IV/`
262			`case 0x20:/LB/ r[rt]=(signed char)mem_read(s,1,ptr); break;`
263			`case 0x21:/LH/ r[rt]=(signed short)mem_read(s,2,ptr); break;`
264			`case 0x22:/LWL/ rt=rt; //fixme fall through`
265			`case 0x23:/LW/ r[rt]=mem_read(s,4,ptr); break;`
266			`case 0x24:/LBU/ r[rt]=(unsigned char)mem_read(s,1,ptr); break;`
267			`case 0x25:/LHU/ r[rt]=(unsigned short)mem_read(s,2,ptr); break;`
268			`case 0x26:/LWR/ break; //fixme`
269			`case 0x28:/SB/ mem_write(s,1,ptr,r[rt]); break;`
270			`case 0x29:/SH/ mem_write(s,2,ptr,r[rt]); break;`
271			`case 0x2a:/SWL/ rt=rt; //fixme fall through`
272			`case 0x2b:/SW/ mem_write(s,4,ptr,r[rt]); break;`
273			`case 0x2e:/SWR/ break; //fixme`
274			`case 0x2f:/CACHE/break;`
275			`case 0x30:/LL/ r[rt]=mem_read(s,4,ptr); break;`
276			`// case 0x31:/LWC1/ break;`
277			`// case 0x32:/LWC2/ break;`
278			`// case 0x33:/LWC3/ break;`
279			`// case 0x35:/LDC1/ break;`
280			`// case 0x36:/LDC2/ break;`
281			`// case 0x37:/LDC3/ break;`
282			`// case 0x38:/SC/ (long)ptr=r[rt]; r[rt]=1; break;`
283			`case 0x38:/SC/ mem_write(s,4,ptr,r[rt]); r[rt]=1; break;`
284			`// case 0x39:/SWC1/ break;`
285			`// case 0x3a:/SWC2/ break;`
286			`// case 0x3b:/SWC3/ break;`
287			`// case 0x3d:/SDC1/ break;`
288			`// case 0x3e:/SDC2/ break;`
289			`// case 0x3f:/SDC3/ break;`
290			`default: printf("ERROR2 address=0x%x opcode=0x%x\n",`
291			`s->pc,opcode); s->wakeup=1;`
292			`// exit(0);`
293			`}`
294			`s->pc_next+=branch\|(lbranch==1)?imm_shift:0;`
295			`s->skip=(lbranch==0);`
296			`}`
297
298			`void show_state(State *s)`
299			`{`
300			`long i,j;`
301			`for(i=0;i<4;++i) {`
302			`printf("%2.2ld ",i*8);`
303			`for(j=0;j<8;++j) {`
304			`printf("%8.8lx ",s->r[i*8+j]);`
305			`}`
306			`printf("\n");`
307			`}`
308			`printf("%8.8lx %8.8lx %8.8lx %8.8lx\n",s->pc,s->pc_next,s->hi,s->lo);`
309			`j=s->pc;`
310			`for(i=-4;i<=8;++i) {`
311			`printf("%c",i==0?'*':' ');`
312			`s->pc=j+i*4;`
313			`cycle(s,10);`
314			`}`
315			`s->pc=j;`
316			`}`
317
318			`void do_debug(State *s)`
319			`{`
320			`int ch;`
321			`long i,j=0,watch=0,addr;`
322			`s->pc_next=s->pc+4;`
323			`s->skip=0;`
324			`s->wakeup=0;`
325			`show_state(s);`
326			`for(;;) {`
327			`if(watch) printf("0x%8.8lx=0x%8.8lx\n",watch,mem_read(s,4,watch));`
328			`printf("1=Debug 2=Trace 3=Step 4=BreakPt 5=Go 6=Memory ");`
329			`printf("7=Watch 8=Jump 9=Quit> ");`
330			`ch=getch();`
331			`printf("\n");`
332			`switch(ch) {`
333			`case '1': case 'd': case ' ': cycle(s,0); show_state(s); break;`
334			`case '2': case 't': cycle(s,0); printf("*"); cycle(s,10); break;`
335			`case '3': case 's':`
336			`printf("Count> ");`
337			`scanf("%ld",&j);`
338			`for(i=0;i<j;++i) cycle(s,0);`
339			`show_state(s);`
340			`break;`
341			`case '4': case 'b':`
342			`printf("Line> ");`
343			`scanf("%lx",&j);`
344			`break;`
345			`case '5': case 'g':`
346			`s->wakeup=0;`
347			`while(s->wakeup==0) {`
348			`if(s->pc==j) break;`
349			`cycle(s,0);`
350			`}`
351			`show_state(s);`
352			`break;`
353			`case '6': case 'm':`
354			`printf("Memory> ");`
355			`scanf("%lx",&j);`
356			`for(i=0;i<8;++i) {`
357			`printf("%8.8lx ",mem_read(s,4,j+i*4));`
358			`}`
359			`printf("\n");`
360			`break;`
361			`case '7': case 'w':`
362			`printf("Watch> ");`
363			`scanf("%lx",&watch);`
364			`break;`
365			`case '8': case 'j':`
366			`printf("Jump> ");`
367			`scanf("%lx",&addr);`
368			`s->pc=addr;`
369			`s->pc_next=addr+4;`
370			`show_state(s);`
371			`break;`
372			`case '9': case 'q': return;`
373			`}`
374			`}`
375			`}`
376			`/************************************************************/`
377
378			`int main(int argc,char *argv[])`
379			`{`
380			`State state,*s=&state;`
381			`FILE *in;`
382			`long bytes,index;`
383	43	rhoads	`printf("Plasma emulator\n");`
384	41	rhoads	`memset(s,0,sizeof(State));`
385			`s->big_endian=0;`
386			`s->mem=malloc(MEM_SIZE);`
387			`if(argc<=1) {`
388			`printf(" Usage: mlite file.exe\n");`
389			`printf(" mlite file.exe B {for big_endian}\n");`
390			`printf(" mlite file.exe DD {disassemble}\n");`
391			`printf(" mlite file.exe BD {disassemble big_endian}\n");`
392			`return 0;`
393			`}`
394			`in=fopen(argv[1],"rb");`
395			`if(in==NULL) { printf("Can't open file %s!\n",argv[1]); getch(); return(0); }`
396			`bytes=fread(s->mem,1,MEM_SIZE,in);`
397			`fclose(in);`
398			`printf("Read %ld bytes.\n",bytes);`
399			`if(argc==3&&argv[2][0]=='B') {`
400			`printf("Big Endian\n");`
401			`s->big_endian=1;`
402			`big_endian=1;`
403			`}`
404			`if(argc==3&&argv[2][0]=='S') { /make big endian/`
405			`printf("Big Endian\n");`
406			`for(index=0;index<bytes+3;index+=4) {`
407			`(unsigned long)&s->mem[index]=htonl((unsigned long)&s->mem[index]);`
408			`}`
409			`in=fopen("big.exe","wb");`
410			`fwrite(s->mem,bytes,1,in);`
411			`fclose(in);`
412			`return(0);`
413			`}`
414			`if(argc==3&&argv[2][1]=='D') { /dump image/`
415			`for(index=0;index<bytes;index+=4) {`
416			`s->pc=index;`
417			`cycle(s,10);`
418			`}`
419			`free(s->mem);`
420			`return(0);`
421			`}`
422			`s->pc=0x0;`
423			`do_debug(s);`
424			`free(s->mem);`
425			`return(0);`
426			`}`
427

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