OpenCores
URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [tools/] [boot.asm] - Blame information for rev 421

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 20 rhoads
##################################################################
2
# TITLE: Boot Up Code
3
# AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
4
# DATE CREATED: 1/12/02
5
# FILENAME: boot.asm
6 43 rhoads
# PROJECT: Plasma CPU core
7 20 rhoads
# COPYRIGHT: Software placed into the public domain by the author.
8
#    Software 'as is' without warranty.  Author liable for nothing.
9
# DESCRIPTION:
10 239 rhoads
#    Initializes the stack pointer and jumps to main().
11 20 rhoads
##################################################################
12 239 rhoads
   #Reserve 512 bytes for stack
13
   .comm InitStack, 512
14
 
15
   .text
16
   .align 2
17
   .global entry
18
   .ent entry
19 20 rhoads
entry:
20
   .set noreorder
21
 
22 239 rhoads
   #These four instructions should be the first instructions.
23 200 rhoads
   #convert.exe previously initialized $gp, .sbss_start, .bss_end, $sp
24 239 rhoads
   la    $gp, _gp             #initialize global pointer
25
   la    $5, __bss_start      #$5 = .sbss_start
26
   la    $4, _end             #$2 = .bss_end
27 200 rhoads
   la    $sp, InitStack+488   #initialize stack pointer
28 147 rhoads
 
29 28 rhoads
$BSS_CLEAR:
30 239 rhoads
   sw    $0, 0($5)
31
   slt   $3, $5, $4
32 130 rhoads
   bnez  $3, $BSS_CLEAR
33 239 rhoads
   addiu $5, $5, 4
34 28 rhoads
 
35 147 rhoads
   jal   main
36 20 rhoads
   nop
37
$L1:
38
   j $L1
39
 
40 147 rhoads
   .end entry
41
 
42
 
43
###################################################
44 110 rhoads
   #address 0x3c
45 239 rhoads
   .global interrupt_service_routine
46
   .ent interrupt_service_routine
47 20 rhoads
interrupt_service_routine:
48 147 rhoads
   .set noreorder
49
   .set noat
50 20 rhoads
 
51 147 rhoads
   #Registers $26 and $27 are reserved for the OS
52
   #Save all temporary registers
53 200 rhoads
   #Slots 0($29) through 12($29) reserved for saving a0-a3
54 147 rhoads
   addi  $29, $29, -104  #adjust sp
55
   sw    $1,  16($29)    #at
56
   sw    $2,  20($29)    #v0
57
   sw    $3,  24($29)    #v1
58
   sw    $4,  28($29)    #a0
59
   sw    $5,  32($29)    #a1
60
   sw    $6,  36($29)    #a2
61
   sw    $7,  40($29)    #a3
62
   sw    $8,  44($29)    #t0
63
   sw    $9,  48($29)    #t1
64
   sw    $10, 52($29)    #t2
65
   sw    $11, 56($29)    #t3
66
   sw    $12, 60($29)    #t4
67
   sw    $13, 64($29)    #t5
68
   sw    $14, 68($29)    #t6
69
   sw    $15, 72($29)    #t7
70
   sw    $24, 76($29)    #t8
71
   sw    $25, 80($29)    #t9
72
   sw    $31, 84($29)    #lr
73
   mfc0  $26, $14        #C0_EPC=14 (Exception PC)
74
   addi  $26, $26, -4    #Backup one opcode
75
   sw    $26, 88($29)    #pc
76
   mfhi  $27
77
   sw    $27, 92($29)    #hi
78
   mflo  $27
79
   sw    $27, 96($29)    #lo
80 20 rhoads
 
81 177 rhoads
   lui   $6,  0x2000
82
   lw    $4,  0x20($6)   #IRQ_STATUS
83
   lw    $6,  0x10($6)   #IRQ_MASK
84 194 rhoads
   and   $4,  $4, $6
85 147 rhoads
   jal   OS_InterruptServiceRoutine
86 194 rhoads
   addi  $5,  $29, 0
87 20 rhoads
 
88 147 rhoads
   #Restore all temporary registers
89
   lw    $1,  16($29)    #at
90
   lw    $2,  20($29)    #v0
91
   lw    $3,  24($29)    #v1
92
   lw    $4,  28($29)    #a0
93
   lw    $5,  32($29)    #a1
94
   lw    $6,  36($29)    #a2
95
   lw    $7,  40($29)    #a3
96
   lw    $8,  44($29)    #t0
97
   lw    $9,  48($29)    #t1
98
   lw    $10, 52($29)    #t2
99
   lw    $11, 56($29)    #t3
100
   lw    $12, 60($29)    #t4
101
   lw    $13, 64($29)    #t5
102
   lw    $14, 68($29)    #t6
103
   lw    $15, 72($29)    #t7
104
   lw    $24, 76($29)    #t8
105
   lw    $25, 80($29)    #t9
106
   lw    $31, 84($29)    #lr
107
   lw    $26, 88($29)    #pc
108
   lw    $27, 92($29)    #hi
109
   mthi  $27
110
   lw    $27, 96($29)    #lo
111
   mtlo  $27
112
   addi  $29, $29, 104   #adjust sp
113
 
114 194 rhoads
isr_return:
115 147 rhoads
   ori   $27, $0, 0x1    #re-enable interrupts
116
   jr    $26
117
   mtc0  $27, $12        #STATUS=1; enable interrupts
118
 
119
   .end interrupt_service_routine
120
   .set at
121
 
122
 
123 28 rhoads
###################################################
124 239 rhoads
   .global OS_AsmInterruptEnable
125 147 rhoads
   .ent OS_AsmInterruptEnable
126
OS_AsmInterruptEnable:
127 28 rhoads
   .set noreorder
128 147 rhoads
   mfc0  $2, $12
129 130 rhoads
   jr    $31
130
   mtc0  $4, $12            #STATUS=1; enable interrupts
131 147 rhoads
   #nop
132 20 rhoads
   .set reorder
133 147 rhoads
   .end OS_AsmInterruptEnable
134 20 rhoads
 
135 28 rhoads
 
136
###################################################
137 239 rhoads
   .global  OS_AsmInterruptInit
138
   .ent    OS_AsmInterruptInit
139 147 rhoads
OS_AsmInterruptInit:
140 28 rhoads
   .set noreorder
141 147 rhoads
   #Patch interrupt vector to 0x1000003c
142
   la    $5, OS_AsmPatchValue
143
   lw    $6, 0($5)
144
   sw    $6, 0x3c($0)
145
   lw    $6, 4($5)
146
   sw    $6, 0x40($0)
147
   lw    $6, 8($5)
148
   sw    $6, 0x44($0)
149
   lw    $6, 12($5)
150
   jr    $31
151
   sw    $6, 0x48($0)
152 28 rhoads
 
153 147 rhoads
OS_AsmPatchValue:
154
   #Registers $26 and $27 are reserved for the OS
155
   #Code to place at address 0x3c
156
   lui   $26, 0x1000
157
   ori   $26, $26, 0x3c
158
   jr    $26
159
   nop
160 28 rhoads
 
161 147 rhoads
   .set reorder
162
   .end OS_AsmInterruptInit
163
 
164
 
165
###################################################
166 239 rhoads
   .global   setjmp
167 147 rhoads
   .ent     setjmp
168
setjmp:
169
   .set noreorder
170
   sw    $16, 0($4)   #s0
171
   sw    $17, 4($4)   #s1
172
   sw    $18, 8($4)   #s2
173
   sw    $19, 12($4)  #s3
174
   sw    $20, 16($4)  #s4
175
   sw    $21, 20($4)  #s5
176
   sw    $22, 24($4)  #s6
177
   sw    $23, 28($4)  #s7
178
   sw    $30, 32($4)  #s8
179
   sw    $28, 36($4)  #gp
180
   sw    $29, 40($4)  #sp
181
   sw    $31, 44($4)  #lr
182 130 rhoads
   jr    $31
183 147 rhoads
   ori   $2,  $0, 0
184
 
185 28 rhoads
   .set reorder
186 147 rhoads
   .end setjmp
187 28 rhoads
 
188
 
189 37 rhoads
###################################################
190 239 rhoads
   .global   longjmp
191 147 rhoads
   .ent     longjmp
192
longjmp:
193 37 rhoads
   .set noreorder
194 147 rhoads
   lw    $16, 0($4)   #s0
195
   lw    $17, 4($4)   #s1
196
   lw    $18, 8($4)   #s2
197
   lw    $19, 12($4)  #s3
198
   lw    $20, 16($4)  #s4
199
   lw    $21, 20($4)  #s5
200
   lw    $22, 24($4)  #s6
201
   lw    $23, 28($4)  #s7
202
   lw    $30, 32($4)  #s8
203
   lw    $28, 36($4)  #gp
204
   lw    $29, 40($4)  #sp
205
   lw    $31, 44($4)  #lr
206 130 rhoads
   jr    $31
207 147 rhoads
   ori   $2,  $5, 0
208
 
209 37 rhoads
   .set reorder
210 147 rhoads
   .end longjmp
211 37 rhoads
 
212
 
213 147 rhoads
###################################################
214 239 rhoads
   .global   OS_AsmMult
215 147 rhoads
   .ent     OS_AsmMult
216
OS_AsmMult:
217
   .set noreorder
218
   multu $4, $5
219
   mflo  $2
220
   mfhi  $4
221
   jr    $31
222
   sw    $4, 0($6)
223
 
224
   .set reorder
225
   .end OS_AsmMult
226 194 rhoads
 
227
 
228
###################################################
229 239 rhoads
   .global OS_Syscall
230 194 rhoads
   .ent OS_Syscall
231
OS_Syscall:
232
   .set noreorder
233
   syscall 0
234
   jr    $31
235
   nop
236
   .set reorder
237
   .end OS_Syscall
238
 
239
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.