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[/] [plasma_fpu/] [trunk/] [src/] [subunits/] [plasma_shifter.vhd] - Blame information for rev 2

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-- --------------------------------------------------------------------------
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-- >>>>>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<<<<
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-- --------------------------------------------------------------------------
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-- TITLE:       Plasma SHIFTER
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-- AUTHOR:      Alex Schoenberger (Alex.Schoenberger@ies.tu-darmstadt.de)
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-- COMMENT:     This project is based on Plasma CPU core by Steve Rhoads
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--
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-- www.ies.tu-darmstadt.de
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-- TU Darmstadt
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-- Institute for Integrated Systems
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-- Merckstr. 25
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-- 
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-- 64283 Darmstadt - GERMANY
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-- --------------------------------------------------------------------------
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-- PROJECT:       Plasma CPU core with FPU
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-- FILENAME:      plasma_shifter.vhd
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-- --------------------------------------------------------------------------
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-- COPYRIGHT: 
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--  This project is distributed by GPLv2.0
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--  Software placed into the public domain by the author.
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--  Software 'as is' without warranty.  Author liable for nothing.
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-- --------------------------------------------------------------------------
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-- DESCRIPTION:
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--    shifts input depending on amount value
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--
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--    SYNTHESIZABLE
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--
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----------------------------------------------------------------------------
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-- Revision History
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-- --------------------------------------------------------------------------
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-- Revision   Date    Author     CHANGES
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-- 1.0      4/2014    AS         initial
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-- 2.0      5/2015    AS         works with MIPS commands directly
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-- --------------------------------------------------------------------------
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library IEEE;
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  use IEEE.std_logic_1164.ALL;
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  use IEEE.numeric_std.ALL;
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library PLASMA;
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  use PLASMA.mips_instruction_set.ALL;
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  use PLASMA.plasma_pack.ALL;
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entity plasma_shifter is
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    port(
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      shift_in                : in  t_plasma_word;
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      shift_amount            : in  t_mips_shamt;
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      shift_func              : in  t_mips_function;
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      shift_out               : out t_plasma_word
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    );
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end entity plasma_shifter;
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-- synthesis translate_off
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-- ____ _ _  _ _  _ _    ____ ___ _ ____ _  _ 
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-- [__  | |\/| |  | |    |__|  |  | |  | |\ | 
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-- ___] | |  | |__| |___ |  |  |  | |__| | \| 
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architecture sim_shifter of plasma_shifter is
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begin
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  with shift_func select
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    shift_out  <=
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        std_logic_vector(shift_left(unsigned(shift_in), to_integer(unsigned(shift_amount))))  when MIPS_FUNC_SLL | MIPS_FUNC_SLLV,
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        std_logic_vector(shift_right(unsigned(shift_in),to_integer(unsigned(shift_amount))))  when MIPS_FUNC_SRL | MIPS_FUNC_SRLV,
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        std_logic_vector(shift_right(signed(shift_in),  to_integer(unsigned(shift_amount))))  when MIPS_FUNC_SRA | MIPS_FUNC_SRAV,
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        shift_in                                                                              when others;
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end architecture sim_shifter;
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-- synthesis translate_on
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-- ____ ___  ____ ____ 
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-- |___ |__] | __ |__| 
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-- |    |    |__] |  | 
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architecture FPGA_shifter of plasma_shifter is
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    -- wire paths for generation
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  type t_plasma_shifter_prop    is array(PLASMA_SHIFTER_WIDTH     downto 0) of t_plasma_word;   -- propagation path
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  type t_plasma_shifter_comp    is array(PLASMA_SHIFTER_WIDTH - 1 downto 0) of t_plasma_word;   -- composition path
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  -- control signals
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  signal shifter_left           : std_logic;
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  signal shifter_right          : std_logic;
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  -- path signals
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  signal shifter_fill           : t_plasma_word;
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  signal shifter_prop           : t_plasma_shifter_prop;
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  signal shifter_comp           : t_plasma_shifter_comp;
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begin
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  -- decode shifting command
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  shifter_left        <= '1' when (shift_func = MIPS_FUNC_SLL) or (shift_func = MIPS_FUNC_SLLV)      else '0';
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  shifter_right       <= '1' when (shift_func = MIPS_FUNC_SRL) or (shift_func = MIPS_FUNC_SRLV)
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                                  or (shift_func = MIPS_FUNC_SRA) or (shift_func = MIPS_FUNC_SRAV)   else '0';
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  -- fill value
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  shifter_fill        <= (others => shift_in(PLASMA_DATA_WIDTH - 1)) when (shift_func = MIPS_FUNC_SRA) or (shift_func = MIPS_FUNC_SRAV) else PLASMA_ZERO_WORD;
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  -- injure first propagation vector
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  shifter_prop(0)     <= shift_in;
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shifter_structure: for i in 0 to PLASMA_SHIFTER_WIDTH - 1 generate
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  shifter_mux_input:
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    shifter_comp(i)     <=  shifter_prop(i)(PLASMA_DATA_WIDTH - 2**i - 1 downto 0) & PLASMA_ZERO_WORD(2**i             - 1 downto    0) when shifter_left  = '1' else
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                            shifter_fill(                       2**i - 1 downto 0) & shifter_prop(i)(PLASMA_DATA_WIDTH - 1 downto 2**i) when shifter_right = '1' else
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                            shifter_prop(i);
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  shifter_mux_step:
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    shifter_prop(i + 1) <=  shifter_comp(i) when shift_amount(i) = '1' else shifter_prop(i);
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end generate;
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  shift_out   <= shifter_prop(PLASMA_SHIFTER_WIDTH);
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end architecture FPGA_shifter;

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