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[/] [plb2wbbridge/] [trunk/] [systems/] [EDK_Libs/] [WishboneIPLib/] [drivers/] [plb2wb_bridge_v1_00_a/] [src/] [plb2wb_bridge.h] - Blame information for rev 2

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1 2 feddischso
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  PLB2WB-Bridge                                               ////
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////                                                              ////
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////  This file is part of the PLB-to-WB-Bridge project           ////
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////  http://opencores.org/project,plb2wbbridge                   ////
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////                                                              ////
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////  Description                                                 ////
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////  Implementation of a PLB-to-WB-Bridge according to           ////
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////  PLB-to-WB Bridge specification document.                    ////
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////                                                              ////
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////  To Do:                                                      ////
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////   Nothing                                                    ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - Christian Haettich                                    ////
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////        feddischson@opencores.org                             ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2010 Authors                                   ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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#ifndef PLB2WB_BRIDGE_H
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#define PLB2WB_BRIDGE_H
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#include "xparameters.h"
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#include "xbasic_types.h"
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#include "xintc.h"
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//
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// PLB2WB-Bridge registers and irq-id
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//
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#define PLB2WB_STATUS         0x00
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#define PLB2WB_STATUS_DAT     0x04
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#define PLB2WB_STATUS_ADR     0x08
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#define PLB2WB_STATUS_IRQ     0x0c
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#define PLB2WB_STATUS_CON     0x04
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#define PLB2WB_STATUS_ABO     0x08
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#define PLB2WB_STATUS_RST     0x0c
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#define PLB2WB_STATUS_WERR    0x20000000
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#define PLB2WB_STATUS_WBRST   0x40000000
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#define PLB2WB_STATUS_WBIRQ   0x80000000
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typedef struct {
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        XInterruptHandler Handler;
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        void *CallBackRef;
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} PLB2WB_Bridge_VectorTableEntry;
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typedef struct{
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   u32 BaseAddress;
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   u32 StatusBaseAddress;
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   u16 DeviceId;
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} PLB2WB_Bridge_Config;
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typedef struct{
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   u32 BaseAddress;
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   u32 StatusBaseAddress;
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   u32 IsReady;
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        u32 UnhandledInterrupts;
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   PLB2WB_Bridge_Config *CfgPtr;
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   u8       irqID;
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   XIntc*   xintcInstancePtr;
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   PLB2WB_Bridge_VectorTableEntry HandlerTable[ XPAR_PLB2WB_BRIDGE_0_WB_PIC_INTS ]; // wishbone peripheral irqs
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   PLB2WB_Bridge_VectorTableEntry WBWrErrorHandler;                                 // wishbone write error handler
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   PLB2WB_Bridge_VectorTableEntry WBRstHandler;                                     // wishbone reset handler
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}PLB2WB_Bridge;
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extern PLB2WB_Bridge_Config PLB2WB_Bridge_ConfigTable[];
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int   PLB2WB_Bridge_Initialize            ( PLB2WB_Bridge* InstancePtr,    u16 DeviceId,
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                                            XIntc* xintcInstancePtr, u8 irqID             );
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int   PLB2WB_Bridge_Connect               ( PLB2WB_Bridge*,  u8, XInterruptHandler, void* );
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void  PLB2WB_Bridge_Disconnect            ( PLB2WB_Bridge * InstancePtr, u8 Id            );
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void  PLB2WB_Bridge_DeviceInterruptHandler( void* ptr );
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int   PLB2WB_Bridge_Connect_WBWrErrHandler( PLB2WB_Bridge* InstancePtr, XInterruptHandler Handler, void* CallBackRef );
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int   PLB2WB_Bridge_Connect_WBRstHandler  ( PLB2WB_Bridge* InstancePtr, XInterruptHandler Handler, void* CallBackRef );
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void  PLB2WB_Bridge_WBContinue            ( PLB2WB_Bridge* InstancePtr );
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void  PLB2WB_Bridge_WBAbort               ( PLB2WB_Bridge* InstancePtr );
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void  PLB2WB_Bridge_SoftReset             ( PLB2WB_Bridge* InstancePtr );
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#endif

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