OpenCores
URL https://opencores.org/ocsvn/pltbutils/pltbutils/trunk

Subversion Repositories pltbutils

[/] [pltbutils/] [branches/] [dev0007/] [doc/] [required_updates.txt] - Blame information for rev 55

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 51 pela
pltbutils required_updates.txt
2
 
3
While pltbutils is still in alpha- and beta state, backwards compatibility in
4
new versions of pltbutils is not prioritized, because the code is still under
5
development.
6
If you have made testbenches which use pltbutils, you may need to make
7
modifications if you update to a newer version of pltbutils.
8
This document lists required modifications to your testbenches.
9
 
10
alpha0005 -> alpha0006
11
For more information and examples, see specification_pltbutils.pdf .
12
1. One less file to be compiled:
13
   src/vhdl/pltbutils_type_pkg.vhd has been removed.
14
2. testname() has been removed. Call starttest() and endtest() instead.
15
3. In the testbech top, replace
16
      -- Simulation status- and control signals
17
      signal test_num       : integer;
18
      -- VHDL-1993:
19
      --signal test_name      : string(pltbutils_test_name'range);
20
      --signal info           : string(pltbutils_info'range);
21
      -- VHDL-2002:
22
      signal test_name      : string(pltbutils_sc.test_name'range);
23
      signal info           : string(pltbutils_sc.info'range);
24
 
25
      signal checks         : integer;
26
      signal errors         : integer;
27
      signal stop_sim       : std_logic;
28
   with
29
     -- Simulation status- and control signals
30
     -- for accessing .stop_sim and for viewing in waveform window
31
     signal pltbs          : pltbs_t := C_PLTBS_INIT;
32
 
33
4. In the testbench top, under begin, remove
34
      -- Simulation status and control for viewing in waveform window
35
      -- VHDL-1993:
36
      --test_num  <= pltbutils_test_num;
37
      --test_name <= pltbutils_test_name;
38
      --checks    <= pltbutils_chk_cnt;
39
      --errors    <= pltbutils_err_cnt;
40
      -- VHDL-2002:
41
      test_num  <= pltbutils_sc.test_num;
42
      test_name <= pltbutils_sc.test_name;
43
      info      <= pltbutils_sc.info;
44
      checks    <= pltbutils_sc.chk_cnt;
45
      errors    <= pltbutils_sc.err_cnt;
46
      stop_sim  <= pltbutils_sc.stop_sim;
47
 
48
5. Feed stop_sim input of testbench component with pltbs.stop_sim instead
49
   of just stop_sim.
50
6. If the testcase procudure resides in a separate VHDL component,
51
   that component should output pltbs of type pltbs_t.
52
7. The testcase process should instansiate the following variable:
53
     variable pltbv  : pltbv_t := C_PLTBV_INIT;
54
8. In calls to pltbutils procedures, replace the argument
55
     pltbutils_sc
56
   with
57
     pltbv, pltbs
58
9. In the waveform window, replace the old simulation status signals
59
   with pltbs, and expand it to view the member elements.
60
 
61
alpha0004 -> alpha0005
62
1. One more file needs to be compiled: src/vhdl/pltbutils_user_cfg_pkg.vhd .
63
2. Call starttest() before a test, and endtest() after.
64
   Previously, testname() should be called before a test, but testname() is
65
   now depricated and will be removed in a later version.
66
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.