OpenCores
URL https://opencores.org/ocsvn/pltbutils/pltbutils/trunk

Subversion Repositories pltbutils

[/] [pltbutils/] [branches/] [dev0007/] [sim/] [modelsim_tb_example2/] [bin/] [tc1.do] - Blame information for rev 66

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 pela
# tc1.do
2
# ModelSim do script for compiling and running simulation
3
 
4
set vsim_arg ""
5
if {$argc >= 1} {
6
  set vsim_arg $1
7
}
8
 
9 64 pela
do comp.do ../../../examples/vhdl/tb_example2/tc1.vhd
10
vsim -l ../log/tc1.log $vsim_arg tb_example2
11 2 pela
#do log.do
12
do ../bin/wave.do
13
run 1 ms
14
 
15
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.