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[/] [pmodad2driver/] [trunk/] [hw/] [simulations/] [Testbench_Top_PmodAD2Driver.vhd] - Blame information for rev 2

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Line No. Rev Author Line
1 2 ldalmasso
------------------------------------------------------------------------
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-- Engineer:    Dalmasso Loic
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-- Create Date: 05/02/2025
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-- Module Name: Top_PmodAD2Driver
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-- Description:
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--      Top Module including Pmod AD2 Driver for the 4 Channels of 12-bit Analog-to-Digital Converter AD7991.
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--
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-- WARNING: /!\ Require Pull-Up on SCL and SDA pins /!\
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--
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-- Ports
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--              Input   -       i_sys_clock: System Input Clock
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--              Input   -       i_reset: Module Reset ('0': No Reset, '1': Reset)
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--              Output  -       o_led: ADC Value
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--              In/Out  -       io_scl: I2C Serial Clock ('0'-'Z'(as '1') values, working with Pull-Up)
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--              In/Out  -       io_sda: I2C Serial Data ('0'-'Z'(as '1') values, working with Pull-Up)
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------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE IEEE.NUMERIC_STD.ALL;
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ENTITY Testbench_Top_PmodAD2Driver is
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--  Port ( );
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END Testbench_Top_PmodAD2Driver;
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ARCHITECTURE Behavioral of Testbench_Top_PmodAD2Driver is
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COMPONENT Top_PmodAD2Driver is
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    PORT(
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        i_sys_clock: IN STD_LOGIC;
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        i_reset: IN STD_LOGIC;
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        o_led: OUT UNSIGNED(15 downto 0);
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        io_scl: INOUT STD_LOGIC;
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        io_sda: INOUT STD_LOGIC
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    );
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END COMPONENT;
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signal sys_clock: STD_LOGIC := '0';
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signal reset: STD_LOGIC := '0';
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signal led: UNSIGNED(15 downto 0) := (others => '0');
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signal scl: STD_LOGIC := '0';
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signal sda: STD_LOGIC := '0';
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begin
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-- Clock 100 MHz
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sys_clock <= not(sys_clock) after 5 ns;
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-- Reset
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reset <= '1', '0' after 5 us;
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-- SDA
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sda <=  'Z',
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        -- Write Slave Address ACK
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        '0' after 105.025 us,
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        'Z' after 115.025 us,
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        -- Write Config ACK
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        '0' after 195.025 us,
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        'Z' after 215.025 us,
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        -- Write Slave Address ACK
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        '0' after 316.065 us,
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        -- Read Byte 1.1 (0xD7)
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        '1' after 326.065 us,
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        '1' after 336.065 us,
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        '0' after 346.065 us,
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        '1' after 356.065 us,
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        '0' after 366.065 us,
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        '1' after 376.065 us,
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        '1' after 386.065 us,
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        '1' after 396.065 us,
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        'Z' after 406.065 us,
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        -- Read Byte 2.1 (0x15)
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        '0' after 416.065 us,
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        '0' after 426.065 us,
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        '0' after 436.065 us,
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        '1' after 446.065 us,
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        '0' after 456.065 us,
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        '1' after 466.065 us,
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        '0' after 476.065 us,
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        '1' after 486.065 us,
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        'Z' after 496.065 us;
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uut: Top_PmodAD2Driver
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    PORT map(
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        i_sys_clock => sys_clock,
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        i_reset => reset,
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        o_led => led,
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        io_scl => scl,
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        io_sda => sda);
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end Behavioral;

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