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[/] [potato/] [trunk/] [benchmarks/] [platform.h] - Blame information for rev 65

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1 13 skordal
// The Potato Processor Benchmark Applications
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// (c) Kristian Klomsten Skordal 2015 <kristian.skordal@wafflemail.net>
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// Report bugs and issues on <http://opencores.org/project,potato,bugtracker>
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// This file contains various platform details. The default defines in this file
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// correspond to the "official" test platform, the Potato SoC for the Nexys4 board.
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#ifndef PLATFORM_H
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#define PLATFORM_H
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// Clock frequency in Hz:
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#define SYSTEM_CLK_FREQ 50000000
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// Macro for using the addresses below in C code:
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#define IO_ADDRESS(x)   ((volatile void *) x)
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// Base addresses for the various peripherals in the system:
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#define IMEM_BASE       0x00000000
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#define DMEM_BASE       0x00002000
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#define GPIO1_BASE      0x00004000 
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#define GPIO2_BASE      0x00004800
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#define UART_BASE       0x00005000
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#define TIMER_BASE      0x00005800
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#define SEG7_BASE       0x00006000
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// IRQs:
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#define IRQ_EXTERNAL    0
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#define IRQ_UART_RTS    1
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#define IRQ_UART_RECV   2
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#define IRQ_TIMER       5
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// GPIO register offsets:
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#define GPIO_INPUT      0
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#define GPIO_OUTPUT     4
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#define GPIO_DIR        8
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// UART register offsets:
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#define UART_TX         0
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#define UART_RX         4
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#define UART_STATUS     8
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// UART status register bits:
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#define UART_STATUS_RXBUF_EMPTY 0
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#define UART_STATUS_TXBUF_EMPTY 1
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#define UART_STATUS_RXBUF_FULL  2
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#define UART_STATUS_TXBUF_FULL  3
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// Timer register offsets:
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#define TIMER_CTRL      0
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#define TIMER_COMPARE   4
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#define TIMER_COUNTER   8
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// Timer control register bits:
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#define TIMER_CTRL_RUN          0
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#define TIMER_CTRL_CLEAR        1
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// 7-Segment register offsets:
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#define SEG7_ENABLE     0
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#define SEG7_VALUE      4
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#endif
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