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[/] [potato/] [trunk/] [src/] [pp_imm_decoder.vhd] - Blame information for rev 10
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skordal |
-- The Potato Processor - A simple processor for FPGAs
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-- (c) Kristian Klomsten Skordal 2014 <kristian.skordal@wafflemail.net>
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skordal |
-- Report bugs and issues on <http://opencores.org/project,potato,bugtracker>
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skordal |
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library ieee;
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use ieee.std_logic_1164.all;
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--! @brief Module decoding immediate values from instruction words.
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entity pp_imm_decoder is
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port(
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instruction : in std_logic_vector(31 downto 2);
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immediate : out std_logic_vector(31 downto 0)
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);
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end entity pp_imm_decoder;
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architecture behaviour of pp_imm_decoder is
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begin
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decode: process(instruction)
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begin
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case instruction(6 downto 2) is
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when b"01101" | b"00101" => -- U type
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immediate <= instruction(31 downto 12) & (11 downto 0 => '0');
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when b"11011" => -- UJ type
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immediate <= (31 downto 20 => instruction(31)) & instruction(19 downto 12) & instruction(20) & instruction(30 downto 21) & '0';
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when b"11001" | b"00000" | b"00100" | b"11100"=> -- I type
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immediate <= (31 downto 11 => instruction(31)) & instruction(30 downto 20);
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when b"11000" => -- SB type
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immediate <= (31 downto 12 => instruction(31)) & instruction(7) & instruction(30 downto 25) & instruction(11 downto 8) & '0';
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when b"01000" => -- S type
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immediate <= (31 downto 11 => instruction(31)) & instruction(30 downto 25) & instruction(11 downto 7);
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when others =>
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immediate <= (others => '0');
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end case;
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end process decode;
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end architecture behaviour;
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