| 1 |
2 |
arif_endro |
# $Id: modelsim_bench.do,v 1.1.1.1 2005-11-15 01:51:28 arif_endro Exp $
|
| 2 |
|
|
# -----------------------------------------------------------------------------
|
| 3 |
|
|
# Title : ModelSim DO File
|
| 4 |
|
|
# Project :
|
| 5 |
|
|
# -----------------------------------------------------------------------------
|
| 6 |
|
|
# File : modelsim_bench.do
|
| 7 |
|
|
# Author : "Arif E. Nugroho"
|
| 8 |
|
|
# Created : 2005/11/01
|
| 9 |
|
|
# Last update :
|
| 10 |
|
|
# Simulators :
|
| 11 |
|
|
# Synthesizers:
|
| 12 |
|
|
# Target :
|
| 13 |
|
|
# -----------------------------------------------------------------------------
|
| 14 |
|
|
# Description : ModelSim DO script for simulations
|
| 15 |
|
|
# -----------------------------------------------------------------------------
|
| 16 |
|
|
# Copyright (C) 2005 Arif E. Nugroho
|
| 17 |
|
|
###############################################################################
|
| 18 |
|
|
##
|
| 19 |
|
|
## THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
|
| 20 |
|
|
## PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
|
| 21 |
|
|
## ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE
|
| 22 |
|
|
## ASSOCIATED DISCLAIMER.
|
| 23 |
|
|
##
|
| 24 |
|
|
###############################################################################
|
| 25 |
|
|
##
|
| 26 |
|
|
## THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
| 27 |
|
|
## IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
| 28 |
|
|
## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
| 29 |
|
|
## EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
| 30 |
|
|
## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
| 31 |
|
|
## PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
| 32 |
|
|
## OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
| 33 |
|
|
## WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
| 34 |
|
|
## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
| 35 |
|
|
## ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
| 36 |
|
|
##
|
| 37 |
|
|
###############################################################################
|
| 38 |
|
|
|
| 39 |
|
|
# Quit Current simulations
|
| 40 |
|
|
quit -sim;
|
| 41 |
|
|
|
| 42 |
|
|
# Destroy output window
|
| 43 |
|
|
destroy .wave;
|
| 44 |
|
|
destroy .list;
|
| 45 |
|
|
|
| 46 |
|
|
# Create new work library
|
| 47 |
|
|
vlib work;
|
| 48 |
|
|
|
| 49 |
|
|
# Compile all source
|
| 50 |
|
|
vcom ../source/fulladder.vhdl;
|
| 51 |
|
|
vcom ../source/adder_08bit.vhdl;
|
| 52 |
|
|
vcom ../source/bit_comparator.vhdl;
|
| 53 |
|
|
vcom ../source/comparator_7bit.vhdl;
|
| 54 |
|
|
vcom ../source/twos_c_8bit.vhdl;
|
| 55 |
|
|
vcom ../source/ext_val.vhdl;
|
| 56 |
|
|
vcom ../source/ser2par8bit.vhdl;
|
| 57 |
|
|
vcom ../source/product_code.vhdl;
|
| 58 |
|
|
vcom input.vhdl;
|
| 59 |
|
|
vcom output.vhdl;
|
| 60 |
|
|
vcom modelsim_bench.vhdl;
|
| 61 |
|
|
|
| 62 |
|
|
# Simulate the test_bench and design
|
| 63 |
|
|
vsim modelsim_bench
|
| 64 |
|
|
|
| 65 |
|
|
# Show the signal to wave window
|
| 66 |
|
|
add wave sim:/modelsim_bench/clock
|
| 67 |
|
|
add wave sim:/modelsim_bench/start
|
| 68 |
|
|
add wave sim:/modelsim_bench/rxin
|
| 69 |
|
|
add wave sim:/modelsim_bench/y0d
|
| 70 |
|
|
add wave sim:/modelsim_bench/y1d
|
| 71 |
|
|
add wave sim:/modelsim_bench/y2d
|
| 72 |
|
|
add wave sim:/modelsim_bench/y3d
|
| 73 |
|
|
add wave sim:/modelsim_bench/my_output/send_out
|
| 74 |
|
|
|
| 75 |
|
|
add wave sim:/modelsim_bench/my_product_code/y0
|
| 76 |
|
|
add wave sim:/modelsim_bench/my_product_code/y1
|
| 77 |
|
|
add wave sim:/modelsim_bench/my_product_code/y2
|
| 78 |
|
|
add wave sim:/modelsim_bench/my_product_code/y3
|
| 79 |
|
|
add wave sim:/modelsim_bench/my_product_code/r0
|
| 80 |
|
|
add wave sim:/modelsim_bench/my_product_code/r1
|
| 81 |
|
|
add wave sim:/modelsim_bench/my_product_code/c0
|
| 82 |
|
|
add wave sim:/modelsim_bench/my_product_code/c1
|
| 83 |
|
|
|
| 84 |
|
|
add wave sim:/modelsim_bench/my_product_code/y0e
|
| 85 |
|
|
add wave sim:/modelsim_bench/my_product_code/y1e
|
| 86 |
|
|
add wave sim:/modelsim_bench/my_product_code/y2e
|
| 87 |
|
|
add wave sim:/modelsim_bench/my_product_code/y3e
|
| 88 |
|
|
|
| 89 |
|
|
add wave sim:/modelsim_bench/my_product_code/row0/ext_r_o
|
| 90 |
|
|
add wave sim:/modelsim_bench/my_product_code/row1/ext_r_o
|
| 91 |
|
|
add wave sim:/modelsim_bench/my_product_code/row2/ext_r_o
|
| 92 |
|
|
add wave sim:/modelsim_bench/my_product_code/row3/ext_r_o
|
| 93 |
|
|
|
| 94 |
|
|
add wave sim:/modelsim_bench/my_product_code/col0/ext_r_o
|
| 95 |
|
|
add wave sim:/modelsim_bench/my_product_code/col1/ext_r_o
|
| 96 |
|
|
add wave sim:/modelsim_bench/my_product_code/col2/ext_r_o
|
| 97 |
|
|
add wave sim:/modelsim_bench/my_product_code/col3/ext_r_o
|
| 98 |
|
|
|
| 99 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_r_0/adder08_output
|
| 100 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_r_1/adder08_output
|
| 101 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_r_2/adder08_output
|
| 102 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_r_3/adder08_output
|
| 103 |
|
|
|
| 104 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_c_0/adder08_output
|
| 105 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_c_1/adder08_output
|
| 106 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_c_2/adder08_output
|
| 107 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_c_3/adder08_output
|
| 108 |
|
|
|
| 109 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_p_0/adder08_output
|
| 110 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_p_1/adder08_output
|
| 111 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_p_2/adder08_output
|
| 112 |
|
|
add wave sim:/modelsim_bench/my_product_code/sum_p_3/adder08_output
|
| 113 |
|
|
|
| 114 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_r_0
|
| 115 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_r_1
|
| 116 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_r_2
|
| 117 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_r_3
|
| 118 |
|
|
|
| 119 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_c_0
|
| 120 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_c_1
|
| 121 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_c_2
|
| 122 |
|
|
add wave sim:/modelsim_bench/my_product_code/ext_b_c_3
|
| 123 |
|
|
|
| 124 |
|
|
# Run the simulation
|
| 125 |
|
|
run -all
|
